From 56257bbcaf8f34c76edf3cfb4b000b2ab288da3e Mon Sep 17 00:00:00 2001 From: "Ivan I. Ovchinnikov" Date: Wed, 19 Oct 2022 13:25:43 +0300 Subject: [PATCH] pt2 done, qsys added, compiled successfully --- Top/Semafor_hw.tcl | 181 + Top/niosII.qsys | 167 +- Top/niosII.sopcinfo | 8405 ++++ Top/niosII/niosII.bsf | 79 +- Top/niosII/niosII.cmp | 8 +- Top/niosII/niosII.html | 2046 + Top/niosII/niosII.xml | 3481 ++ Top/niosII/niosII_bb.v | 10 +- Top/niosII/niosII_inst.v | 8 +- Top/niosII/niosII_inst.vhd | 16 +- Top/niosII/synthesis/niosII.debuginfo | 12929 ++++++ Top/niosII/synthesis/niosII.qip | 1176 + Top/niosII/synthesis/niosII.regmap | 266 + Top/niosII/synthesis/niosII.v | 299 + .../submodules/altera_avalon_sc_fifo.v | 915 + .../submodules/altera_merlin_arbitrator.sv | 272 + .../altera_merlin_burst_uncompressor.sv | 296 + .../submodules/altera_merlin_master_agent.sv | 303 + .../altera_merlin_master_translator.sv | 556 + .../submodules/altera_merlin_slave_agent.sv | 622 + .../altera_merlin_slave_translator.sv | 482 + .../submodules/altera_reset_controller.sdc | 30 + .../submodules/altera_reset_controller.v | 319 + .../submodules/altera_reset_synchronizer.v | 87 + Top/niosII/synthesis/submodules/dec.sv | 132 + Top/niosII/synthesis/submodules/niosII_cpu.v | 67 + .../synthesis/submodules/niosII_cpu_cpu.sdc | 53 + .../synthesis/submodules/niosII_cpu_cpu.v | 5658 +++ .../niosII_cpu_cpu_debug_slave_sysclk.v | 162 + .../niosII_cpu_cpu_debug_slave_tck.v | 239 + .../niosII_cpu_cpu_debug_slave_wrapper.v | 222 + ...niosII_cpu_cpu_ociram_default_contents.mif | 267 + .../submodules/niosII_cpu_cpu_rf_ram_a.mif | 42 + .../submodules/niosII_cpu_cpu_rf_ram_b.mif | 42 + .../submodules/niosII_cpu_cpu_test_bench.v | 656 + .../synthesis/submodules/niosII_irq_mapper.sv | 60 + .../synthesis/submodules/niosII_jtag_uart.v | 588 + .../synthesis/submodules/niosII_mem.hex | 32769 ++++++++++++++++ Top/niosII/synthesis/submodules/niosII_mem.v | 125 + .../submodules/niosII_mm_interconnect_0.v | 2878 ++ ...osII_mm_interconnect_0_avalon_st_adapter.v | 202 + ...ect_0_avalon_st_adapter_error_adapter_0.sv | 107 + .../niosII_mm_interconnect_0_cmd_demux.sv | 175 + .../niosII_mm_interconnect_0_cmd_demux_001.sv | 115 + .../niosII_mm_interconnect_0_cmd_mux.sv | 96 + .../niosII_mm_interconnect_0_cmd_mux_002.sv | 322 + .../niosII_mm_interconnect_0_router.sv | 260 + .../niosII_mm_interconnect_0_router_001.sv | 227 + .../niosII_mm_interconnect_0_router_002.sv | 215 + .../niosII_mm_interconnect_0_router_004.sv | 224 + .../niosII_mm_interconnect_0_router_008.sv | 220 + .../niosII_mm_interconnect_0_rsp_demux.sv | 100 + .../niosII_mm_interconnect_0_rsp_mux.sv | 425 + .../niosII_mm_interconnect_0_rsp_mux_001.sv | 345 + .../submodules/niosII_sys_clk_timer.v | 211 + Top/niosII/synthesis/submodules/periodram.v | 214 + Top/semafor.qsf | 11 +- 57 files changed, 80331 insertions(+), 51 deletions(-) create mode 100644 Top/Semafor_hw.tcl create mode 100644 Top/niosII.sopcinfo create mode 100644 Top/niosII/niosII.html create mode 100644 Top/niosII/niosII.xml create mode 100644 Top/niosII/synthesis/niosII.debuginfo create mode 100644 Top/niosII/synthesis/niosII.qip create mode 100644 Top/niosII/synthesis/niosII.regmap create mode 100644 Top/niosII/synthesis/niosII.v create mode 100644 Top/niosII/synthesis/submodules/altera_avalon_sc_fifo.v create mode 100644 Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv create mode 100644 Top/niosII/synthesis/submodules/altera_merlin_burst_uncompressor.sv create mode 100644 Top/niosII/synthesis/submodules/altera_merlin_master_agent.sv create mode 100644 Top/niosII/synthesis/submodules/altera_merlin_master_translator.sv create mode 100644 Top/niosII/synthesis/submodules/altera_merlin_slave_agent.sv create mode 100644 Top/niosII/synthesis/submodules/altera_merlin_slave_translator.sv create mode 100644 Top/niosII/synthesis/submodules/altera_reset_controller.sdc create mode 100644 Top/niosII/synthesis/submodules/altera_reset_controller.v create mode 100644 Top/niosII/synthesis/submodules/altera_reset_synchronizer.v create mode 100644 Top/niosII/synthesis/submodules/dec.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_cpu.v create mode 100644 Top/niosII/synthesis/submodules/niosII_cpu_cpu.sdc create mode 100644 Top/niosII/synthesis/submodules/niosII_cpu_cpu.v create mode 100644 Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_sysclk.v create mode 100644 Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_tck.v create mode 100644 Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_wrapper.v create mode 100644 Top/niosII/synthesis/submodules/niosII_cpu_cpu_ociram_default_contents.mif create mode 100644 Top/niosII/synthesis/submodules/niosII_cpu_cpu_rf_ram_a.mif create mode 100644 Top/niosII/synthesis/submodules/niosII_cpu_cpu_rf_ram_b.mif create mode 100644 Top/niosII/synthesis/submodules/niosII_cpu_cpu_test_bench.v create mode 100644 Top/niosII/synthesis/submodules/niosII_irq_mapper.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_jtag_uart.v create mode 100644 Top/niosII/synthesis/submodules/niosII_mem.hex create mode 100644 Top/niosII/synthesis/submodules/niosII_mem.v create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0.v create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_avalon_st_adapter.v create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_demux.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_demux_001.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_mux.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_mux_002.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_001.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_002.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_004.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_008.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_demux.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_mux.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_mux_001.sv create mode 100644 Top/niosII/synthesis/submodules/niosII_sys_clk_timer.v create mode 100644 Top/niosII/synthesis/submodules/periodram.v diff --git a/Top/Semafor_hw.tcl b/Top/Semafor_hw.tcl new file mode 100644 index 0000000..12e61bf --- /dev/null +++ b/Top/Semafor_hw.tcl @@ -0,0 +1,181 @@ +# TCL File Generated by Component Editor 18.1 +# Wed Oct 19 14:12:17 MSK 2022 +# DO NOT MODIFY + + +# +# Semafor "Semafor" v1.0 +# 2022.10.19.14:12:17 +# +# + +# +# request TCL package from ACDS 16.1 +# +package require -exact qsys 16.1 + + +# +# module Semafor +# +set_module_property DESCRIPTION "" +set_module_property NAME Semafor +set_module_property VERSION 1.0 +set_module_property INTERNAL false +set_module_property OPAQUE_ADDRESS_MAP true +set_module_property GROUP "User Logic" +set_module_property AUTHOR "" +set_module_property DISPLAY_NAME Semafor +set_module_property INSTANTIATE_IN_SYSTEM_MODULE true +set_module_property EDITABLE true +set_module_property REPORT_TO_TALKBACK false +set_module_property ALLOW_GREYBOX_GENERATION false +set_module_property REPORT_HIERARCHY false + + +# +# file sets +# +add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" "" +set_fileset_property QUARTUS_SYNTH TOP_LEVEL dec +set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false +set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false +add_fileset_file dec.sv SYSTEM_VERILOG PATH ../HDL/dec.sv TOP_LEVEL_FILE +add_fileset_file periodram.v VERILOG PATH ../HDL/IP/periodram.v + + +# +# parameters +# +add_parameter m INTEGER 8 +set_parameter_property m DEFAULT_VALUE 8 +set_parameter_property m DISPLAY_NAME m +set_parameter_property m TYPE INTEGER +set_parameter_property m UNITS None +set_parameter_property m HDL_PARAMETER true + + +# +# display items +# + + +# +# connection point clock +# +add_interface clock clock end +set_interface_property clock clockRate 0 +set_interface_property clock ENABLED true +set_interface_property clock EXPORT_OF "" +set_interface_property clock PORT_NAME_MAP "" +set_interface_property clock CMSIS_SVD_VARIABLES "" +set_interface_property clock SVD_ADDRESS_GROUP "" + +add_interface_port clock clk clk Input 1 + + +# +# connection point ctl_slave +# +add_interface ctl_slave avalon end +set_interface_property ctl_slave addressUnits WORDS +set_interface_property ctl_slave associatedClock clock +set_interface_property ctl_slave associatedReset reset_n +set_interface_property ctl_slave bitsPerSymbol 8 +set_interface_property ctl_slave burstOnBurstBoundariesOnly false +set_interface_property ctl_slave burstcountUnits WORDS +set_interface_property ctl_slave explicitAddressSpan 0 +set_interface_property ctl_slave holdTime 0 +set_interface_property ctl_slave linewrapBursts false +set_interface_property ctl_slave maximumPendingReadTransactions 0 +set_interface_property ctl_slave maximumPendingWriteTransactions 0 +set_interface_property ctl_slave readLatency 0 +set_interface_property ctl_slave readWaitStates 0 +set_interface_property ctl_slave readWaitTime 0 +set_interface_property ctl_slave setupTime 0 +set_interface_property ctl_slave timingUnits Cycles +set_interface_property ctl_slave writeWaitTime 0 +set_interface_property ctl_slave ENABLED true +set_interface_property ctl_slave EXPORT_OF "" +set_interface_property ctl_slave PORT_NAME_MAP "" +set_interface_property ctl_slave CMSIS_SVD_VARIABLES "" +set_interface_property ctl_slave SVD_ADDRESS_GROUP "" + +add_interface_port ctl_slave ctl_wr write Input 1 +add_interface_port ctl_slave ctl_rd read Input 1 +add_interface_port ctl_slave ctl_addr address Input 1 +add_interface_port ctl_slave ctl_wrdata writedata Input 32 +add_interface_port ctl_slave ctl_rddata readdata Output 32 +set_interface_assignment ctl_slave embeddedsw.configuration.isFlash 0 +set_interface_assignment ctl_slave embeddedsw.configuration.isMemoryDevice 0 +set_interface_assignment ctl_slave embeddedsw.configuration.isNonVolatileStorage 0 +set_interface_assignment ctl_slave embeddedsw.configuration.isPrintableDevice 0 + + +# +# connection point reset_n +# +add_interface reset_n reset end +set_interface_property reset_n associatedClock clock +set_interface_property reset_n synchronousEdges DEASSERT +set_interface_property reset_n ENABLED true +set_interface_property reset_n EXPORT_OF "" +set_interface_property reset_n PORT_NAME_MAP "" +set_interface_property reset_n CMSIS_SVD_VARIABLES "" +set_interface_property reset_n SVD_ADDRESS_GROUP "" + +add_interface_port reset_n clrn reset_n Input 1 + + +# +# connection point ram_slave +# +add_interface ram_slave avalon end +set_interface_property ram_slave addressUnits WORDS +set_interface_property ram_slave associatedClock clock +set_interface_property ram_slave associatedReset reset_n +set_interface_property ram_slave bitsPerSymbol 8 +set_interface_property ram_slave burstOnBurstBoundariesOnly false +set_interface_property ram_slave burstcountUnits WORDS +set_interface_property ram_slave explicitAddressSpan 0 +set_interface_property ram_slave holdTime 0 +set_interface_property ram_slave linewrapBursts false +set_interface_property ram_slave maximumPendingReadTransactions 0 +set_interface_property ram_slave maximumPendingWriteTransactions 0 +set_interface_property ram_slave readLatency 0 +set_interface_property ram_slave readWaitTime 1 +set_interface_property ram_slave setupTime 0 +set_interface_property ram_slave timingUnits Cycles +set_interface_property ram_slave writeWaitTime 0 +set_interface_property ram_slave ENABLED true +set_interface_property ram_slave EXPORT_OF "" +set_interface_property ram_slave PORT_NAME_MAP "" +set_interface_property ram_slave CMSIS_SVD_VARIABLES "" +set_interface_property ram_slave SVD_ADDRESS_GROUP "" + +add_interface_port ram_slave ram_wr write Input 1 +add_interface_port ram_slave ram_addr address Input 2 +add_interface_port ram_slave ram_wrdata writedata Input 32 +set_interface_assignment ram_slave embeddedsw.configuration.isFlash 0 +set_interface_assignment ram_slave embeddedsw.configuration.isMemoryDevice 0 +set_interface_assignment ram_slave embeddedsw.configuration.isNonVolatileStorage 0 +set_interface_assignment ram_slave embeddedsw.configuration.isPrintableDevice 0 + + +# +# connection point sem +# +add_interface sem conduit end +set_interface_property sem associatedClock "" +set_interface_property sem associatedReset reset_n +set_interface_property sem ENABLED true +set_interface_property sem EXPORT_OF "" +set_interface_property sem PORT_NAME_MAP "" +set_interface_property sem CMSIS_SVD_VARIABLES "" +set_interface_property sem SVD_ADDRESS_GROUP "" + +add_interface_port sem train train Input 1 +add_interface_port sem red red Output 1 +add_interface_port sem yellow yellow Output 1 +add_interface_port sem green green Output 1 + diff --git a/Top/niosII.qsys b/Top/niosII.qsys index a842d01..20542f3 100644 --- a/Top/niosII.qsys +++ b/Top/niosII.qsys @@ -6,7 +6,7 @@ version="1.0" description="" tags="" - categories="" /> + categories="System" /> @@ -71,7 +127,7 @@ - + @@ -80,6 +136,7 @@ + @@ -87,8 +144,8 @@ - - + + @@ -103,10 +160,10 @@ - + - ]]> + ]]> @@ -131,7 +188,7 @@ ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 - + @@ -144,15 +201,15 @@ - - ]]> + + ]]> - + @@ -181,7 +238,7 @@ - + @@ -271,7 +328,7 @@ enabled="1"> - + @@ -315,6 +372,9 @@ + + + - + @@ -337,7 +397,16 @@ start="cpu.data_master" end="jtag_uart.avalon_jtag_slave"> - + + + + + + - + + + + + + - + @@ -369,7 +447,7 @@ start="cpu.instruction_master" end="cpu.debug_mem_slave"> - + + + + + + + + + + + + + + + + + + + + + + diff --git a/Top/niosII.sopcinfo b/Top/niosII.sopcinfo new file mode 100644 index 0000000..3854063 --- /dev/null +++ b/Top/niosII.sopcinfo @@ -0,0 +1,8405 @@ + + + + + + + java.lang.Integer + 1666174853 + false + true + false + true + GENERATION_ID + + + java.lang.String + + false + true + false + true + UNIQUE_ID + + + java.lang.String + CYCLONEIVE + false + true + false + true + DEVICE_FAMILY + + + java.lang.String + EP4CE115F29C7 + false + true + false + true + DEVICE + + + java.lang.String + 7 + false + true + false + true + DEVICE_SPEEDGRADE + + + java.lang.Long + -1 + false + true + false + true + CLOCK_RATE + clk + + + java.lang.Integer + -1 + false + true + false + true + CLOCK_DOMAIN + clk + + + java.lang.Integer + -1 + false + true + false + true + RESET_DOMAIN + clk + + + java.lang.String + Cyclone IV E + false + true + false + true + DEVICE_FAMILY + + + boolean + false + false + true + true + true + + + + + long + 50000000 + false + true + true + true + + + boolean + true + false + true + true + true + + + long + 0 + false + true + false + true + CLOCK_RATE + clk_in + + + com.altera.sopcmodel.reset.Reset$Edges + NONE + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + qsys.ui.export_name + clk + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.Boolean + true + true + true + false + true + + + java.lang.Long + 50000000 + true + true + false + true + + clock + false + + in_clk + Input + 1 + clk + + + + + + qsys.ui.export_name + reset + + + java.lang.String + + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + NONE + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset_n + Input + 1 + reset_n + + + + + + java.lang.String + clk_in + false + true + true + true + + + long + 50000000 + false + true + true + true + + + boolean + true + false + true + true + true + + + boolean + true + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + true + + clk_out + Output + 1 + clk + + + false + cpu + clk + cpu.clk + + + false + jtag_uart + clk + jtag_uart.clk + + + false + sys_clk_timer + clk + sys_clk_timer.clk + + + false + mem + clk1 + mem.clk1 + + + false + sem + clock + sem.clock + + + + + + java.lang.String + + false + true + true + true + + + java.lang.String + clk_in_reset + false + true + true + true + + + [Ljava.lang.String; + clk_in_reset + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + NONE + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + true + + reset_n_out + Output + 1 + reset_n + + + + + + + debug.hostConnection + type jtag id 70:34|110:135 + + + embeddedsw.CMacro.BIG_ENDIAN + 0 + + + embeddedsw.CMacro.BREAK_ADDR + 0x00020820 + + + embeddedsw.CMacro.CPU_ARCH_NIOS2_R1 + + + + embeddedsw.CMacro.CPU_FREQ + 50000000u + + + embeddedsw.CMacro.CPU_ID_SIZE + 1 + + + embeddedsw.CMacro.CPU_ID_VALUE + 0x00000000 + + + embeddedsw.CMacro.CPU_IMPLEMENTATION + "tiny" + + + embeddedsw.CMacro.DATA_ADDR_WIDTH + 18 + + + embeddedsw.CMacro.DCACHE_LINE_SIZE + 0 + + + embeddedsw.CMacro.DCACHE_LINE_SIZE_LOG2 + 0 + + + embeddedsw.CMacro.DCACHE_SIZE + 0 + + + embeddedsw.CMacro.EXCEPTION_ADDR + 0x00000020 + + + embeddedsw.CMacro.FLASH_ACCELERATOR_LINES + 0 + + + embeddedsw.CMacro.FLASH_ACCELERATOR_LINE_SIZE + 0 + + + embeddedsw.CMacro.FLUSHDA_SUPPORTED + + + + embeddedsw.CMacro.HARDWARE_DIVIDE_PRESENT + 0 + + + embeddedsw.CMacro.HARDWARE_MULTIPLY_PRESENT + 0 + + + embeddedsw.CMacro.HARDWARE_MULX_PRESENT + 0 + + + embeddedsw.CMacro.HAS_DEBUG_CORE + 1 + + + embeddedsw.CMacro.HAS_DEBUG_STUB + + + + embeddedsw.CMacro.HAS_ILLEGAL_INSTRUCTION_EXCEPTION + + + + embeddedsw.CMacro.HAS_JMPI_INSTRUCTION + + + + embeddedsw.CMacro.ICACHE_LINE_SIZE + 0 + + + embeddedsw.CMacro.ICACHE_LINE_SIZE_LOG2 + 0 + + + embeddedsw.CMacro.ICACHE_SIZE + 0 + + + embeddedsw.CMacro.INST_ADDR_WIDTH + 18 + + + embeddedsw.CMacro.OCI_VERSION + 1 + + + embeddedsw.CMacro.RESET_ADDR + 0x00000000 + + + embeddedsw.configuration.DataCacheVictimBufImpl + ram + + + embeddedsw.configuration.HDLSimCachesCleared + 1 + + + embeddedsw.configuration.breakOffset + 32 + + + embeddedsw.configuration.breakSlave + cpu.debug_mem_slave + + + embeddedsw.configuration.cpuArchitecture + Nios II + + + embeddedsw.configuration.exceptionOffset + 32 + + + embeddedsw.configuration.exceptionSlave + mem.s1 + + + embeddedsw.configuration.resetOffset + 0 + + + embeddedsw.configuration.resetSlave + mem.s1 + + + embeddedsw.dts.compatible + altr,nios2-1.1 + + + embeddedsw.dts.group + cpu + + + embeddedsw.dts.name + nios2 + + + embeddedsw.dts.params.altr,exception-addr + 0x00000020 + + + embeddedsw.dts.params.altr,implementation + "tiny" + + + embeddedsw.dts.params.altr,reset-addr + 0x00000000 + + + embeddedsw.dts.params.clock-frequency + 50000000u + + + embeddedsw.dts.params.dcache-line-size + 0 + + + embeddedsw.dts.params.dcache-size + 0 + + + embeddedsw.dts.params.icache-line-size + 0 + + + embeddedsw.dts.params.icache-size + 0 + + + embeddedsw.dts.vendor + altr + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + false + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + false + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + boolean + true + false + false + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + false + true + true + + + boolean + false + false + false + true + true + + + boolean + false + false + false + true + true + + + boolean + true + false + false + true + true + + + boolean + false + false + true + true + true + + + boolean + true + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + false + true + true + + + int + 8 + false + false + true + true + + + int + 8 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + true + true + true + + + int + 32 + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 32 + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + mem.s1 + false + true + true + true + + + java.lang.String + None + false + false + true + true + + + java.lang.String + mem.s1 + false + true + true + true + + + java.lang.String + None + false + true + false + true + + + java.lang.String + Internal + false + false + true + true + + + java.lang.String + Dynamic + false + false + true + true + + + int + 8 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + true + true + false + true + + + java.lang.String + medium_le_shift + true + true + false + true + + + java.lang.String + no_mul + true + true + false + true + + + int + 0 + false + false + true + true + + + int + 2 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + false + true + true + + + java.lang.String + no_div + false + false + true + true + + + int + 12 + false + false + true + true + + + int + 12 + false + false + true + true + + + int + 4 + false + false + true + true + + + int + 6 + false + false + true + true + + + int + 7 + false + false + true + true + + + int + 16 + false + false + true + true + + + int + 8 + false + false + true + true + + + java.lang.String + Tiny + false + true + true + true + + + int + 4096 + false + false + true + true + + + int + 2 + false + false + true + true + + + int + 0 + false + false + true + true + + + java.lang.String + Automatic + false + true + false + true + + + java.lang.String + Automatic + false + true + false + true + + + int + 0 + false + false + true + true + + + java.lang.String + None + false + false + true + true + + + java.lang.String + false + false + false + true + true + + + java.lang.String + ram + false + false + true + true + + + int + 2048 + false + false + true + true + + + java.lang.String + Automatic + false + true + false + true + + + java.lang.String + Automatic + false + true + false + true + + + int + 0 + false + false + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + true + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + true + false + true + false + true + + + java.lang.String + Automatic + false + true + false + true + + + java.lang.String + Automatic + false + true + false + true + + + boolean + false + false + true + false + true + + + java.lang.String + Automatic + false + true + false + true + + + java.lang.String + Automatic + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + true + true + + + boolean + true + false + true + false + true + + + boolean + false + false + false + true + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + java.lang.String + _128 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + java.lang.String + none + false + false + true + true + + + java.lang.String + onchip_trace + false + false + true + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + true + true + true + true + + + int + 32 + true + true + true + true + + + int + 133152 + true + true + false + true + + + int + 0 + true + true + true + true + + + java.lang.String + false + true + true + false + true + + + int + 2048 + true + true + false + true + + + java.lang.String + cpu.debug_mem_slave + true + true + false + true + + + int + 32 + true + true + false + true + + + boolean + false + true + true + false + true + + + boolean + false + true + true + false + true + + + java.lang.String + "synthesis translate_on" + true + true + false + true + + + java.lang.String + "synthesis translate_off" + true + true + false + true + + + boolean + false + true + true + false + true + + + boolean + false + true + true + false + true + + + boolean + false + true + true + false + true + + + boolean + false + true + true + false + true + + + int + 18 + false + true + false + true + ADDRESS_WIDTH + instruction_master + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + flash_instruction_master + + + int + 18 + false + true + false + true + ADDRESS_WIDTH + data_master + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_data_master_0 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_data_master_1 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_data_master_2 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_data_master_3 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_instruction_master_0 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_instruction_master_1 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_instruction_master_2 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_instruction_master_3 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + data_master_high_performance + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + instruction_master_high_performance + + + java.lang.String + ]]> + false + true + false + true + ADDRESS_MAP + instruction_master + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + flash_instruction_master + + + java.lang.String + ]]> + false + true + false + true + ADDRESS_MAP + data_master + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_data_master_0 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_data_master_1 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_data_master_2 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_data_master_3 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_instruction_master_0 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_instruction_master_1 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_instruction_master_2 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_instruction_master_3 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + data_master_high_performance + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + instruction_master_high_performance + + + long + 50000000 + false + true + false + true + CLOCK_RATE + clk + + + java.lang.String + CYCLONEIVE + false + true + false + true + DEVICE_FAMILY + + + long + 3 + false + true + false + true + INTERRUPTS_USED + irq + + + java.lang.String + ]]> + false + true + false + true + CUSTOM_INSTRUCTION_SLAVES + custom_instruction_master + + + java.lang.String + ]]> + false + true + false + true + CUSTOM_INSTRUCTION_SLAVES + custom_instruction_master_a + + + java.lang.String + ]]> + false + true + false + true + CUSTOM_INSTRUCTION_SLAVES + custom_instruction_master_b + + + java.lang.String + ]]> + false + true + false + true + CUSTOM_INSTRUCTION_SLAVES + custom_instruction_master_c + + + java.lang.String + ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 + false + true + false + true + DEVICE_FEATURES + + + java.lang.String + EP4CE115F29C7 + false + true + false + true + DEVICE + + + java.lang.String + 7 + false + true + false + true + DEVICE_SPEEDGRADE + + + java.lang.Integer + 1 + false + true + false + true + CLOCK_DOMAIN + clk + + + java.lang.Integer + 1 + false + true + false + true + RESET_DOMAIN + clk + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.Boolean + true + true + true + false + true + + + java.lang.Long + 50000000 + true + true + false + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset_n + Input + 1 + reset_n + + + reset_req + Input + 1 + reset_req + + + + + + debug.providesServices + master + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 1 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + SYMBOLS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + reset + false + true + true + true + + + int + 8 + false + true + true + true + + + boolean + true + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + 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debug_mem_slave_debugaccess_to_roms + Output + 1 + debugaccess + + + false + jtag_uart + avalon_jtag_slave + jtag_uart.avalon_jtag_slave + 135224 + 8 + + + false + sem + ctl_slave + sem.ctl_slave + 135216 + 8 + + + false + cpu + debug_mem_slave + cpu.debug_mem_slave + 133120 + 2048 + + + false + sem + ram_slave + sem.ram_slave + 135200 + 16 + + + false + sys_clk_timer + s1 + sys_clk_timer.s1 + 135168 + 32 + + + false + mem + s2 + mem.s2 + 0 + 131072 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 1 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + SYMBOLS + false + true + true + true + + + boolean + true + false + true + false + true + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + reset + false + true + true + true + + + int + 8 + false + true + true + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + i_address + Output + 18 + address + + + i_read + Output + 1 + read + + + i_readdata + Input + 32 + readdata + + + i_waitrequest + Input + 1 + waitrequest + + + false + cpu + debug_mem_slave + cpu.debug_mem_slave + 133120 + 2048 + + + false + mem + s1 + mem.s1 + 0 + 131072 + + + + + + com.altera.entityinterfaces.IConnectionPoint + cpu.data_master + false + true + true + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + reset + false + true + false + true + + + java.lang.String + + false + true + false + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + INDIVIDUAL_REQUESTS + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + true + + irq + Input + 32 + irq + + + false + sys_clk_timer + irq + sys_clk_timer.irq + 0 + + + false + jtag_uart + irq + jtag_uart.irq + 1 + + + + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + + false + true + true + true + + + [Ljava.lang.String; + none + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + true + + debug_reset_request + Output + 1 + reset + + + + + + embeddedsw.configuration.hideDevice + 1 + + + qsys.ui.connect + instruction_master,data_master + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + false + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 2048 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + reset + false + true + true + true + + + int + 8 + false + true + true + true + + + java.math.BigInteger + 0 + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + false + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + false + true + true + + + boolean + true + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + false + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + false + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + false + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + debug_mem_slave_address + Input + 9 + address + + + debug_mem_slave_byteenable + Input + 4 + byteenable + + + debug_mem_slave_debugaccess + Input + 1 + debugaccess + + + debug_mem_slave_read + Input + 1 + read + + + debug_mem_slave_readdata + Output + 32 + readdata + + + debug_mem_slave_waitrequest + Output + 1 + waitrequest + + + debug_mem_slave_write + Input + 1 + write + + + debug_mem_slave_writedata + Input + 32 + writedata + + + + + + java.lang.String + + true + true + false + true + + + int + 8 + false + true + false + true + + + int + 0 + false + false + true + true + + + boolean + false + false + true + false + true + + + int + 8 + false + true + false + true + + + int + 0 + true + true + false + true + + + boolean + false + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + nios_custom_instruction + true + + dummy_ci_port + Output + 1 + readra + + + + + + + embeddedsw.CMacro.READ_DEPTH + 64 + + + embeddedsw.CMacro.READ_THRESHOLD + 8 + + + embeddedsw.CMacro.WRITE_DEPTH + 64 + + + embeddedsw.CMacro.WRITE_THRESHOLD + 8 + + + embeddedsw.dts.compatible + altr,juart-1.0 + + + embeddedsw.dts.group + serial + + + embeddedsw.dts.name + juart + + + embeddedsw.dts.vendor + altr + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 64 + false + true + true + true + + + int + 8 + false + true + true + true + + + java.lang.String + + false + false + false + true + + + java.lang.String + NO_INTERACTIVE_WINDOWS + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + false + true + + + int + 64 + false + true + true + true + + + int + 8 + false + true + true + true + + + long + 50000000 + false + true + false + true + CLOCK_RATE + clk + + + java.lang.String + 2.0 + false + true + false + true + AVALON_SPEC + + + boolean + false + true + true + false + true + + + boolean + false + true + true + false + true + + + boolean + false + true + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.Boolean + true + true + true + false + true + + + java.lang.Long + 50000000 + true + true + false + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + rst_n + Input + 1 + reset_n + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 1 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + NATIVE + false + true + false + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 2 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + reset + false + true + true + true + + + int + 8 + false + true + true + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + false + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + true + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + false + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + false + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + false + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + false + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + av_chipselect + Input + 1 + chipselect + + + av_address + Input + 1 + address + + + av_read_n + Input + 1 + read_n + + + av_readdata + Output + 32 + readdata + + + av_write_n + Input + 1 + write_n + + + av_writedata + Input + 32 + writedata + + + av_waitrequest + Output + 1 + waitrequest + + + + + + com.altera.entityinterfaces.IConnectionPoint + jtag_uart.avalon_jtag_slave + false + true + true + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + reset + false + true + false + true + + + java.lang.Integer + + false + true + true + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + true + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + NONE + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + false + + av_irq + Output + 1 + irq + + + + + + + embeddedsw.CMacro.ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR + 0 + + + embeddedsw.CMacro.ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE + 0 + + + embeddedsw.CMacro.CONTENTS_INFO + "" + + + embeddedsw.CMacro.DUAL_PORT + 1 + + + embeddedsw.CMacro.GUI_RAM_BLOCK_TYPE + AUTO + + + embeddedsw.CMacro.INIT_CONTENTS_FILE + niosII_mem + + + embeddedsw.CMacro.INIT_MEM_CONTENT + 1 + + + embeddedsw.CMacro.INSTANCE_ID + NONE + + + embeddedsw.CMacro.NON_DEFAULT_INIT_FILE_ENABLED + 0 + + + embeddedsw.CMacro.RAM_BLOCK_TYPE + AUTO + + + embeddedsw.CMacro.READ_DURING_WRITE_MODE + DONT_CARE + + + embeddedsw.CMacro.SINGLE_CLOCK_OP + 1 + + + embeddedsw.CMacro.SIZE_MULTIPLE + 1 + + + embeddedsw.CMacro.SIZE_VALUE + 131072 + + + embeddedsw.CMacro.WRITABLE + 1 + + + embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR + SIM_DIR + + + embeddedsw.memoryInfo.GENERATE_DAT_SYM + 1 + + + embeddedsw.memoryInfo.GENERATE_HEX + 1 + + + embeddedsw.memoryInfo.HAS_BYTE_LANE + 0 + + + embeddedsw.memoryInfo.HEX_INSTALL_DIR + QPF_DIR + + + embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH + 32 + + + embeddedsw.memoryInfo.MEM_INIT_FILENAME + niosII_mem + + + postgeneration.simulation.init_file.param_name + INIT_FILE + + + postgeneration.simulation.init_file.type + MEM_INIT + + + boolean + false + false + true + true + true + + + java.lang.String + AUTO + false + true + true + true + + + int + 32 + false + true + true + true + + + int + 32 + false + true + false + true + + + boolean + true + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + true + true + false + true + + + boolean + true + false + true + true + true + + + java.lang.String + onchip_mem.hex + false + false + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + NONE + false + false + true + true + + + long + 131072 + false + true + true + true + + + java.lang.String + DONT_CARE + false + true + true + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + boolean + true + false + true + true + true + + + boolean + true + true + true + false + true + + + int + 1 + false + true + true + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + false + false + true + + + boolean + false + false + false + true + true + + + boolean + true + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + true + false + true + true + true + + + java.lang.String + niosII_mem + false + true + false + true + UNIQUE_ID + + + java.lang.String + CYCLONEIVE + false + true + false + true + DEVICE_FAMILY + + + java.lang.String + ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 + false + true + false + true + DEVICE_FEATURES + + + int + 15 + true + true + false + true + + + int + 15 + true + true + false + true + + + int + 32 + true + true + false + true + + + int + 32 + true + true + false + true + + + java.lang.String + Automatic + true + true + false + true + + + boolean + false + true + true + false + true + + + java.lang.String + niosII_mem.hex + true + true + false + true + + + boolean + false + false + true + true + true + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 1 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + false + true + + + int + 1 + false + true + false + true + + + java.math.BigInteger + 131072 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk1 + false + true + true + true + + + java.lang.String + reset1 + false + true + true + true + + + int + 8 + false + true + true + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 131072 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 1 + false + true + true + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + address + Input + 15 + address + + + clken + Input + 1 + clken + + + chipselect + Input + 1 + chipselect + + + write + Input + 1 + write + + + readdata + Output + 32 + readdata + + + writedata + Input + 32 + writedata + + + byteenable + Input + 4 + byteenable + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 1 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + false + true + + + int + 1 + false + true + false + true + + + java.math.BigInteger + 131072 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk1 + false + true + true + true + + + java.lang.String + reset1 + false + true + true + true + + + int + 8 + false + true + true + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 131072 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 1 + false + true + true + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + address2 + Input + 15 + address + + + chipselect2 + Input + 1 + chipselect + + + clken2 + Input + 1 + clken + + + write2 + Input + 1 + write + + + readdata2 + Output + 32 + readdata + + + writedata2 + Input + 32 + writedata + + + byteenable2 + Input + 4 + byteenable + + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk1 + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset + Input + 1 + reset + + + reset_req + Input + 1 + reset_req + + + + + + + int + 8 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + false + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 8 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clock + false + true + true + true + + + java.lang.String + reset_n + false + true + true + true + + + int + 8 + false + true + true + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + ctl_wr + Input + 1 + write + + + ctl_rd + Input + 1 + read + + + ctl_addr + Input + 1 + address + + + ctl_wrdata + Input + 32 + writedata + + + ctl_rddata + Output + 32 + readdata + + + + + + java.lang.String + clock + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + clrn + Input + 1 + reset_n + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + false + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 16 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clock + false + true + true + true + + + java.lang.String + reset_n + false + true + true + true + + + int + 8 + false + true + true + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + ram_wr + Input + 1 + write + + + ram_addr + Input + 2 + address + + + ram_wrdata + Input + 32 + writedata + + + + + + java.lang.String + + false + true + true + true + + + java.lang.String + reset_n + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + conduit + false + + train + Input + 1 + train + + + red + Output + 1 + red + + + yellow + Output + 1 + yellow + + + green + Output + 1 + green + + + + + + + embeddedsw.CMacro.ALWAYS_RUN + 0 + + + embeddedsw.CMacro.COUNTER_SIZE + 32 + + + embeddedsw.CMacro.FIXED_PERIOD + 0 + + + embeddedsw.CMacro.FREQ + 50000000 + + + embeddedsw.CMacro.LOAD_VALUE + 49999 + + + embeddedsw.CMacro.MULT + 0.001 + + + embeddedsw.CMacro.PERIOD + 1 + + + embeddedsw.CMacro.PERIOD_UNITS + ms + + + embeddedsw.CMacro.RESET_OUTPUT + 0 + + + embeddedsw.CMacro.SNAPSHOT + 1 + + + embeddedsw.CMacro.TICKS_PER_SEC + 1000 + + + embeddedsw.CMacro.TIMEOUT_PULSE_OUTPUT + 0 + + + embeddedsw.dts.compatible + altr,timer-1.0 + + + embeddedsw.dts.group + timer + + + embeddedsw.dts.name + timer + + + embeddedsw.dts.params.clock-frequency + 50000000 + + + embeddedsw.dts.vendor + altr + + + boolean + false + false + true + true + true + + + int + 32 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + 1 + false + true + true + true + + + java.lang.String + MSEC + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + true + false + true + true + true + + + boolean + false + false + true + true + true + + + long + 50000000 + false + true + false + true + CLOCK_RATE + clk + + + int + 2 + false + true + false + true + + + java.lang.String + FULL_FEATURED + true + true + false + true + + + java.lang.String + ms + true + true + false + true + + + double + 0.001 + true + true + false + true + + + java.lang.String + 49999 + true + true + false + true + + + double + 0.001 + true + true + false + true + + + double + 1000.0 + true + true + false + true + + + int + 3 + true + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.Boolean + true + true + true + false + true + + + java.lang.Long + 50000000 + true + true + false + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset_n + Input + 1 + reset_n + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + embeddedsw.configuration.isTimerDevice + 1 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + NATIVE + false + true + false + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 8 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + reset + false + true + true + true + + + int + 8 + false + true + true + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + address + Input + 3 + address + + + writedata + Input + 16 + writedata + + + readdata + Output + 16 + readdata + + + chipselect + Input + 1 + chipselect + + + write_n + Input + 1 + write_n + + + + + + com.altera.entityinterfaces.IConnectionPoint + sys_clk_timer.s1 + false + true + true + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + reset + false + true + false + true + + + java.lang.Integer + + false + true + true + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + true + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + NONE + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + false + + irq + Output + 1 + irq + + + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00021038 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + data_master + jtag_uart + avalon_jtag_slave + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00021030 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + data_master + sem + ctl_slave + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00020800 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + data_master + cpu + debug_mem_slave + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00021020 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + data_master + sem + ram_slave + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00021000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + data_master + sys_clk_timer + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x0000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + data_master + mem + s2 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00020800 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + instruction_master + cpu + debug_mem_slave + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x0000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + instruction_master + mem + s1 + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + cpu + clk + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + jtag_uart + clk + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + sys_clk_timer + clk + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + mem + clk1 + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + sem + clock + + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + irq + sys_clk_timer + irq + + + + int + 1 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + irq + jtag_uart + irq + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk_reset + cpu + reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk_reset + jtag_uart + reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk_reset + sys_clk_timer + reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk_reset + mem + reset1 + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk_reset + sem + reset_n + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + debug_reset_request + cpu + reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + debug_reset_request + jtag_uart + reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + debug_reset_request + sys_clk_timer + reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + debug_reset_request + mem + reset1 + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + debug_reset_request + sem + reset_n + + + 1 + clock_source + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Clock Source + 18.1 + + + 1 + clock_sink + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Clock Input + 18.1 + + + 1 + reset_sink + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Reset Input + 18.1 + + + 1 + clock_source + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Clock Output + 18.1 + + + 1 + reset_source + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Reset Output + 18.1 + + + 1 + altera_nios2_gen2 + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Nios II Processor + 18.1 + + + 5 + clock_sink + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Clock Input + 18.1 + + + 5 + reset_sink + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Reset Input + 18.1 + + + 2 + avalon_master + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Avalon Memory Mapped Master + 18.1 + + + 1 + interrupt_receiver + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Interrupt Receiver + 18.1 + + + 1 + reset_source + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Reset Output + 18.1 + + + 7 + avalon_slave + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Avalon Memory Mapped Slave + 18.1 + + + 1 + nios_custom_instruction_master + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Custom Instruction Master + 18.1 + + + 1 + altera_avalon_jtag_uart + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + JTAG UART Intel FPGA IP + 18.1 + + + 2 + interrupt_sender + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Interrupt Sender + 18.1 + + + 1 + altera_avalon_onchip_memory2 + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + On-Chip Memory (RAM or ROM) Intel FPGA IP + 18.1 + + + 1 + Semafor + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Semafor + 1.0 + + + 1 + conduit_end + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Conduit + 18.1 + + + 1 + altera_avalon_timer + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Interval Timer Intel FPGA IP + 18.1 + + + 8 + avalon + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Avalon Memory Mapped Connection + 18.1 + + + 5 + clock + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Clock Connection + 18.1 + + + 2 + interrupt + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Interrupt Connection + 18.1 + + + 10 + reset + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Reset Connection + 18.1 + + 18.1 625 + + diff --git a/Top/niosII/niosII.bsf b/Top/niosII/niosII.bsf index 0f398e1..c61f1b7 100644 --- a/Top/niosII/niosII.bsf +++ b/Top/niosII/niosII.bsf @@ -20,40 +20,75 @@ refer to the applicable agreement for further details. */ (header "symbol" (version "1.1")) (symbol - (rect 0 0 224 144) - (text "niosII" (rect 98 -1 118 11)(font "Arial" (font_size 10))) - (text "inst" (rect 8 128 20 140)(font "Arial" )) + (rect 0 0 288 232) + (text "niosII" (rect 130 -1 150 11)(font "Arial" (font_size 10))) + (text "inst" (rect 8 216 20 228)(font "Arial" )) (port (pt 0 72) (input) (text "clk_clk" (rect 0 0 27 12)(font "Arial" (font_size 8))) (text "clk_clk" (rect 4 61 46 72)(font "Arial" (font_size 8))) - (line (pt 0 72)(pt 80 72)(line_width 1)) + (line (pt 0 72)(pt 112 72)(line_width 1)) ) (port (pt 0 112) (input) (text "reset_reset_n" (rect 0 0 56 12)(font "Arial" (font_size 8))) (text "reset_reset_n" (rect 4 101 82 112)(font "Arial" (font_size 8))) - (line (pt 0 112)(pt 80 112)(line_width 1)) + (line (pt 0 112)(pt 112 112)(line_width 1)) + ) + (port + (pt 0 152) + (input) + (text "sem_export_train" (rect 0 0 70 12)(font "Arial" (font_size 8))) + (text "sem_export_train" (rect 4 141 100 152)(font "Arial" (font_size 8))) + (line (pt 0 152)(pt 112 152)(line_width 1)) + ) + (port + (pt 0 168) + (output) + (text "sem_export_red" (rect 0 0 67 12)(font "Arial" (font_size 8))) + (text "sem_export_red" (rect 4 157 88 168)(font "Arial" (font_size 8))) + (line (pt 0 168)(pt 112 168)(line_width 1)) + ) + (port + (pt 0 184) + (output) + (text "sem_export_yellow" (rect 0 0 77 12)(font "Arial" (font_size 8))) + (text "sem_export_yellow" (rect 4 173 106 184)(font "Arial" (font_size 8))) + (line (pt 0 184)(pt 112 184)(line_width 1)) + ) + (port + (pt 0 200) + (output) + (text "sem_export_green" (rect 0 0 76 12)(font "Arial" (font_size 8))) + (text "sem_export_green" (rect 4 189 100 200)(font "Arial" (font_size 8))) + (line (pt 0 200)(pt 112 200)(line_width 1)) ) (drawing - (text "clk" (rect 65 43 148 99)(font "Arial" (color 128 0 0)(font_size 9))) - (text "clk" (rect 85 67 188 144)(font "Arial" (color 0 0 0))) - (text "reset" (rect 51 83 132 179)(font "Arial" (color 128 0 0)(font_size 9))) - (text "reset_n" (rect 85 107 212 224)(font "Arial" (color 0 0 0))) - (text " system " (rect 189 128 426 266)(font "Arial" )) - (line (pt 80 32)(pt 144 32)(line_width 1)) - (line (pt 144 32)(pt 144 128)(line_width 1)) - (line (pt 80 128)(pt 144 128)(line_width 1)) - (line (pt 80 32)(pt 80 128)(line_width 1)) - (line (pt 81 52)(pt 81 76)(line_width 1)) - (line (pt 82 52)(pt 82 76)(line_width 1)) - (line (pt 81 92)(pt 81 116)(line_width 1)) - (line (pt 82 92)(pt 82 116)(line_width 1)) - (line (pt 0 0)(pt 224 0)(line_width 1)) - (line (pt 224 0)(pt 224 144)(line_width 1)) - (line (pt 0 144)(pt 224 144)(line_width 1)) - (line (pt 0 0)(pt 0 144)(line_width 1)) + (text "clk" (rect 97 43 212 99)(font "Arial" (color 128 0 0)(font_size 9))) + (text "clk" (rect 117 67 252 144)(font "Arial" (color 0 0 0))) + (text "reset" (rect 83 83 196 179)(font "Arial" (color 128 0 0)(font_size 9))) + (text "reset_n" (rect 117 107 276 224)(font "Arial" (color 0 0 0))) + (text "sem_export" (rect 44 123 148 259)(font "Arial" (color 128 0 0)(font_size 9))) + (text "train" (rect 117 147 264 304)(font "Arial" (color 0 0 0))) + (text "red" (rect 117 163 252 336)(font "Arial" (color 0 0 0))) + (text "yellow" (rect 117 179 270 368)(font "Arial" (color 0 0 0))) + (text "green" (rect 117 195 264 400)(font "Arial" (color 0 0 0))) + (text " niosII " (rect 262 216 572 442)(font "Arial" )) + (line (pt 112 32)(pt 176 32)(line_width 1)) + (line (pt 176 32)(pt 176 216)(line_width 1)) + (line (pt 112 216)(pt 176 216)(line_width 1)) + (line (pt 112 32)(pt 112 216)(line_width 1)) + (line (pt 113 52)(pt 113 76)(line_width 1)) + (line (pt 114 52)(pt 114 76)(line_width 1)) + (line (pt 113 92)(pt 113 116)(line_width 1)) + (line (pt 114 92)(pt 114 116)(line_width 1)) + (line (pt 113 132)(pt 113 204)(line_width 1)) + (line (pt 114 132)(pt 114 204)(line_width 1)) + (line (pt 0 0)(pt 288 0)(line_width 1)) + (line (pt 288 0)(pt 288 232)(line_width 1)) + (line (pt 0 232)(pt 288 232)(line_width 1)) + (line (pt 0 0)(pt 0 232)(line_width 1)) ) ) diff --git a/Top/niosII/niosII.cmp b/Top/niosII/niosII.cmp index 60a241f..ef3bdda 100644 --- a/Top/niosII/niosII.cmp +++ b/Top/niosII/niosII.cmp @@ -1,7 +1,11 @@ component niosII is port ( - clk_clk : in std_logic := 'X'; -- clk - reset_reset_n : in std_logic := 'X' -- reset_n + clk_clk : in std_logic := 'X'; -- clk + reset_reset_n : in std_logic := 'X'; -- reset_n + sem_export_train : in std_logic := 'X'; -- train + sem_export_red : out std_logic; -- red + sem_export_yellow : out std_logic; -- yellow + sem_export_green : out std_logic -- green ); end component niosII; diff --git a/Top/niosII/niosII.html b/Top/niosII/niosII.html new file mode 100644 index 0000000..4bc3b02 --- /dev/null +++ b/Top/niosII/niosII.html @@ -0,0 +1,2046 @@ + + + + + datasheet for niosII + + + + + + + + +
niosII +
+
+
+ + + + + +
2022.10.19.14:20:53Datasheet
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+
Overview
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+
+ + + + + + + + +
  clk niosII
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+
Processor +
   + cpu + Nios II 18.1 +
All Components +
   + cpu + altera_nios2_gen2 18.1 +
   + jtag_uart + altera_avalon_jtag_uart 18.1 +
   + mem + altera_avalon_onchip_memory2 18.1 +
   + sem + Semafor 1.0 +
   + sys_clk_timer + altera_avalon_timer 18.1 +
+
+
+
Memory Map
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ cpu + +
 data_master instruction_master
  + cpu + +
debug_mem_slave 0x000208000x00020800
  + jtag_uart + +
avalon_jtag_slave 0x00021038
  + mem + +
s1 0x00000000
s2 0x00000000
  + sem + +
ctl_slave 0x00021030
ram_slave 0x00021020
  + sys_clk_timer + +
s1 0x00021000
+ +
+
+

clk

clock_source v18.1 +
+
+
+ + + + +
+

Parameters

+ + + + + + + + + + + + + + + + + + + + + + + + + +
clockFrequency50000000
clockFrequencyKnowntrue
inputClockFrequency0
resetSynchronousEdgesNONE
deviceFamilyUNKNOWN
generateLegacySimfalse
+
   + + + + +
+

Software Assignments

(none)
+
+ +
+
+

cpu

altera_nios2_gen2 v18.1 +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ clk + clk  cpu
  clk
clk_reset  
  reset
data_master   + jtag_uart +
  avalon_jtag_slave
irq  
  irq
debug_reset_request  
  reset
data_master   + sem +
  ctl_slave
data_master  
  ram_slave
debug_reset_request  
  reset_n
data_master   + sys_clk_timer +
  s1
irq  
  irq
debug_reset_request  
  reset
data_master   + mem +
  s2
instruction_master  
  s1
debug_reset_request  
  reset1
+
+
+
+ + + + +
+

Parameters

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
tmr_enabledfalse
setting_disable_tmr_injfalse
setting_showUnpublishedSettingsfalse
setting_showInternalSettingsfalse
setting_preciseIllegalMemAccessExceptionfalse
setting_exportPCBfalse
setting_exportdebuginfofalse
setting_clearXBitsLDNonBypasstrue
setting_bigEndianfalse
setting_export_large_RAMsfalse
setting_asic_enabledfalse
register_file_porfalse
setting_asic_synopsys_translate_on_offfalse
setting_asic_third_party_synthesisfalse
setting_asic_add_scan_mode_inputfalse
setting_oci_version1
setting_fast_register_readfalse
setting_exportHostDebugPortfalse
setting_oci_export_jtag_signalsfalse
setting_avalonDebugPortPresentfalse
setting_alwaysEncrypttrue
io_regionbase0
io_regionsize0
setting_support31bitdcachebypasstrue
setting_activateTracefalse
setting_allow_break_instfalse
setting_activateTestEndCheckerfalse
setting_ecc_sim_test_portsfalse
setting_disableocitracefalse
setting_activateMonitorstrue
setting_HDLSimCachesClearedtrue
setting_HBreakTestfalse
setting_breakslaveoveridefalse
mpu_useLimitfalse
mpu_enabledfalse
mmu_enabledfalse
mmu_autoAssignTlbPtrSztrue
cpuResetfalse
resetrequest_enabledtrue
setting_removeRAMinitfalse
setting_tmr_output_disablefalse
setting_shadowRegisterSets0
mpu_numOfInstRegion8
mpu_numOfDataRegion8
mmu_TLBMissExcOffset0
resetOffset0
exceptionOffset32
cpuID0
breakOffset32
userDefinedSettings
tracefilename
resetSlavemem.s1
mmu_TLBMissExcSlaveNone
exceptionSlavemem.s1
breakSlaveNone
setting_interruptControllerTypeInternal
setting_branchpredictiontypeDynamic
setting_bhtPtrSz8
cpuArchRev1
stratix_dspblock_shift_mulfalse
shifterTypemedium_le_shift
multiplierTypeno_mul
mul_shift_choice0
mul_32_impl2
mul_64_impl0
shift_rot_impl1
dividerTypeno_div
mpu_minInstRegionSize12
mpu_minDataRegionSize12
mmu_uitlbNumEntries4
mmu_udtlbNumEntries6
mmu_tlbPtrSz7
mmu_tlbNumWays16
mmu_processIDNumBits8
implTiny
icache_size4096
fa_cache_line2
fa_cache_linesize0
icache_tagramBlockTypeAutomatic
icache_ramBlockTypeAutomatic
icache_numTCIM0
icache_burstTypeNone
dcache_burstsfalse
dcache_victim_buf_implram
dcache_size2048
dcache_tagramBlockTypeAutomatic
dcache_ramBlockTypeAutomatic
dcache_numTCDM0
setting_exportvectorsfalse
setting_usedesignwarefalse
setting_ecc_presentfalse
setting_ic_ecc_presenttrue
setting_rf_ecc_presenttrue
setting_mmu_ecc_presenttrue
setting_dc_ecc_presenttrue
setting_itcm_ecc_presenttrue
setting_dtcm_ecc_presenttrue
regfile_ramBlockTypeAutomatic
ocimem_ramBlockTypeAutomatic
ocimem_ramInitfalse
mmu_ramBlockTypeAutomatic
bht_ramBlockTypeAutomatic
cdx_enabledfalse
mpx_enabledfalse
debug_enabledtrue
debug_triggerArmingtrue
debug_debugReqSignalsfalse
debug_assignJtagInstanceIDfalse
debug_jtagInstanceID0
debug_OCIOnchipTrace_128
debug_hwbreakpoint0
debug_datatrigger0
debug_traceTypenone
debug_traceStorageonchip_trace
master_addr_mapfalse
instruction_master_paddr_base0
instruction_master_paddr_size0
flash_instruction_master_paddr_base0
flash_instruction_master_paddr_size0
data_master_paddr_base0
data_master_paddr_size0
tightly_coupled_instruction_master_0_paddr_base0
tightly_coupled_instruction_master_0_paddr_size0
tightly_coupled_instruction_master_1_paddr_base0
tightly_coupled_instruction_master_1_paddr_size0
tightly_coupled_instruction_master_2_paddr_base0
tightly_coupled_instruction_master_2_paddr_size0
tightly_coupled_instruction_master_3_paddr_base0
tightly_coupled_instruction_master_3_paddr_size0
tightly_coupled_data_master_0_paddr_base0
tightly_coupled_data_master_0_paddr_size0
tightly_coupled_data_master_1_paddr_base0
tightly_coupled_data_master_1_paddr_size0
tightly_coupled_data_master_2_paddr_base0
tightly_coupled_data_master_2_paddr_size0
tightly_coupled_data_master_3_paddr_base0
tightly_coupled_data_master_3_paddr_size0
instruction_master_high_performance_paddr_base0
instruction_master_high_performance_paddr_size0
data_master_high_performance_paddr_base0
data_master_high_performance_paddr_size0
resetAbsoluteAddr0
exceptionAbsoluteAddr32
breakAbsoluteAddr133152
mmu_TLBMissExcAbsAddr0
dcache_bursts_derivedfalse
dcache_size_derived2048
breakSlave_derivedcpu.debug_mem_slave
dcache_lineSize_derived32
setting_ioregionBypassDCachefalse
setting_bit31BypassDCachefalse
translate_on "synthesis translate_on"
translate_off "synthesis translate_off"
debug_onchiptracefalse
debug_offchiptracefalse
debug_insttracefalse
debug_datatracefalse
instAddrWidth18
faAddrWidth1
dataAddrWidth18
tightlyCoupledDataMaster0AddrWidth1
tightlyCoupledDataMaster1AddrWidth1
tightlyCoupledDataMaster2AddrWidth1
tightlyCoupledDataMaster3AddrWidth1
tightlyCoupledInstructionMaster0AddrWidth1
tightlyCoupledInstructionMaster1AddrWidth1
tightlyCoupledInstructionMaster2AddrWidth1
tightlyCoupledInstructionMaster3AddrWidth1
dataMasterHighPerformanceAddrWidth1
instructionMasterHighPerformanceAddrWidth1
instSlaveMapParam<address-map><slave name='mem.s1' start='0x0' end='0x20000' type='altera_avalon_onchip_memory2.s1' /><slave name='cpu.debug_mem_slave' start='0x20800' end='0x21000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>
faSlaveMapParam
dataSlaveMapParam<address-map><slave name='mem.s2' start='0x0' end='0x20000' type='altera_avalon_onchip_memory2.s2' /><slave name='cpu.debug_mem_slave' start='0x20800' end='0x21000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='sys_clk_timer.s1' start='0x21000' end='0x21020' type='altera_avalon_timer.s1' /><slave name='sem.ram_slave' start='0x21020' end='0x21030' type='Semafor.ram_slave' /><slave name='sem.ctl_slave' start='0x21030' end='0x21038' type='Semafor.ctl_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x21038' end='0x21040' type='altera_avalon_jtag_uart.avalon_jtag_slave' /></address-map>
tightlyCoupledDataMaster0MapParam
tightlyCoupledDataMaster1MapParam
tightlyCoupledDataMaster2MapParam
tightlyCoupledDataMaster3MapParam
tightlyCoupledInstructionMaster0MapParam
tightlyCoupledInstructionMaster1MapParam
tightlyCoupledInstructionMaster2MapParam
tightlyCoupledInstructionMaster3MapParam
dataMasterHighPerformanceMapParam
instructionMasterHighPerformanceMapParam
clockFrequency50000000
deviceFamilyNameCYCLONEIVE
internalIrqMaskSystemInfo3
customInstSlavesSystemInfo<info/>
customInstSlavesSystemInfo_nios_a<info/>
customInstSlavesSystemInfo_nios_b<info/>
customInstSlavesSystemInfo_nios_c<info/>
deviceFeaturesSystemInfoADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1
AUTO_DEVICEEP4CE115F29C7
AUTO_DEVICE_SPEEDGRADE7
AUTO_CLK_CLOCK_DOMAIN1
AUTO_CLK_RESET_DOMAIN1
deviceFamilyUNKNOWN
generateLegacySimfalse
+
   + + + + +
+

Software Assignments

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
BIG_ENDIAN0
BREAK_ADDR0x00020820
CPU_ARCH_NIOS2_R1
CPU_FREQ50000000u
CPU_ID_SIZE1
CPU_ID_VALUE0x00000000
CPU_IMPLEMENTATION"tiny"
DATA_ADDR_WIDTH18
DCACHE_LINE_SIZE0
DCACHE_LINE_SIZE_LOG20
DCACHE_SIZE0
EXCEPTION_ADDR0x00000020
FLASH_ACCELERATOR_LINES0
FLASH_ACCELERATOR_LINE_SIZE0
FLUSHDA_SUPPORTED
HARDWARE_DIVIDE_PRESENT0
HARDWARE_MULTIPLY_PRESENT0
HARDWARE_MULX_PRESENT0
HAS_DEBUG_CORE1
HAS_DEBUG_STUB
HAS_ILLEGAL_INSTRUCTION_EXCEPTION
HAS_JMPI_INSTRUCTION
ICACHE_LINE_SIZE0
ICACHE_LINE_SIZE_LOG20
ICACHE_SIZE0
INST_ADDR_WIDTH18
OCI_VERSION1
RESET_ADDR0x00000000
+
+
+ +
+
+

jtag_uart

altera_avalon_jtag_uart v18.1 +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ cpu + data_master  jtag_uart
  avalon_jtag_slave
irq  
  irq
debug_reset_request  
  reset
+ clk + clk  
  clk
clk_reset  
  reset
+
+
+
+ + + + +
+

Parameters

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
allowMultipleConnectionsfalse
hubInstanceID0
readBufferDepth64
readIRQThreshold8
simInputCharacterStream
simInteractiveOptionsNO_INTERACTIVE_WINDOWS
useRegistersForReadBufferfalse
useRegistersForWriteBufferfalse
useRelativePathForSimFilefalse
writeBufferDepth64
writeIRQThreshold8
clkFreq50000000
avalonSpec2.0
legacySignalAllowfalse
enableInteractiveInputfalse
enableInteractiveOutputfalse
deviceFamilyUNKNOWN
generateLegacySimfalse
+
   + + + + +
+

Software Assignments

+ + + + + + + + + + + + + + + + + +
READ_DEPTH64
READ_THRESHOLD8
WRITE_DEPTH64
WRITE_THRESHOLD8
+
+
+ +
+
+

mem

altera_avalon_onchip_memory2 v18.1 +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ cpu + data_master  mem
  s2
instruction_master  
  s1
debug_reset_request  
  reset1
+ clk + clk  
  clk1
clk_reset  
  reset1
+
+
+
+ + + + +
+

Parameters

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
allowInSystemMemoryContentEditorfalse
blockTypeAUTO
dataWidth32
dataWidth232
dualPorttrue
enableDiffWidthfalse
derived_enableDiffWidthfalse
initMemContenttrue
initializationFileNameonchip_mem.hex
enPRInitModefalse
instanceIDNONE
memorySize131072
readDuringWriteModeDONT_CARE
simAllowMRAMContentsFilefalse
simMemInitOnlyFilename0
singleClockOperationtrue
derived_singleClockOperationtrue
slave1Latency1
slave2Latency1
useNonDefaultInitFilefalse
copyInitFilefalse
useShallowMemBlocksfalse
writabletrue
ecc_enabledfalse
resetrequest_enabledtrue
autoInitializationFileNameniosII_mem
deviceFamilyCYCLONEIVE
deviceFeaturesADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1
derived_set_addr_width15
derived_set_addr_width215
derived_set_data_width32
derived_set_data_width232
derived_gui_ram_block_typeAutomatic
derived_is_hardcopyfalse
derived_init_file_nameniosII_mem.hex
generateLegacySimfalse
+
   + + + + +
+

Software Assignments

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR0
ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE0
CONTENTS_INFO""
DUAL_PORT1
GUI_RAM_BLOCK_TYPEAUTO
INIT_CONTENTS_FILEniosII_mem
INIT_MEM_CONTENT1
INSTANCE_IDNONE
NON_DEFAULT_INIT_FILE_ENABLED0
RAM_BLOCK_TYPEAUTO
READ_DURING_WRITE_MODEDONT_CARE
SINGLE_CLOCK_OP1
SIZE_MULTIPLE1
SIZE_VALUE131072
WRITABLE1
+
+
+ +
+
+

sem

Semafor v1.0 +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ cpu + data_master  sem
  ctl_slave
data_master  
  ram_slave
debug_reset_request  
  reset_n
+ clk + clk  
  clock
clk_reset  
  reset_n
+
+
+
+ + + + +
+

Parameters

+ + + + + + + + + + + + + +
m8
deviceFamilyUNKNOWN
generateLegacySimfalse
+
   + + + + +
+

Software Assignments

(none)
+
+ +
+
+

sys_clk_timer

altera_avalon_timer v18.1 +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ cpu + data_master  sys_clk_timer
  s1
irq  
  irq
debug_reset_request  
  reset
+ clk + clk  
  clk
clk_reset  
  reset
+
+
+
+ + + + +
+

Parameters

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
alwaysRunfalse
counterSize32
fixedPeriodfalse
period1
periodUnitsMSEC
resetOutputfalse
snapshottrue
timeoutPulseOutputfalse
systemFrequency50000000
watchdogPulse2
timerPresetFULL_FEATURED
periodUnitsStringms
valueInSecond0.001
loadValue49999
mult0.001
ticksPerSec1000.0
slave_address_width3
deviceFamilyUNKNOWN
generateLegacySimfalse
+
   + + + + +
+

Software Assignments

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
ALWAYS_RUN0
COUNTER_SIZE32
FIXED_PERIOD0
FREQ50000000
LOAD_VALUE49999
MULT0.001
PERIOD1
PERIOD_UNITSms
RESET_OUTPUT0
SNAPSHOT1
TICKS_PER_SEC1000
TIMEOUT_PULSE_OUTPUT0
+
+
+ + + + + +
generation took 0,01 secondsrendering took 0,11 seconds
+ + diff --git a/Top/niosII/niosII.xml b/Top/niosII/niosII.xml new file mode 100644 index 0000000..ce1ee7a --- /dev/null +++ b/Top/niosII/niosII.xml @@ -0,0 +1,3481 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 0 starting:niosII "niosII" + + + + Transform: CustomInstructionTransform + No custom instruction connections, skipping transform + 6 modules, 25 connections]]> + Transform: MMTransform + Transform: InitialInterconnectTransform + 6 modules, 23 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + + + + + + + + + + + + + + + + + + + + + + + + + + + + 15 modules, 59 connections]]> + Transform: IDPadTransform + Transform: DomainTransform + Transform merlin_domain_transform not run on matched interfaces cpu.data_master and cpu_data_master_translator.avalon_anti_master_0 + Transform merlin_domain_transform not run on matched interfaces cpu.instruction_master and cpu_instruction_master_translator.avalon_anti_master_0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Transform merlin_domain_transform not run on matched interfaces jtag_uart_avalon_jtag_slave_translator.avalon_anti_slave_0 and jtag_uart.avalon_jtag_slave + Transform merlin_domain_transform not run on matched interfaces sem_ctl_slave_translator.avalon_anti_slave_0 and sem.ctl_slave + Transform merlin_domain_transform not run on matched interfaces cpu_debug_mem_slave_translator.avalon_anti_slave_0 and cpu.debug_mem_slave + Transform merlin_domain_transform not run on matched interfaces sem_ram_slave_translator.avalon_anti_slave_0 and sem.ram_slave + Transform merlin_domain_transform not run on matched interfaces sys_clk_timer_s1_translator.avalon_anti_slave_0 and sys_clk_timer.s1 + Transform merlin_domain_transform not run on matched interfaces mem_s2_translator.avalon_anti_slave_0 and mem.s2 + Transform merlin_domain_transform not run on matched interfaces mem_s1_translator.avalon_anti_slave_0 and mem.s1 + 32 modules, 174 connections]]> + Transform: RouterTransform + + + + + + + + + + + + + + + + + + + + + + + + + + + + 41 modules, 210 connections]]> + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 58 modules, 253 connections]]> + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + + + + + + + 60 modules, 312 connections]]> + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + + + + 7 modules, 29 connections]]> + 7 modules, 29 connections]]> + Transform: InterruptMapperTransform + + + + 8 modules, 33 connections]]> + Transform: InterruptSyncTransform + Transform: InterruptFanoutTransform + Transform: AvalonStreamingTransform + Transform: ResetAdaptation + + + + + + + 10 modules, 35 connections]]> + niosII" reuses altera_nios2_gen2 "submodules/niosII_cpu"]]> + niosII" reuses altera_avalon_jtag_uart "submodules/niosII_jtag_uart"]]> + niosII" reuses altera_avalon_onchip_memory2 "submodules/niosII_mem"]]> + niosII" reuses Semafor "submodules/dec"]]> + niosII" reuses altera_avalon_timer "submodules/niosII_sys_clk_timer"]]> + niosII" reuses altera_mm_interconnect "submodules/niosII_mm_interconnect_0"]]> + niosII" reuses altera_irq_mapper "submodules/niosII_irq_mapper"]]> + niosII" reuses altera_reset_controller "submodules/altera_reset_controller"]]> + queue size: 7 starting:altera_nios2_gen2 "submodules/niosII_cpu" + + + + Transform: CustomInstructionTransform + No custom instruction connections, skipping transform + 3 modules, 3 connections]]> + Transform: MMTransform + Transform: InterruptMapperTransform + Transform: InterruptSyncTransform + Transform: InterruptFanoutTransform + Transform: AvalonStreamingTransform + Transform: ResetAdaptation + cpu" reuses altera_nios2_gen2_unit "submodules/niosII_cpu_cpu"]]> + niosII" instantiated altera_nios2_gen2 "cpu"]]> + queue size: 59 starting:altera_nios2_gen2_unit "submodules/niosII_cpu_cpu" + Starting RTL generation for module 'niosII_cpu_cpu' + Generation command is [exec C:/Software/intelFPGA_lite/18.1/quartus/bin64//eperlcmd.exe -I C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=niosII_cpu_cpu --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0009_cpu_gen/ --quartus_bindir=C:/Software/intelFPGA_lite/18.1/quartus/bin64/ --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0009_cpu_gen//niosII_cpu_cpu_processor_configuration.pl --do_build_sim=0 ] + # 2022.10.19 13:21:19 (*) Starting Nios II generation + # 2022.10.19 13:21:19 (*) Checking for plaintext license. + # 2022.10.19 13:21:20 (*) Couldn't query license setup in Quartus directory C:/Software/intelFPGA_lite/18.1/quartus/bin64/ + # 2022.10.19 13:21:20 (*) Defaulting to contents of LM_LICENSE_FILE environment variable + # 2022.10.19 13:21:20 (*) LM_LICENSE_FILE environment variable is empty + # 2022.10.19 13:21:20 (*) Plaintext license not found. + # 2022.10.19 13:21:20 (*) No license required to generate encrypted Nios II/e. + # 2022.10.19 13:21:20 (*) Elaborating CPU configuration settings + # 2022.10.19 13:21:20 (*) Creating all objects for CPU + # 2022.10.19 13:21:22 (*) Generating RTL from CPU objects + # 2022.10.19 13:21:22 (*) Creating plain-text RTL + # 2022.10.19 13:21:23 (*) Done Nios II generation + Done RTL generation for module 'niosII_cpu_cpu' + cpu" instantiated altera_nios2_gen2_unit "cpu"]]> + queue size: 7 starting:altera_avalon_jtag_uart "submodules/niosII_jtag_uart" + Starting RTL generation for module 'niosII_jtag_uart' + Generation command is [exec C:/software/intelfpga_lite/18.1/quartus/bin64/perl/bin/perl.exe -I C:/software/intelfpga_lite/18.1/quartus/bin64/perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/generate_rtl.pl --name=niosII_jtag_uart --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0003_jtag_uart_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0003_jtag_uart_gen//niosII_jtag_uart_component_configuration.pl --do_build_sim=0 ] + Done RTL generation for module 'niosII_jtag_uart' + niosII" instantiated altera_avalon_jtag_uart "jtag_uart"]]> + queue size: 6 starting:altera_avalon_onchip_memory2 "submodules/niosII_mem" + Starting RTL generation for module 'niosII_mem' + Generation command is [exec C:/software/intelfpga_lite/18.1/quartus/bin64/perl/bin/perl.exe -I C:/software/intelfpga_lite/18.1/quartus/bin64/perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=niosII_mem --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0004_mem_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0004_mem_gen//niosII_mem_component_configuration.pl --do_build_sim=0 ] + Done RTL generation for module 'niosII_mem' + niosII" instantiated altera_avalon_onchip_memory2 "mem"]]> + queue size: 5 starting:Semafor "submodules/dec" + niosII" instantiated Semafor "sem"]]> + queue size: 4 starting:altera_avalon_timer "submodules/niosII_sys_clk_timer" + Starting RTL generation for module 'niosII_sys_clk_timer' + Generation command is [exec C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/bin/perl.exe -I C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer/generate_rtl.pl --name=niosII_sys_clk_timer --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0006_sys_clk_timer_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0006_sys_clk_timer_gen//niosII_sys_clk_timer_component_configuration.pl --do_build_sim=0 ] + Done RTL generation for module 'niosII_sys_clk_timer' + niosII" instantiated altera_avalon_timer "sys_clk_timer"]]> + queue size: 3 starting:altera_mm_interconnect "submodules/niosII_mm_interconnect_0" + + + + Transform: CustomInstructionTransform + No custom instruction connections, skipping transform + 54 modules, 178 connections]]> + Transform: MMTransform + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InterruptMapperTransform + Transform: InterruptSyncTransform + Transform: InterruptFanoutTransform + Transform: AvalonStreamingTransform + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.001s + Timing: ELA:2/0.001s/0.002s + Timing: ELA:1/0.013s + Timing: COM:3/0.080s/0.119s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.002s + Timing: ELA:2/0.001s/0.002s + Timing: ELA:1/0.012s + Timing: COM:3/0.028s/0.032s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.001s/0.001s + Timing: ELA:1/0.010s + Timing: COM:3/0.023s/0.028s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.001s/0.002s + Timing: ELA:1/0.010s + Timing: COM:3/0.025s/0.033s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.001s/0.002s + Timing: ELA:1/0.013s + Timing: COM:3/0.022s/0.028s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.001s/0.002s + Timing: ELA:1/0.013s + Timing: COM:3/0.021s/0.025s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.001s/0.001s + Timing: ELA:1/0.014s + Timing: COM:3/0.032s/0.050s + 61 modules, 199 connections]]> + Transform: ResetAdaptation + mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> + mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> + mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_001"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_004"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_008"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux_002"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux_001"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + niosII" instantiated altera_mm_interconnect "mm_interconnect_0"]]> + queue size: 58 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" + mm_interconnect_0" instantiated altera_merlin_master_translator "cpu_data_master_translator"]]> + queue size: 56 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" + mm_interconnect_0" instantiated altera_merlin_slave_translator "jtag_uart_avalon_jtag_slave_translator"]]> + queue size: 49 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" + mm_interconnect_0" instantiated altera_merlin_master_agent "cpu_data_master_agent"]]> + queue size: 47 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" + mm_interconnect_0" instantiated altera_merlin_slave_agent "jtag_uart_avalon_jtag_slave_agent"]]> + queue size: 46 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" + mm_interconnect_0" instantiated altera_avalon_sc_fifo "jtag_uart_avalon_jtag_slave_agent_rsp_fifo"]]> + queue size: 33 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router" + mm_interconnect_0" instantiated altera_merlin_router "router"]]> + queue size: 32 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_001" + mm_interconnect_0" instantiated altera_merlin_router "router_001"]]> + queue size: 31 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002" + mm_interconnect_0" instantiated altera_merlin_router "router_002"]]> + queue size: 29 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_004" + mm_interconnect_0" instantiated altera_merlin_router "router_004"]]> + queue size: 25 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_008" + mm_interconnect_0" instantiated altera_merlin_router "router_008"]]> + queue size: 24 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux" + mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux"]]> + queue size: 23 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001" + mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux_001"]]> + queue size: 22 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux" + mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux"]]> + queue size: 20 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux_002" + mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux_002"]]> + C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 15 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux" + mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux"]]> + queue size: 8 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux" + mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux"]]> + C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 7 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux_001" + mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux_001"]]> + C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 6 starting:altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter" + + + + Transform: CustomInstructionTransform + No custom instruction connections, skipping transform + 3 modules, 3 connections]]> + Transform: MMTransform + Transform: InterruptMapperTransform + Transform: InterruptSyncTransform + Transform: InterruptFanoutTransform + Transform: AvalonStreamingTransform + Transform: ResetAdaptation + avalon_st_adapter" reuses error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0"]]> + mm_interconnect_0" instantiated altera_avalon_st_adapter "avalon_st_adapter"]]> + queue size: 0 starting:error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" + avalon_st_adapter" instantiated error_adapter "error_adapter_0"]]> + queue size: 61 starting:altera_irq_mapper "submodules/niosII_irq_mapper" + niosII" instantiated altera_irq_mapper "irq_mapper"]]> + queue size: 60 starting:altera_reset_controller "submodules/altera_reset_controller" + niosII" instantiated altera_reset_controller "rst_controller"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 7 starting:altera_nios2_gen2 "submodules/niosII_cpu" + + + + Transform: CustomInstructionTransform + No custom instruction connections, skipping transform + 3 modules, 3 connections]]> + Transform: MMTransform + Transform: InterruptMapperTransform + Transform: InterruptSyncTransform + Transform: InterruptFanoutTransform + Transform: AvalonStreamingTransform + Transform: ResetAdaptation + cpu" reuses altera_nios2_gen2_unit "submodules/niosII_cpu_cpu"]]> + niosII" instantiated altera_nios2_gen2 "cpu"]]> + queue size: 59 starting:altera_nios2_gen2_unit "submodules/niosII_cpu_cpu" + Starting RTL generation for module 'niosII_cpu_cpu' + Generation command is [exec C:/Software/intelFPGA_lite/18.1/quartus/bin64//eperlcmd.exe -I C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=niosII_cpu_cpu --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0009_cpu_gen/ --quartus_bindir=C:/Software/intelFPGA_lite/18.1/quartus/bin64/ --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0009_cpu_gen//niosII_cpu_cpu_processor_configuration.pl --do_build_sim=0 ] + # 2022.10.19 13:21:19 (*) Starting Nios II generation + # 2022.10.19 13:21:19 (*) Checking for plaintext license. + # 2022.10.19 13:21:20 (*) Couldn't query license setup in Quartus directory C:/Software/intelFPGA_lite/18.1/quartus/bin64/ + # 2022.10.19 13:21:20 (*) Defaulting to contents of LM_LICENSE_FILE environment variable + # 2022.10.19 13:21:20 (*) LM_LICENSE_FILE environment variable is empty + # 2022.10.19 13:21:20 (*) Plaintext license not found. + # 2022.10.19 13:21:20 (*) No license required to generate encrypted Nios II/e. + # 2022.10.19 13:21:20 (*) Elaborating CPU configuration settings + # 2022.10.19 13:21:20 (*) Creating all objects for CPU + # 2022.10.19 13:21:22 (*) Generating RTL from CPU objects + # 2022.10.19 13:21:22 (*) Creating plain-text RTL + # 2022.10.19 13:21:23 (*) Done Nios II generation + Done RTL generation for module 'niosII_cpu_cpu' + cpu" instantiated altera_nios2_gen2_unit "cpu"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 7 starting:altera_avalon_jtag_uart "submodules/niosII_jtag_uart" + Starting RTL generation for module 'niosII_jtag_uart' + Generation command is [exec C:/software/intelfpga_lite/18.1/quartus/bin64/perl/bin/perl.exe -I C:/software/intelfpga_lite/18.1/quartus/bin64/perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/generate_rtl.pl --name=niosII_jtag_uart --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0003_jtag_uart_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0003_jtag_uart_gen//niosII_jtag_uart_component_configuration.pl --do_build_sim=0 ] + Done RTL generation for module 'niosII_jtag_uart' + niosII" instantiated altera_avalon_jtag_uart "jtag_uart"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 6 starting:altera_avalon_onchip_memory2 "submodules/niosII_mem" + Starting RTL generation for module 'niosII_mem' + Generation command is [exec C:/software/intelfpga_lite/18.1/quartus/bin64/perl/bin/perl.exe -I C:/software/intelfpga_lite/18.1/quartus/bin64/perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=niosII_mem --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0004_mem_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0004_mem_gen//niosII_mem_component_configuration.pl --do_build_sim=0 ] + Done RTL generation for module 'niosII_mem' + niosII" instantiated altera_avalon_onchip_memory2 "mem"]]> + + + + + + + + + + + + + + + + queue size: 5 starting:Semafor "submodules/dec" + niosII" instantiated Semafor "sem"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 4 starting:altera_avalon_timer "submodules/niosII_sys_clk_timer" + Starting RTL generation for module 'niosII_sys_clk_timer' + Generation command is [exec C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/bin/perl.exe -I C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer/generate_rtl.pl --name=niosII_sys_clk_timer --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0006_sys_clk_timer_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0006_sys_clk_timer_gen//niosII_sys_clk_timer_component_configuration.pl --do_build_sim=0 ] + Done RTL generation for module 'niosII_sys_clk_timer' + niosII" instantiated altera_avalon_timer "sys_clk_timer"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 3 starting:altera_mm_interconnect "submodules/niosII_mm_interconnect_0" + + + + Transform: CustomInstructionTransform + No custom instruction connections, skipping transform + 54 modules, 178 connections]]> + Transform: MMTransform + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 54 modules, 178 connections]]> + Transform: InterruptMapperTransform + Transform: InterruptSyncTransform + Transform: InterruptFanoutTransform + Transform: AvalonStreamingTransform + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.001s + Timing: ELA:2/0.001s/0.002s + Timing: ELA:1/0.013s + Timing: COM:3/0.080s/0.119s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.002s + Timing: ELA:2/0.001s/0.002s + Timing: ELA:1/0.012s + Timing: COM:3/0.028s/0.032s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.001s/0.001s + Timing: ELA:1/0.010s + Timing: COM:3/0.023s/0.028s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.001s/0.002s + Timing: ELA:1/0.010s + Timing: COM:3/0.025s/0.033s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.001s/0.002s + Timing: ELA:1/0.013s + Timing: COM:3/0.022s/0.028s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.001s/0.002s + Timing: ELA:1/0.013s + Timing: COM:3/0.021s/0.025s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.001s/0.001s + Timing: ELA:1/0.014s + Timing: COM:3/0.032s/0.050s + 61 modules, 199 connections]]> + Transform: ResetAdaptation + mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> + mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> + mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_001"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_004"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_008"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux_002"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux_001"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> + niosII" instantiated altera_mm_interconnect "mm_interconnect_0"]]> + queue size: 58 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" + mm_interconnect_0" instantiated altera_merlin_master_translator "cpu_data_master_translator"]]> + queue size: 56 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" + mm_interconnect_0" instantiated altera_merlin_slave_translator "jtag_uart_avalon_jtag_slave_translator"]]> + queue size: 49 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" + mm_interconnect_0" instantiated altera_merlin_master_agent "cpu_data_master_agent"]]> + queue size: 47 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" + mm_interconnect_0" instantiated altera_merlin_slave_agent "jtag_uart_avalon_jtag_slave_agent"]]> + queue size: 46 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" + mm_interconnect_0" instantiated altera_avalon_sc_fifo "jtag_uart_avalon_jtag_slave_agent_rsp_fifo"]]> + queue size: 33 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router" + mm_interconnect_0" instantiated altera_merlin_router "router"]]> + queue size: 32 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_001" + mm_interconnect_0" instantiated altera_merlin_router "router_001"]]> + queue size: 31 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002" + mm_interconnect_0" instantiated altera_merlin_router "router_002"]]> + queue size: 29 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_004" + mm_interconnect_0" instantiated altera_merlin_router "router_004"]]> + queue size: 25 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_008" + mm_interconnect_0" instantiated altera_merlin_router "router_008"]]> + queue size: 24 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux" + mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux"]]> + queue size: 23 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001" + mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux_001"]]> + queue size: 22 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux" + mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux"]]> + queue size: 20 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux_002" + mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux_002"]]> + C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 15 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux" + mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux"]]> + queue size: 8 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux" + mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux"]]> + C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 7 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux_001" + mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux_001"]]> + C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 6 starting:altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter" + + + + Transform: CustomInstructionTransform + No custom instruction connections, skipping transform + 3 modules, 3 connections]]> + Transform: MMTransform + Transform: InterruptMapperTransform + Transform: InterruptSyncTransform + Transform: InterruptFanoutTransform + Transform: AvalonStreamingTransform + Transform: ResetAdaptation + avalon_st_adapter" reuses error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0"]]> + mm_interconnect_0" instantiated altera_avalon_st_adapter "avalon_st_adapter"]]> + queue size: 0 starting:error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" + avalon_st_adapter" instantiated error_adapter "error_adapter_0"]]> + + + + + + + + + + + + + + + + + + queue size: 61 starting:altera_irq_mapper "submodules/niosII_irq_mapper" + niosII" instantiated altera_irq_mapper "irq_mapper"]]> + + + + + + + + + + + + + + + + queue size: 60 starting:altera_reset_controller "submodules/altera_reset_controller" + niosII" instantiated altera_reset_controller "rst_controller"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 59 starting:altera_nios2_gen2_unit "submodules/niosII_cpu_cpu" + Starting RTL generation for module 'niosII_cpu_cpu' + Generation command is [exec C:/Software/intelFPGA_lite/18.1/quartus/bin64//eperlcmd.exe -I C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=niosII_cpu_cpu --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0009_cpu_gen/ --quartus_bindir=C:/Software/intelFPGA_lite/18.1/quartus/bin64/ --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9284_1154445688588331824.dir/0009_cpu_gen//niosII_cpu_cpu_processor_configuration.pl --do_build_sim=0 ] + # 2022.10.19 13:21:19 (*) Starting Nios II generation + # 2022.10.19 13:21:19 (*) Checking for plaintext license. + # 2022.10.19 13:21:20 (*) Couldn't query license setup in Quartus directory C:/Software/intelFPGA_lite/18.1/quartus/bin64/ + # 2022.10.19 13:21:20 (*) Defaulting to contents of LM_LICENSE_FILE environment variable + # 2022.10.19 13:21:20 (*) LM_LICENSE_FILE environment variable is empty + # 2022.10.19 13:21:20 (*) Plaintext license not found. + # 2022.10.19 13:21:20 (*) No license required to generate encrypted Nios II/e. + # 2022.10.19 13:21:20 (*) Elaborating CPU configuration settings + # 2022.10.19 13:21:20 (*) Creating all objects for CPU + # 2022.10.19 13:21:22 (*) Generating RTL from CPU objects + # 2022.10.19 13:21:22 (*) Creating plain-text RTL + # 2022.10.19 13:21:23 (*) Done Nios II generation + Done RTL generation for module 'niosII_cpu_cpu' + cpu" instantiated altera_nios2_gen2_unit "cpu"]]> + + + + + + + + + + + + + + + queue size: 58 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" + mm_interconnect_0" instantiated altera_merlin_master_translator "cpu_data_master_translator"]]> + + + + + + + + + + + + + + queue size: 56 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" + mm_interconnect_0" instantiated altera_merlin_slave_translator "jtag_uart_avalon_jtag_slave_translator"]]> + + + + + + + + + + + + + + queue size: 49 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" + mm_interconnect_0" instantiated altera_merlin_master_agent "cpu_data_master_agent"]]> + + + + + + + + + + + + + + + queue size: 47 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" + mm_interconnect_0" instantiated altera_merlin_slave_agent "jtag_uart_avalon_jtag_slave_agent"]]> + + + + + + + + + + + + + + + + + queue size: 46 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" + mm_interconnect_0" instantiated altera_avalon_sc_fifo "jtag_uart_avalon_jtag_slave_agent_rsp_fifo"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 33 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router" + mm_interconnect_0" instantiated altera_merlin_router "router"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 32 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_001" + mm_interconnect_0" instantiated altera_merlin_router "router_001"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 31 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002" + mm_interconnect_0" instantiated altera_merlin_router "router_002"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 29 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_004" + mm_interconnect_0" instantiated altera_merlin_router "router_004"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 25 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_008" + mm_interconnect_0" instantiated altera_merlin_router "router_008"]]> + + + + + + + + + + + + + + + + + + + + + queue size: 24 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux" + mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux"]]> + + + + + + + + + + + + + + + + + + + + + queue size: 23 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001" + mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux_001"]]> + + + + + + + + + + + + + + + + + + + + + + + + queue size: 22 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux" + mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux"]]> + + + + + + + + + + + + + + + + + + + + + + + + queue size: 20 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux_002" + mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux_002"]]> + C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> + + + + + + + + + + + + + + + + + + + + + queue size: 15 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux" + mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux"]]> + + + + + + + + + + + + + + + + + + + + + + + + queue size: 8 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux" + mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux"]]> + C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> + + + + + + + + + + + + + + + + + + + + + + + + queue size: 7 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux_001" + mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux_001"]]> + C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 6 starting:altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter" + + + + Transform: CustomInstructionTransform + No custom instruction connections, skipping transform + 3 modules, 3 connections]]> + Transform: MMTransform + Transform: InterruptMapperTransform + Transform: InterruptSyncTransform + Transform: InterruptFanoutTransform + Transform: AvalonStreamingTransform + Transform: ResetAdaptation + avalon_st_adapter" reuses error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0"]]> + mm_interconnect_0" instantiated altera_avalon_st_adapter "avalon_st_adapter"]]> + queue size: 0 starting:error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" + avalon_st_adapter" instantiated error_adapter "error_adapter_0"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 0 starting:error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" + avalon_st_adapter" instantiated error_adapter "error_adapter_0"]]> + + + diff --git a/Top/niosII/niosII_bb.v b/Top/niosII/niosII_bb.v index f0caec8..6d92710 100644 --- a/Top/niosII/niosII_bb.v +++ b/Top/niosII/niosII_bb.v @@ -1,8 +1,16 @@ module niosII ( clk_clk, - reset_reset_n); + reset_reset_n, + sem_export_train, + sem_export_red, + sem_export_yellow, + sem_export_green); input clk_clk; input reset_reset_n; + input sem_export_train; + output sem_export_red; + output sem_export_yellow; + output sem_export_green; endmodule diff --git a/Top/niosII/niosII_inst.v b/Top/niosII/niosII_inst.v index 0481f04..77513fe 100644 --- a/Top/niosII/niosII_inst.v +++ b/Top/niosII/niosII_inst.v @@ -1,5 +1,9 @@ niosII u0 ( - .clk_clk (), // clk.clk - .reset_reset_n () // reset.reset_n + .clk_clk (), // clk.clk + .reset_reset_n (), // reset.reset_n + .sem_export_train (), // sem_export.train + .sem_export_red (), // .red + .sem_export_yellow (), // .yellow + .sem_export_green () // .green ); diff --git a/Top/niosII/niosII_inst.vhd b/Top/niosII/niosII_inst.vhd index ec27602..a97848d 100644 --- a/Top/niosII/niosII_inst.vhd +++ b/Top/niosII/niosII_inst.vhd @@ -1,13 +1,21 @@ component niosII is port ( - clk_clk : in std_logic := 'X'; -- clk - reset_reset_n : in std_logic := 'X' -- reset_n + clk_clk : in std_logic := 'X'; -- clk + reset_reset_n : in std_logic := 'X'; -- reset_n + sem_export_train : in std_logic := 'X'; -- train + sem_export_red : out std_logic; -- red + sem_export_yellow : out std_logic; -- yellow + sem_export_green : out std_logic -- green ); end component niosII; u0 : component niosII port map ( - clk_clk => CONNECTED_TO_clk_clk, -- clk.clk - reset_reset_n => CONNECTED_TO_reset_reset_n -- reset.reset_n + clk_clk => CONNECTED_TO_clk_clk, -- clk.clk + reset_reset_n => CONNECTED_TO_reset_reset_n, -- reset.reset_n + sem_export_train => CONNECTED_TO_sem_export_train, -- sem_export.train + sem_export_red => CONNECTED_TO_sem_export_red, -- .red + sem_export_yellow => CONNECTED_TO_sem_export_yellow, -- .yellow + sem_export_green => CONNECTED_TO_sem_export_green -- .green ); diff --git a/Top/niosII/synthesis/niosII.debuginfo b/Top/niosII/synthesis/niosII.debuginfo new file mode 100644 index 0000000..7d0beb1 --- /dev/null +++ b/Top/niosII/synthesis/niosII.debuginfo @@ -0,0 +1,12929 @@ + + + + + + + com.altera.sopcmodel.ensemble.EClockAdapter + HANDSHAKE + false + true + true + true + + + java.lang.String + EP4CE115F29C7 + false + true + true + true + + + java.lang.String + CYCLONEIVE + false + true + true + true + + + java.lang.String + 7 + false + true + false + true + + + com.altera.sopcmodel.ensemble.Ensemble$EFabricMode + QSYS + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 1666174853 + false + true + true + true + + + boolean + false + false + true + false + true + + + com.altera.entityinterfaces.moduleext.IModuleGenerateHDL$HDLLanguage + VERILOG + false + false + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.definition.BoundaryDefinition + + false + true + false + true + + + int + 1 + false + true + true + true + + + java.lang.String + semafor.qpf + false + true + false + true + + + boolean + false + false + true + false + true + + + long + 0 + false + true + false + true + + + java.lang.String + + false + true + false + true + + + long + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + + + long + 50000000 + false + true + true + true + + + boolean + true + false + true + true + true + + + long + 0 + false + true + false + true + CLOCK_RATE + clk_in + + + com.altera.sopcmodel.reset.Reset$Edges + NONE + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + qsys.ui.export_name + clk + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.Boolean + true + true + true + false + true + + + java.lang.Long + 50000000 + true + true + false + true + + clock + false + + in_clk + Input + 1 + clk + + + + + + qsys.ui.export_name + reset + + + java.lang.String + + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + NONE + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset_n + Input + 1 + reset_n + + + + + + java.lang.String + clk_in + false + true + true + true + + + long + 50000000 + false + true + true + true + + + boolean + true + false + true + true + true + + + boolean + true + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + true + + clk_out + Output + 1 + clk + + + false + cpu + clk + cpu.clk + + + false + jtag_uart + clk + jtag_uart.clk + + + false + sys_clk_timer + clk + sys_clk_timer.clk + + + false + mem + clk1 + mem.clk1 + + + false + sem + clock + sem.clock + + + false + mm_interconnect_0 + clk_clk + mm_interconnect_0.clk_clk + + + false + irq_mapper + clk + irq_mapper.clk + + + false + rst_controller + clk + rst_controller.clk + + + false + rst_translator + clk + rst_translator.clk + + + + + + java.lang.String + + false + true + true + true + + + java.lang.String + clk_in_reset + false + true + true + true + + + [Ljava.lang.String; + clk_in_reset + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + NONE + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + true + + reset_n_out + Output + 1 + reset_n + + + + + + + debug.hostConnection + type jtag id 70:34|110:135 + + + embeddedsw.CMacro.BIG_ENDIAN + 0 + + + embeddedsw.CMacro.BREAK_ADDR + 0x00020820 + + + embeddedsw.CMacro.CPU_ARCH_NIOS2_R1 + + + + embeddedsw.CMacro.CPU_FREQ + 50000000u + + + embeddedsw.CMacro.CPU_ID_SIZE + 1 + + + embeddedsw.CMacro.CPU_ID_VALUE + 0x00000000 + + + embeddedsw.CMacro.CPU_IMPLEMENTATION + "tiny" + + + embeddedsw.CMacro.DATA_ADDR_WIDTH + 18 + + + embeddedsw.CMacro.DCACHE_LINE_SIZE + 0 + + + embeddedsw.CMacro.DCACHE_LINE_SIZE_LOG2 + 0 + + + embeddedsw.CMacro.DCACHE_SIZE + 0 + + + embeddedsw.CMacro.EXCEPTION_ADDR + 0x00000020 + + + embeddedsw.CMacro.FLASH_ACCELERATOR_LINES + 0 + + + embeddedsw.CMacro.FLASH_ACCELERATOR_LINE_SIZE + 0 + + + embeddedsw.CMacro.FLUSHDA_SUPPORTED + + + + embeddedsw.CMacro.HARDWARE_DIVIDE_PRESENT + 0 + + + embeddedsw.CMacro.HARDWARE_MULTIPLY_PRESENT + 0 + + + embeddedsw.CMacro.HARDWARE_MULX_PRESENT + 0 + + + embeddedsw.CMacro.HAS_DEBUG_CORE + 1 + + + embeddedsw.CMacro.HAS_DEBUG_STUB + + + + embeddedsw.CMacro.HAS_ILLEGAL_INSTRUCTION_EXCEPTION + + + + embeddedsw.CMacro.HAS_JMPI_INSTRUCTION + + + + embeddedsw.CMacro.ICACHE_LINE_SIZE + 0 + + + embeddedsw.CMacro.ICACHE_LINE_SIZE_LOG2 + 0 + + + embeddedsw.CMacro.ICACHE_SIZE + 0 + + + embeddedsw.CMacro.INST_ADDR_WIDTH + 18 + + + embeddedsw.CMacro.OCI_VERSION + 1 + + + embeddedsw.CMacro.RESET_ADDR + 0x00000000 + + + embeddedsw.configuration.DataCacheVictimBufImpl + ram + + + embeddedsw.configuration.HDLSimCachesCleared + 1 + + + embeddedsw.configuration.breakOffset + 32 + + + embeddedsw.configuration.breakSlave + cpu.debug_mem_slave + + + embeddedsw.configuration.cpuArchitecture + Nios II + + + embeddedsw.configuration.exceptionOffset + 32 + + + embeddedsw.configuration.exceptionSlave + mem.s1 + + + embeddedsw.configuration.resetOffset + 0 + + + embeddedsw.configuration.resetSlave + mem.s1 + + + embeddedsw.dts.compatible + altr,nios2-1.1 + + + embeddedsw.dts.group + cpu + + + embeddedsw.dts.name + nios2 + + + embeddedsw.dts.params.altr,exception-addr + 0x00000020 + + + embeddedsw.dts.params.altr,implementation + "tiny" + + + embeddedsw.dts.params.altr,reset-addr + 0x00000000 + + + embeddedsw.dts.params.clock-frequency + 50000000u + + + embeddedsw.dts.params.dcache-line-size + 0 + + + embeddedsw.dts.params.dcache-size + 0 + + + embeddedsw.dts.params.icache-line-size + 0 + + + embeddedsw.dts.params.icache-size + 0 + + + embeddedsw.dts.vendor + altr + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + false + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false 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+ false + true + false + true + + + java.lang.String + Internal + false + false + true + true + + + java.lang.String + Dynamic + false + false + true + true + + + int + 8 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + true + true + false + true + + + java.lang.String + medium_le_shift + true + true + false + true + + + java.lang.String + no_mul + true + true + false + true + + + int + 0 + false + false + true + true + + + int + 2 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + false + true + true + + + java.lang.String + no_div + false + false + true + true + + + int + 12 + false + false + true + true + + + int + 12 + false + false + true + true + + + int + 4 + false + false + true + true + + + int + 6 + false + false + true + true + + + int + 7 + false + false + true + true + + + int + 16 + false + false + true + true + + + int + 8 + false + false + true + true + + + java.lang.String + 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false + true + true + + + java.lang.String + none + false + false + true + true + + + java.lang.String + onchip_trace + false + false + true + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + long + 0 + false + true + false + true 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+ false + true + + + boolean + false + true + true + false + true + + + boolean + false + true + true + false + true + + + boolean + false + true + true + false + true + + + boolean + false + true + true + false + true + + + int + 18 + false + true + false + true + ADDRESS_WIDTH + instruction_master + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + flash_instruction_master + + + int + 18 + false + true + false + true + ADDRESS_WIDTH + data_master + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_data_master_0 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_data_master_1 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_data_master_2 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_data_master_3 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_instruction_master_0 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_instruction_master_1 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_instruction_master_2 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + tightly_coupled_instruction_master_3 + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + data_master_high_performance + + + int + 1 + false + true + false + true + ADDRESS_WIDTH + instruction_master_high_performance + + + java.lang.String + ]]> + false + true + false + true + ADDRESS_MAP + instruction_master + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + flash_instruction_master + + + java.lang.String + ]]> + false + true + false + true + ADDRESS_MAP + data_master + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_data_master_0 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_data_master_1 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_data_master_2 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_data_master_3 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_instruction_master_0 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_instruction_master_1 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_instruction_master_2 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + tightly_coupled_instruction_master_3 + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + data_master_high_performance + + + java.lang.String + + false + true + false + true + ADDRESS_MAP + instruction_master_high_performance + + + long + 50000000 + false + true + false + true + CLOCK_RATE + clk + + + java.lang.String + CYCLONEIVE + false + true + false + true + DEVICE_FAMILY + + + long + 3 + false + true + false + true + INTERRUPTS_USED + irq + + + java.lang.String + ]]> + false + true + false + true + CUSTOM_INSTRUCTION_SLAVES + custom_instruction_master + + + java.lang.String + ]]> + false + true + false + true + CUSTOM_INSTRUCTION_SLAVES + custom_instruction_master_a + + + java.lang.String + ]]> + false + true + false + true + CUSTOM_INSTRUCTION_SLAVES + custom_instruction_master_b + + + java.lang.String + ]]> + false + true + false + true + CUSTOM_INSTRUCTION_SLAVES + custom_instruction_master_c + + + java.lang.String + ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 + false + true + false + true + DEVICE_FEATURES + + + java.lang.String + EP4CE115F29C7 + false + true + false + true + DEVICE + + + java.lang.String + 7 + false + true + false + true + DEVICE_SPEEDGRADE + + + java.lang.Integer + 1 + false + true + false + true + CLOCK_DOMAIN + clk + + + java.lang.Integer + 1 + false + true + false + true + RESET_DOMAIN + clk + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.Boolean + true + true + true + false + true + + + java.lang.Long + 50000000 + true + true + false + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset_n + Input + 1 + reset_n + + + reset_req + Input + 1 + reset_req + + + + + + debug.providesServices + master + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 1 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + SYMBOLS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + reset + false + true + true + true + + + int + 8 + false + true + false + true + + + boolean + true + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + false + true + + + int + 0 + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + d_address + Output + 18 + address + + + d_byteenable + Output + 4 + byteenable + + + d_read + Output + 1 + read + + + d_readdata + Input + 32 + readdata + + + d_waitrequest + Input + 1 + waitrequest + + + d_write + Output + 1 + write + + + d_writedata + Output + 32 + writedata + + + debug_mem_slave_debugaccess_to_roms + Output + 1 + debugaccess + + + false + mm_interconnect_0 + cpu_data_master + mm_interconnect_0.cpu_data_master + 0 + 262144 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 1 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + SYMBOLS + false + true + true + true + + + boolean + true + false + true + false + true + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + reset + false + true + true + true + + + int + 8 + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + false + true + + + int + 0 + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + i_address + Output + 18 + address + + + i_read + Output + 1 + read + + + i_readdata + Input + 32 + readdata + + + i_waitrequest + Input + 1 + waitrequest + + + false + mm_interconnect_0 + cpu_instruction_master + mm_interconnect_0.cpu_instruction_master + 0 + 262144 + + + + + + com.altera.entityinterfaces.IConnectionPoint + cpu.data_master + false + true + true + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + reset + false + true + false + true + + + java.lang.String + + false + true + false + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + INDIVIDUAL_REQUESTS + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + true + + irq + Input + 32 + irq + + + false + irq_mapper + sender + irq_mapper.sender + 0 + + + + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + + false + true + true + true + + + [Ljava.lang.String; + none + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + true + + debug_reset_request + Output + 1 + reset + + + + + + embeddedsw.configuration.hideDevice + 1 + + + qsys.ui.connect + instruction_master,data_master + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + true + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 2048 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + reset + false + true + false + true + + + int + 8 + false + true + false + true + + + java.math.BigInteger + 0 + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + true + true + true + + + boolean + true + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + debug_mem_slave_address + Input + 9 + address + + + debug_mem_slave_byteenable + Input + 4 + byteenable + + + debug_mem_slave_debugaccess + Input + 1 + debugaccess + + + debug_mem_slave_read + Input + 1 + read + + + debug_mem_slave_readdata + Output + 32 + readdata + + + debug_mem_slave_waitrequest + Output + 1 + waitrequest + + + debug_mem_slave_write + Input + 1 + write + + + debug_mem_slave_writedata + Input + 32 + writedata + + + + + + java.lang.String + + true + true + false + true + + + int + 8 + false + true + false + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + int + 8 + false + true + false + true + + + int + 0 + true + true + false + true + + + boolean + false + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + nios_custom_instruction + true + + dummy_ci_port + Output + 1 + readra + + + + + + + embeddedsw.CMacro.READ_DEPTH + 64 + + + embeddedsw.CMacro.READ_THRESHOLD + 8 + + + embeddedsw.CMacro.WRITE_DEPTH + 64 + + + embeddedsw.CMacro.WRITE_THRESHOLD + 8 + + + embeddedsw.dts.compatible + altr,juart-1.0 + + + embeddedsw.dts.group + serial + + + embeddedsw.dts.name + juart + + + embeddedsw.dts.vendor + altr + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 64 + false + true + true + true + + + int + 8 + false + true + true + true + + + java.lang.String + + false + false + false + true + + + java.lang.String + NO_INTERACTIVE_WINDOWS + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + false + true + + + int + 64 + false + true + true + true + + + int + 8 + false + true + true + true + + + long + 50000000 + false + true + false + true + CLOCK_RATE + clk + + + java.lang.String + 2.0 + false + true + false + true + AVALON_SPEC + + + boolean + false + true + true + false + true + + + boolean + false + true + true + false + true + + + boolean + false + true + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.Boolean + true + true + true + false + true + + + java.lang.Long + 50000000 + true + true + false + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + rst_n + Input + 1 + reset_n + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 1 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + NATIVE + false + true + true + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 2 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + reset + false + true + false + true + + + int + 8 + false + true + false + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + true + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + av_chipselect + Input + 1 + chipselect + + + av_address + Input + 1 + address + + + av_read_n + Input + 1 + read_n + + + av_readdata + Output + 32 + readdata + + + av_write_n + Input + 1 + write_n + + + av_writedata + Input + 32 + writedata + + + av_waitrequest + Output + 1 + waitrequest + + + + + + com.altera.entityinterfaces.IConnectionPoint + jtag_uart.avalon_jtag_slave + false + true + true + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + reset + false + true + false + true + + + java.lang.Integer + + false + true + true + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + true + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + NONE + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + false + + av_irq + Output + 1 + irq + + + + + + + embeddedsw.CMacro.ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR + 0 + + + embeddedsw.CMacro.ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE + 0 + + + embeddedsw.CMacro.CONTENTS_INFO + "" + + + embeddedsw.CMacro.DUAL_PORT + 1 + + + embeddedsw.CMacro.GUI_RAM_BLOCK_TYPE + AUTO + + + embeddedsw.CMacro.INIT_CONTENTS_FILE + niosII_mem + + + embeddedsw.CMacro.INIT_MEM_CONTENT + 1 + + + embeddedsw.CMacro.INSTANCE_ID + NONE + + + embeddedsw.CMacro.NON_DEFAULT_INIT_FILE_ENABLED + 0 + + + embeddedsw.CMacro.RAM_BLOCK_TYPE + AUTO + + + embeddedsw.CMacro.READ_DURING_WRITE_MODE + DONT_CARE + + + embeddedsw.CMacro.SINGLE_CLOCK_OP + 1 + + + embeddedsw.CMacro.SIZE_MULTIPLE + 1 + + + embeddedsw.CMacro.SIZE_VALUE + 131072 + + + embeddedsw.CMacro.WRITABLE + 1 + + + embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR + SIM_DIR + + + embeddedsw.memoryInfo.GENERATE_DAT_SYM + 1 + + + embeddedsw.memoryInfo.GENERATE_HEX + 1 + + + embeddedsw.memoryInfo.HAS_BYTE_LANE + 0 + + + embeddedsw.memoryInfo.HEX_INSTALL_DIR + QPF_DIR + + + embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH + 32 + + + embeddedsw.memoryInfo.MEM_INIT_FILENAME + niosII_mem + + + postgeneration.simulation.init_file.param_name + INIT_FILE + + + postgeneration.simulation.init_file.type + MEM_INIT + + + boolean + false + false + true + true + true + + + java.lang.String + AUTO + false + true + true + true + + + int + 32 + false + true + true + true + + + int + 32 + false + true + false + true + + + boolean + true + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + true + true + false + true + + + boolean + true + false + true + true + true + + + java.lang.String + onchip_mem.hex + false + false + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + NONE + false + false + true + true + + + long + 131072 + false + true + true + true + + + java.lang.String + DONT_CARE + false + true + true + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + boolean + true + false + true + true + true + + + boolean + true + true + true + false + true + + + int + 1 + false + true + true + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + false + false + true + + + boolean + false + false + false + true + true + + + boolean + true + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + true + false + true + true + true + + + java.lang.String + niosII_mem + false + true + false + true + UNIQUE_ID + + + java.lang.String + CYCLONEIVE + false + true + false + true + DEVICE_FAMILY + + + java.lang.String + ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 + false + true + false + true + DEVICE_FEATURES + + + int + 15 + true + true + false + true + + + int + 15 + true + true + false + true + + + int + 32 + true + true + false + true + + + int + 32 + true + true + false + true + + + java.lang.String + Automatic + true + true + false + true + + + boolean + false + true + true + false + true + + + java.lang.String + niosII_mem.hex + true + true + false + true + + + boolean + false + false + true + true + true + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 1 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + true + true + + + int + 1 + false + true + false + true + + + java.math.BigInteger + 131072 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk1 + false + true + true + true + + + java.lang.String + reset1 + false + true + false + true + + + int + 8 + false + true + false + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 131072 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + true + true + + + boolean + false + false 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Input + 15 + address + + + clken + Input + 1 + clken + + + chipselect + Input + 1 + chipselect + + + write + Input + 1 + write + + + readdata + Output + 32 + readdata + + + writedata + Input + 32 + writedata + + + byteenable + Input + 4 + byteenable + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 1 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + true + true + + + int + 1 + false + true + false + true + + + java.math.BigInteger + 131072 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk1 + false + true + true + true + + + java.lang.String + reset1 + false + true + false + true + + + int + 8 + false + true + false + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 131072 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + true + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 1 + false + true + true + true + + + int + 0 + false + true + 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java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk1 + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset + Input + 1 + reset + + + reset_req + Input + 1 + reset_req + + + + + + + int + 8 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + true + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 8 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clock + false + true + true + true + + + java.lang.String + reset_n + false + true + false + true + + + int + 8 + false + true + false + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + ctl_wr + Input + 1 + write + + + ctl_rd + Input + 1 + read + + + ctl_addr + Input + 1 + address + + + ctl_wrdata + Input + 32 + writedata + + + ctl_rddata + Output + 32 + readdata + + + + + + java.lang.String + clock + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + clrn + Input + 1 + reset_n + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + true + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 16 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clock + false + true + true + true + + + java.lang.String + reset_n + false + true + false + true + + + int + 8 + false + true + false + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + ram_wr + Input + 1 + write + + + ram_addr + Input + 2 + address + + + ram_wrdata + Input + 32 + writedata + + + + + + java.lang.String + + false + true + true + true + + + java.lang.String + reset_n + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + conduit + false + + train + Input + 1 + train + + + red + Output + 1 + red + + + yellow + Output + 1 + yellow + + + green + Output + 1 + green + + + + + + + embeddedsw.CMacro.ALWAYS_RUN + 0 + + + embeddedsw.CMacro.COUNTER_SIZE + 32 + + + embeddedsw.CMacro.FIXED_PERIOD + 0 + + + embeddedsw.CMacro.FREQ + 50000000 + + + embeddedsw.CMacro.LOAD_VALUE + 49999 + + + embeddedsw.CMacro.MULT + 0.001 + + + embeddedsw.CMacro.PERIOD + 1 + + + embeddedsw.CMacro.PERIOD_UNITS + ms + + + embeddedsw.CMacro.RESET_OUTPUT + 0 + + + embeddedsw.CMacro.SNAPSHOT + 1 + + + embeddedsw.CMacro.TICKS_PER_SEC + 1000 + + + embeddedsw.CMacro.TIMEOUT_PULSE_OUTPUT + 0 + + + embeddedsw.dts.compatible + altr,timer-1.0 + + + embeddedsw.dts.group + timer + + + embeddedsw.dts.name + timer + + + embeddedsw.dts.params.clock-frequency + 50000000 + + + embeddedsw.dts.vendor + altr + + + boolean + false + false + true + true + true + + + int + 32 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + 1 + false + true + true + true + + + java.lang.String + MSEC + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + true + false + true + true + true + + + boolean + false + false + true + true + true + + + long + 50000000 + false + true + false + true + CLOCK_RATE + clk + + + int + 2 + false + true + false + true + + + java.lang.String + FULL_FEATURED + true + true + false + true + + + java.lang.String + ms + true + true + false + true + + + double + 0.001 + true + true + false + true + + + java.lang.String + 49999 + true + true + false + true + + + double + 0.001 + true + true + false + true + + + double + 1000.0 + true + true + false + true + + + int + 3 + true + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.Boolean + true + true + true + false + true + + + java.lang.Long + 50000000 + true + true + false + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset_n + Input + 1 + reset_n + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + embeddedsw.configuration.isTimerDevice + 1 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + NATIVE + false + true + true + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 8 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + reset + false + true + false + true + + + int + 8 + false + true + false + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + address + Input + 3 + address + + + writedata + Input + 16 + writedata + + + readdata + Output + 16 + readdata + + + chipselect + Input + 1 + chipselect + + + write_n + Input + 1 + write_n + + + + + + com.altera.entityinterfaces.IConnectionPoint + sys_clk_timer.s1 + false + true + true + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + reset + false + true + false + true + + + java.lang.Integer + + false + true + true + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + true + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + NONE + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + false + + irq + Output + 1 + irq + + + + + + + interconnect_id.cpu.data_master + 0 + + + interconnect_id.cpu.debug_mem_slave + 0 + + + interconnect_id.cpu.instruction_master + 1 + + + interconnect_id.jtag_uart.avalon_jtag_slave + 1 + + + interconnect_id.mem.s1 + 2 + + + interconnect_id.mem.s2 + 3 + + + interconnect_id.sem.ctl_slave + 4 + + + interconnect_id.sem.ram_slave + 5 + + + interconnect_id.sys_clk_timer.s1 + 6 + + + java.lang.String + + + + + + + + + +};set_instance_parameter_value {cpu_data_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {cpu_data_master_agent} {ID} {0};set_instance_parameter_value {cpu_data_master_agent} {BURSTWRAP_VALUE} {7};set_instance_parameter_value {cpu_data_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {cpu_data_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {cpu_data_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {cpu_data_master_agent} {USE_WRITERESPONSE} {0};add_instance {cpu_instruction_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_QOS_H} {74};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_QOS_L} {74};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DATA_SIDEBAND_H} {72};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DATA_SIDEBAND_L} {72};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ADDR_SIDEBAND_H} {71};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ADDR_SIDEBAND_L} {71};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURST_TYPE_H} {70};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURST_TYPE_L} {69};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_CACHE_H} {88};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_CACHE_L} {85};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_THREAD_ID_H} {81};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_THREAD_ID_L} {81};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_EXCLUSIVE} {59};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {cpu_instruction_master_agent} {ST_DATA_W} {94};set_instance_parameter_value {cpu_instruction_master_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {cpu_instruction_master_agent} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {cpu_instruction_master_agent} {AV_LINEWRAPBURSTS} {1};set_instance_parameter_value {cpu_instruction_master_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {cpu_instruction_master_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cpu_instruction_master_agent} {ADDR_MAP} { + + + + +};set_instance_parameter_value {cpu_instruction_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {cpu_instruction_master_agent} {ID} {1};set_instance_parameter_value {cpu_instruction_master_agent} {BURSTWRAP_VALUE} {3};set_instance_parameter_value {cpu_instruction_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {cpu_instruction_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {cpu_instruction_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {cpu_instruction_master_agent} {USE_WRITERESPONSE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_DATA_W} {94};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ID} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ECC_ENABLE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sem_ctl_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sem_ctl_slave_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {sem_ctl_slave_agent} {ST_DATA_W} {94};set_instance_parameter_value {sem_ctl_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sem_ctl_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sem_ctl_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sem_ctl_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sem_ctl_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sem_ctl_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sem_ctl_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sem_ctl_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sem_ctl_slave_agent} {ID} {4};set_instance_parameter_value {sem_ctl_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sem_ctl_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sem_ctl_slave_agent} {ECC_ENABLE} {0};add_instance {sem_ctl_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {cpu_debug_mem_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {cpu_debug_mem_slave_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {cpu_debug_mem_slave_agent} {ST_DATA_W} {94};set_instance_parameter_value {cpu_debug_mem_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {cpu_debug_mem_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cpu_debug_mem_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {cpu_debug_mem_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {cpu_debug_mem_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {cpu_debug_mem_slave_agent} {ID} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {ECC_ENABLE} {0};add_instance {cpu_debug_mem_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sem_ram_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sem_ram_slave_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {sem_ram_slave_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {sem_ram_slave_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {sem_ram_slave_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {sem_ram_slave_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {sem_ram_slave_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {sem_ram_slave_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {sem_ram_slave_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {sem_ram_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sem_ram_slave_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {sem_ram_slave_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {sem_ram_slave_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {sem_ram_slave_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {sem_ram_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sem_ram_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sem_ram_slave_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {sem_ram_slave_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {sem_ram_slave_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {sem_ram_slave_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {sem_ram_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sem_ram_slave_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {sem_ram_slave_agent} {ST_DATA_W} {94};set_instance_parameter_value {sem_ram_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sem_ram_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sem_ram_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sem_ram_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sem_ram_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sem_ram_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sem_ram_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sem_ram_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sem_ram_slave_agent} {ID} {5};set_instance_parameter_value {sem_ram_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sem_ram_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sem_ram_slave_agent} {ECC_ENABLE} {0};add_instance {sem_ram_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sys_clk_timer_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sys_clk_timer_s1_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {sys_clk_timer_s1_agent} {ST_DATA_W} {94};set_instance_parameter_value {sys_clk_timer_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sys_clk_timer_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sys_clk_timer_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sys_clk_timer_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sys_clk_timer_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sys_clk_timer_s1_agent} {ID} {6};set_instance_parameter_value {sys_clk_timer_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {ECC_ENABLE} {0};add_instance {sys_clk_timer_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {mem_s2_agent} {altera_merlin_slave_agent};set_instance_parameter_value {mem_s2_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {mem_s2_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {mem_s2_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {mem_s2_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {mem_s2_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {mem_s2_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {mem_s2_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {mem_s2_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {mem_s2_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {mem_s2_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {mem_s2_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {mem_s2_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {mem_s2_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {mem_s2_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {mem_s2_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {mem_s2_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mem_s2_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {mem_s2_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {mem_s2_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {mem_s2_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {mem_s2_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mem_s2_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mem_s2_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mem_s2_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mem_s2_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {mem_s2_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {mem_s2_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {mem_s2_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {mem_s2_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {mem_s2_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {mem_s2_agent} {ST_DATA_W} {94};set_instance_parameter_value {mem_s2_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mem_s2_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {mem_s2_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mem_s2_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mem_s2_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {mem_s2_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {mem_s2_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {mem_s2_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {mem_s2_agent} {ID} {3};set_instance_parameter_value {mem_s2_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mem_s2_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mem_s2_agent} {ECC_ENABLE} {0};add_instance {mem_s2_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {mem_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {mem_s1_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {mem_s1_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {mem_s1_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {mem_s1_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {mem_s1_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {mem_s1_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {mem_s1_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {mem_s1_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {mem_s1_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {mem_s1_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {mem_s1_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {mem_s1_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {mem_s1_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {mem_s1_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {mem_s1_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {mem_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mem_s1_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {mem_s1_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {mem_s1_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {mem_s1_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {mem_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mem_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mem_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mem_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mem_s1_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {mem_s1_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {mem_s1_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {mem_s1_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {mem_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {mem_s1_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {mem_s1_agent} {ST_DATA_W} {94};set_instance_parameter_value {mem_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mem_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {mem_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mem_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mem_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {mem_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {mem_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {mem_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {mem_s1_agent} {ID} {2};set_instance_parameter_value {mem_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mem_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mem_s1_agent} {ECC_ENABLE} {0};add_instance {mem_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {3 0 6 5 4 1 };set_instance_parameter_value {router} {CHANNEL_ID} {100000 000100 010000 001000 000010 000001 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {both both both write both both };set_instance_parameter_value {router} {START_ADDRESS} {0x0 0x20800 0x21000 0x21020 0x21030 0x21038 };set_instance_parameter_value {router} {END_ADDRESS} {0x20000 0x21000 0x21020 0x21030 0x21038 0x21040 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 1 1 1 1 1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 0 0 0 0 0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 0 0 0 0 0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {53};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router} {PKT_TRANS_READ} {57};set_instance_parameter_value {router} {ST_DATA_W} {94};set_instance_parameter_value {router} {ST_CHANNEL_W} {7};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {5};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {3};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {2 0 };set_instance_parameter_value {router_001} {CHANNEL_ID} {10 01 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x0 0x20800 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x20000 0x21000 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {53};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_001} {ST_DATA_W} {94};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_001} {DECODER_TYPE} {0};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {1};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {2};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 };set_instance_parameter_value {router_002} {CHANNEL_ID} {1 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {53};set_instance_parameter_value {router_002} {PKT_ADDR_L} {36};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_002} {ST_DATA_W} {94};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};add_instance {router_003} {altera_merlin_router};set_instance_parameter_value {router_003} {DESTINATION_ID} {0 };set_instance_parameter_value {router_003} {CHANNEL_ID} {1 };set_instance_parameter_value {router_003} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_003} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_003} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_003} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_003} {SPAN_OFFSET} {};set_instance_parameter_value {router_003} {PKT_ADDR_H} {53};set_instance_parameter_value {router_003} {PKT_ADDR_L} {36};set_instance_parameter_value {router_003} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_003} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_003} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_003} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_003} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_003} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_003} {ST_DATA_W} {94};set_instance_parameter_value {router_003} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_003} {DECODER_TYPE} {1};set_instance_parameter_value {router_003} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_003} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_003} {MEMORY_ALIASING_DECODE} {0};add_instance {router_004} {altera_merlin_router};set_instance_parameter_value {router_004} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_004} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_004} {TYPE_OF_TRANSACTION} {both read };set_instance_parameter_value {router_004} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_004} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_004} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_004} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_004} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_004} {SPAN_OFFSET} {};set_instance_parameter_value {router_004} {PKT_ADDR_H} {53};set_instance_parameter_value {router_004} {PKT_ADDR_L} {36};set_instance_parameter_value {router_004} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_004} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_004} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_004} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_004} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_004} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_004} {ST_DATA_W} {94};set_instance_parameter_value {router_004} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_004} {DECODER_TYPE} {1};set_instance_parameter_value {router_004} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_004} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_004} {MEMORY_ALIASING_DECODE} {0};add_instance {router_005} {altera_merlin_router};set_instance_parameter_value {router_005} {DESTINATION_ID} {0 };set_instance_parameter_value {router_005} {CHANNEL_ID} {1 };set_instance_parameter_value {router_005} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_005} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_005} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_005} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_005} {SPAN_OFFSET} {};set_instance_parameter_value {router_005} {PKT_ADDR_H} {53};set_instance_parameter_value {router_005} {PKT_ADDR_L} {36};set_instance_parameter_value {router_005} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_005} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_005} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_005} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_005} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_005} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_005} {ST_DATA_W} {94};set_instance_parameter_value {router_005} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_005} {DECODER_TYPE} {1};set_instance_parameter_value {router_005} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_005} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_005} {MEMORY_ALIASING_DECODE} {0};add_instance {router_006} {altera_merlin_router};set_instance_parameter_value {router_006} {DESTINATION_ID} {0 };set_instance_parameter_value {router_006} {CHANNEL_ID} {1 };set_instance_parameter_value {router_006} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_006} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_006} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_006} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_006} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_006} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_006} {SPAN_OFFSET} {};set_instance_parameter_value {router_006} {PKT_ADDR_H} {53};set_instance_parameter_value {router_006} {PKT_ADDR_L} {36};set_instance_parameter_value {router_006} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_006} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_006} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_006} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_006} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_006} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_006} {ST_DATA_W} {94};set_instance_parameter_value {router_006} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_006} {DECODER_TYPE} {1};set_instance_parameter_value {router_006} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_006} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_006} {MEMORY_ALIASING_DECODE} {0};add_instance {router_007} {altera_merlin_router};set_instance_parameter_value {router_007} {DESTINATION_ID} {0 };set_instance_parameter_value {router_007} {CHANNEL_ID} {1 };set_instance_parameter_value {router_007} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_007} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_007} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_007} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_007} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_007} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_007} {SPAN_OFFSET} {};set_instance_parameter_value {router_007} {PKT_ADDR_H} {53};set_instance_parameter_value {router_007} {PKT_ADDR_L} {36};set_instance_parameter_value {router_007} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_007} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_007} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_007} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_007} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_007} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_007} {ST_DATA_W} {94};set_instance_parameter_value {router_007} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_007} {DECODER_TYPE} {1};set_instance_parameter_value {router_007} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_007} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_007} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_007} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_007} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_007} {MEMORY_ALIASING_DECODE} {0};add_instance {router_008} {altera_merlin_router};set_instance_parameter_value {router_008} {DESTINATION_ID} {1 };set_instance_parameter_value {router_008} {CHANNEL_ID} {1 };set_instance_parameter_value {router_008} {TYPE_OF_TRANSACTION} {read };set_instance_parameter_value {router_008} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_008} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_008} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_008} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_008} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_008} {SPAN_OFFSET} {};set_instance_parameter_value {router_008} {PKT_ADDR_H} {53};set_instance_parameter_value {router_008} {PKT_ADDR_L} {36};set_instance_parameter_value {router_008} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_008} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_008} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_008} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_008} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_008} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_008} {ST_DATA_W} {94};set_instance_parameter_value {router_008} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_008} {DECODER_TYPE} {1};set_instance_parameter_value {router_008} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_008} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_008} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_008} {DEFAULT_DESTID} {1};set_instance_parameter_value {router_008} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_008} {MEMORY_ALIASING_DECODE} {0};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {94};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {6};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {1};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux_001} {ST_DATA_W} {94};set_instance_parameter_value {cmd_demux_001} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_demux_001} {NUM_OUTPUTS} {2};set_instance_parameter_value {cmd_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {cmd_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_001} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_001} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_001} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_001} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_001} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_002} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_002} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_002} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_002} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux_002} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_002} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_002} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {cmd_mux_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_003} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_003} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_003} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_003} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_003} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_003} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_003} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_004} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_004} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_004} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_004} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_004} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_004} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_004} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_005} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_005} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_005} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_005} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_005} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_005} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_005} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_006} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_006} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_006} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_006} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_006} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_006} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_006} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_006} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_006} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_001} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_001} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_001} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_002} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_002} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_002} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_002} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux_002} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_003} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_003} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_003} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_003} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_003} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_004} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_004} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_004} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_004} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_004} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_005} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_005} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_005} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_005} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_005} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_006} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_006} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_006} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_006} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_006} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {94};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {6};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 1 1 1 1 1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux_001} {ST_DATA_W} {94};set_instance_parameter_value {rsp_mux_001} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_mux_001} {NUM_INPUTS} {2};set_instance_parameter_value {rsp_mux_001} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux_001} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {rsp_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cpu_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {cpu_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {cpu_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {cpu_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {cpu_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {clk_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {clk_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {50000000};set_instance_parameter_value {clk_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {cpu_data_master_translator.avalon_universal_master_0} {cpu_data_master_agent.av} {avalon};set_connection_parameter_value {cpu_data_master_translator.avalon_universal_master_0/cpu_data_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {cpu_data_master_translator.avalon_universal_master_0/cpu_data_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {cpu_data_master_translator.avalon_universal_master_0/cpu_data_master_agent.av} {defaultConnection} {false};add_connection {rsp_mux.src} {cpu_data_master_agent.rp} {avalon_streaming};preview_set_connection_tag {rsp_mux.src/cpu_data_master_agent.rp} {qsys_mm.response};add_connection {cpu_instruction_master_translator.avalon_universal_master_0} {cpu_instruction_master_agent.av} {avalon};set_connection_parameter_value {cpu_instruction_master_translator.avalon_universal_master_0/cpu_instruction_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {cpu_instruction_master_translator.avalon_universal_master_0/cpu_instruction_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {cpu_instruction_master_translator.avalon_universal_master_0/cpu_instruction_master_agent.av} {defaultConnection} {false};add_connection {rsp_mux_001.src} {cpu_instruction_master_agent.rp} {avalon_streaming};preview_set_connection_tag {rsp_mux_001.src/cpu_instruction_master_agent.rp} {qsys_mm.response};add_connection {jtag_uart_avalon_jtag_slave_agent.m0} {jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {jtag_uart_avalon_jtag_slave_agent.rf_source} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.out} {jtag_uart_avalon_jtag_slave_agent.rf_sink} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_src} {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux.src} {jtag_uart_avalon_jtag_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux.src/jtag_uart_avalon_jtag_slave_agent.cp} {qsys_mm.command};add_connection {sem_ctl_slave_agent.m0} {sem_ctl_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sem_ctl_slave_agent.m0/sem_ctl_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sem_ctl_slave_agent.m0/sem_ctl_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sem_ctl_slave_agent.m0/sem_ctl_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sem_ctl_slave_agent.rf_source} {sem_ctl_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {sem_ctl_slave_agent_rsp_fifo.out} {sem_ctl_slave_agent.rf_sink} {avalon_streaming};add_connection {sem_ctl_slave_agent.rdata_fifo_src} {sem_ctl_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_001.src} {sem_ctl_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_001.src/sem_ctl_slave_agent.cp} {qsys_mm.command};add_connection {cpu_debug_mem_slave_agent.m0} {cpu_debug_mem_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {cpu_debug_mem_slave_agent.m0/cpu_debug_mem_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {cpu_debug_mem_slave_agent.m0/cpu_debug_mem_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {cpu_debug_mem_slave_agent.m0/cpu_debug_mem_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {cpu_debug_mem_slave_agent.rf_source} {cpu_debug_mem_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {cpu_debug_mem_slave_agent_rsp_fifo.out} {cpu_debug_mem_slave_agent.rf_sink} {avalon_streaming};add_connection {cpu_debug_mem_slave_agent.rdata_fifo_src} {cpu_debug_mem_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_002.src} {cpu_debug_mem_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_002.src/cpu_debug_mem_slave_agent.cp} {qsys_mm.command};add_connection {sem_ram_slave_agent.m0} {sem_ram_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sem_ram_slave_agent.m0/sem_ram_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sem_ram_slave_agent.m0/sem_ram_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sem_ram_slave_agent.m0/sem_ram_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sem_ram_slave_agent.rf_source} {sem_ram_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {sem_ram_slave_agent_rsp_fifo.out} {sem_ram_slave_agent.rf_sink} {avalon_streaming};add_connection {sem_ram_slave_agent.rdata_fifo_src} {sem_ram_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_003.src} {sem_ram_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_003.src/sem_ram_slave_agent.cp} {qsys_mm.command};add_connection {sys_clk_timer_s1_agent.m0} {sys_clk_timer_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sys_clk_timer_s1_agent.m0/sys_clk_timer_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sys_clk_timer_s1_agent.m0/sys_clk_timer_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sys_clk_timer_s1_agent.m0/sys_clk_timer_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sys_clk_timer_s1_agent.rf_source} {sys_clk_timer_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {sys_clk_timer_s1_agent_rsp_fifo.out} {sys_clk_timer_s1_agent.rf_sink} {avalon_streaming};add_connection {sys_clk_timer_s1_agent.rdata_fifo_src} {sys_clk_timer_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_004.src} {sys_clk_timer_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_004.src/sys_clk_timer_s1_agent.cp} {qsys_mm.command};add_connection {mem_s2_agent.m0} {mem_s2_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {mem_s2_agent.m0/mem_s2_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {mem_s2_agent.m0/mem_s2_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {mem_s2_agent.m0/mem_s2_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {mem_s2_agent.rf_source} {mem_s2_agent_rsp_fifo.in} {avalon_streaming};add_connection {mem_s2_agent_rsp_fifo.out} {mem_s2_agent.rf_sink} {avalon_streaming};add_connection {mem_s2_agent.rdata_fifo_src} {mem_s2_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_005.src} {mem_s2_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_005.src/mem_s2_agent.cp} {qsys_mm.command};add_connection {mem_s1_agent.m0} {mem_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {mem_s1_agent.m0/mem_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {mem_s1_agent.m0/mem_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {mem_s1_agent.m0/mem_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {mem_s1_agent.rf_source} {mem_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {mem_s1_agent_rsp_fifo.out} {mem_s1_agent.rf_sink} {avalon_streaming};add_connection {mem_s1_agent.rdata_fifo_src} {mem_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_006.src} {mem_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_006.src/mem_s1_agent.cp} {qsys_mm.command};add_connection {cpu_data_master_agent.cp} {router.sink} {avalon_streaming};preview_set_connection_tag {cpu_data_master_agent.cp/router.sink} {qsys_mm.command};add_connection {router.src} {cmd_demux.sink} {avalon_streaming};preview_set_connection_tag {router.src/cmd_demux.sink} {qsys_mm.command};add_connection {cpu_instruction_master_agent.cp} {router_001.sink} {avalon_streaming};preview_set_connection_tag {cpu_instruction_master_agent.cp/router_001.sink} {qsys_mm.command};add_connection {router_001.src} {cmd_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_001.src/cmd_demux_001.sink} {qsys_mm.command};add_connection {jtag_uart_avalon_jtag_slave_agent.rp} {router_002.sink} {avalon_streaming};preview_set_connection_tag {jtag_uart_avalon_jtag_slave_agent.rp/router_002.sink} {qsys_mm.response};add_connection {router_002.src} {rsp_demux.sink} {avalon_streaming};preview_set_connection_tag {router_002.src/rsp_demux.sink} {qsys_mm.response};add_connection {sem_ctl_slave_agent.rp} {router_003.sink} {avalon_streaming};preview_set_connection_tag {sem_ctl_slave_agent.rp/router_003.sink} {qsys_mm.response};add_connection {router_003.src} {rsp_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_003.src/rsp_demux_001.sink} {qsys_mm.response};add_connection {cpu_debug_mem_slave_agent.rp} {router_004.sink} {avalon_streaming};preview_set_connection_tag {cpu_debug_mem_slave_agent.rp/router_004.sink} {qsys_mm.response};add_connection {router_004.src} {rsp_demux_002.sink} {avalon_streaming};preview_set_connection_tag {router_004.src/rsp_demux_002.sink} {qsys_mm.response};add_connection {sem_ram_slave_agent.rp} {router_005.sink} {avalon_streaming};preview_set_connection_tag {sem_ram_slave_agent.rp/router_005.sink} {qsys_mm.response};add_connection {router_005.src} {rsp_demux_003.sink} {avalon_streaming};preview_set_connection_tag {router_005.src/rsp_demux_003.sink} {qsys_mm.response};add_connection {sys_clk_timer_s1_agent.rp} {router_006.sink} {avalon_streaming};preview_set_connection_tag {sys_clk_timer_s1_agent.rp/router_006.sink} {qsys_mm.response};add_connection {router_006.src} {rsp_demux_004.sink} {avalon_streaming};preview_set_connection_tag {router_006.src/rsp_demux_004.sink} {qsys_mm.response};add_connection {mem_s2_agent.rp} {router_007.sink} {avalon_streaming};preview_set_connection_tag {mem_s2_agent.rp/router_007.sink} {qsys_mm.response};add_connection {router_007.src} {rsp_demux_005.sink} {avalon_streaming};preview_set_connection_tag {router_007.src/rsp_demux_005.sink} {qsys_mm.response};add_connection {mem_s1_agent.rp} {router_008.sink} {avalon_streaming};preview_set_connection_tag {mem_s1_agent.rp/router_008.sink} {qsys_mm.response};add_connection {router_008.src} {rsp_demux_006.sink} {avalon_streaming};preview_set_connection_tag {router_008.src/rsp_demux_006.sink} {qsys_mm.response};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux.src1} {cmd_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.command};add_connection {cmd_demux.src2} {cmd_mux_002.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.command};add_connection {cmd_demux.src3} {cmd_mux_003.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.command};add_connection {cmd_demux.src4} {cmd_mux_004.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src4/cmd_mux_004.sink0} {qsys_mm.command};add_connection {cmd_demux.src5} {cmd_mux_005.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src5/cmd_mux_005.sink0} {qsys_mm.command};add_connection {cmd_demux_001.src0} {cmd_mux_002.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src0/cmd_mux_002.sink1} {qsys_mm.command};add_connection {cmd_demux_001.src1} {cmd_mux_006.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src1/cmd_mux_006.sink0} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux_001.src0} {rsp_mux.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.response};add_connection {rsp_demux_002.src0} {rsp_mux.sink2} {avalon_streaming};preview_set_connection_tag {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.response};add_connection {rsp_demux_002.src1} {rsp_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux_002.src1/rsp_mux_001.sink0} {qsys_mm.response};add_connection {rsp_demux_003.src0} {rsp_mux.sink3} {avalon_streaming};preview_set_connection_tag {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.response};add_connection {rsp_demux_004.src0} {rsp_mux.sink4} {avalon_streaming};preview_set_connection_tag {rsp_demux_004.src0/rsp_mux.sink4} {qsys_mm.response};add_connection {rsp_demux_005.src0} {rsp_mux.sink5} {avalon_streaming};preview_set_connection_tag {rsp_demux_005.src0/rsp_mux.sink5} {qsys_mm.response};add_connection {rsp_demux_006.src0} {rsp_mux_001.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_006.src0/rsp_mux_001.sink1} {qsys_mm.response};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_data_master_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_instruction_master_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ctl_slave_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_debug_mem_slave_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ram_slave_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sys_clk_timer_s1_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s2_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s1_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_data_master_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_instruction_master_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ctl_slave_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ctl_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_debug_mem_slave_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_debug_mem_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ram_slave_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ram_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sys_clk_timer_s1_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sys_clk_timer_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s2_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s2_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s1_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_003.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_004.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_005.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_006.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_007.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_008.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_demux_001.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_001.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_002.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_003.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_004.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_005.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_006.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_001.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_002.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_003.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_004.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_005.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_006.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_mux_001.clk_reset} {reset};add_connection {clk_clk_clock_bridge.out_clk} {cpu_data_master_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_instruction_master_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ctl_slave_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_debug_mem_slave_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ram_slave_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sys_clk_timer_s1_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s2_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s1_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_data_master_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_instruction_master_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ctl_slave_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ctl_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_debug_mem_slave_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_debug_mem_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ram_slave_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ram_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sys_clk_timer_s1_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sys_clk_timer_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s2_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s2_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s1_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_003.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_004.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_005.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_006.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_007.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_008.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_demux_001.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_mux_001.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_001.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_001.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_002.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_002.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_003.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_003.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_004.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_004.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_005.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_005.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_006.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_006.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_reset_reset_bridge.clk} {clock};add_interface {clk_clk} {clock} {slave};set_interface_property {clk_clk} {EXPORT_OF} {clk_clk_clock_bridge.in_clk};add_interface {cpu_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {cpu_reset_reset_bridge_in_reset} {EXPORT_OF} {cpu_reset_reset_bridge.in_reset};add_interface {cpu_data_master} {avalon} {slave};set_interface_property {cpu_data_master} {EXPORT_OF} {cpu_data_master_translator.avalon_anti_master_0};add_interface {cpu_instruction_master} {avalon} {slave};set_interface_property {cpu_instruction_master} {EXPORT_OF} {cpu_instruction_master_translator.avalon_anti_master_0};add_interface {cpu_debug_mem_slave} {avalon} {master};set_interface_property {cpu_debug_mem_slave} {EXPORT_OF} {cpu_debug_mem_slave_translator.avalon_anti_slave_0};add_interface {jtag_uart_avalon_jtag_slave} {avalon} {master};set_interface_property {jtag_uart_avalon_jtag_slave} {EXPORT_OF} {jtag_uart_avalon_jtag_slave_translator.avalon_anti_slave_0};add_interface {mem_s1} {avalon} {master};set_interface_property {mem_s1} {EXPORT_OF} {mem_s1_translator.avalon_anti_slave_0};add_interface {mem_s2} {avalon} {master};set_interface_property {mem_s2} {EXPORT_OF} {mem_s2_translator.avalon_anti_slave_0};add_interface {sem_ctl_slave} {avalon} {master};set_interface_property {sem_ctl_slave} {EXPORT_OF} {sem_ctl_slave_translator.avalon_anti_slave_0};add_interface {sem_ram_slave} {avalon} {master};set_interface_property {sem_ram_slave} {EXPORT_OF} {sem_ram_slave_translator.avalon_anti_slave_0};add_interface {sys_clk_timer_s1} {avalon} {master};set_interface_property {sys_clk_timer_s1} {EXPORT_OF} {sys_clk_timer_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.cpu.data_master} {0};set_module_assignment {interconnect_id.cpu.debug_mem_slave} {0};set_module_assignment {interconnect_id.cpu.instruction_master} {1};set_module_assignment {interconnect_id.jtag_uart.avalon_jtag_slave} {1};set_module_assignment {interconnect_id.mem.s1} {2};set_module_assignment {interconnect_id.mem.s2} {3};set_module_assignment {interconnect_id.sem.ctl_slave} {4};set_module_assignment {interconnect_id.sem.ram_slave} {5};set_module_assignment {interconnect_id.sys_clk_timer.s1} {6};]]> + false + true + true + true + + + java.lang.String + CYCLONEIVE + false + true + false + true + DEVICE_FAMILY + + + java.lang.String + EP4CE115F29C7 + false + true + false + true + DEVICE + + + java.lang.String + + false + true + false + true + DEVICE_SPEEDGRADE + + + java.lang.String + Cyclone IV E + false + true + false + true + DEVICE_FAMILY + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk_clk_clk + Input + 1 + clk + + + + + + java.lang.String + clk_clk + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + cpu_reset_reset_bridge_in_reset_reset + Input + 1 + reset + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + merlin.flow.avalon_universal_master_0 + avalon_universal_master_0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + true + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 262144 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + SYMBOLS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_clk + false + true + true + true + + + java.lang.String + cpu_reset_reset_bridge_in_reset + false + true + false + true + + + int + 8 + false + true + false + true + + + java.math.BigInteger + 0 + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + true + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean 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+ false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + cpu_data_master_address + Input + 18 + address + + + cpu_data_master_waitrequest + Output + 1 + waitrequest + + + cpu_data_master_byteenable + Input + 4 + byteenable + + + cpu_data_master_read + Input + 1 + read + + + cpu_data_master_readdata + Output + 32 + readdata + + + cpu_data_master_write + Input + 1 + write + + + cpu_data_master_writedata + Input + 32 + writedata + + + cpu_data_master_debugaccess + Input + 1 + debugaccess + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + merlin.flow.avalon_universal_master_0 + avalon_universal_master_0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + DYNAMIC + false + true + true + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 262144 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + SYMBOLS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_clk + false + true + true + true + + + java.lang.String + cpu_reset_reset_bridge_in_reset + false + true + false + true + + + int + 8 + false + true + false + true + + + java.math.BigInteger + 0 + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false 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true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + cpu_instruction_master_address + Input + 18 + address + + + cpu_instruction_master_waitrequest + Output + 1 + waitrequest + + + cpu_instruction_master_read + Input + 1 + read + + + cpu_instruction_master_readdata + Output + 32 + readdata + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_clk + false + true + true + true + + + java.lang.String + cpu_reset_reset_bridge_in_reset + false + true + true + true + + + int + 8 + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + boolean + true + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + false + true + + + int + 0 + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + cpu_debug_mem_slave_address + Output + 9 + address + + + cpu_debug_mem_slave_write + Output + 1 + write + + + cpu_debug_mem_slave_read + Output + 1 + read + + + cpu_debug_mem_slave_readdata + Input + 32 + readdata + + + cpu_debug_mem_slave_writedata + Output + 32 + writedata + + + cpu_debug_mem_slave_byteenable + Output + 4 + byteenable + + + cpu_debug_mem_slave_waitrequest + Input + 1 + waitrequest + + + cpu_debug_mem_slave_debugaccess + Output + 1 + debugaccess + + + false + cpu + debug_mem_slave + cpu.debug_mem_slave + 0 + 2048 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_clk + false + true + true + true + + + java.lang.String + cpu_reset_reset_bridge_in_reset + false + true + true + true + + + int + 8 + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + false + true + + + int + 0 + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + jtag_uart_avalon_jtag_slave_address + Output + 1 + address + + + jtag_uart_avalon_jtag_slave_write + Output + 1 + write + + + jtag_uart_avalon_jtag_slave_read + Output + 1 + read + + + jtag_uart_avalon_jtag_slave_readdata + Input + 32 + readdata + + + jtag_uart_avalon_jtag_slave_writedata + Output + 32 + writedata + + + jtag_uart_avalon_jtag_slave_waitrequest + Input + 1 + waitrequest + + + jtag_uart_avalon_jtag_slave_chipselect + Output + 1 + chipselect + + + false + jtag_uart + avalon_jtag_slave + jtag_uart.avalon_jtag_slave + 0 + 8 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_clk + false + true + true + true + + + java.lang.String + cpu_reset_reset_bridge_in_reset + false + true + true + true + + + int + 8 + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 1 + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + false + true + + + int + 0 + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + mem_s1_address + Output + 15 + address + + + mem_s1_write + Output + 1 + write + + + mem_s1_readdata + Input + 32 + readdata + + + mem_s1_writedata + Output + 32 + writedata + + + mem_s1_byteenable + Output + 4 + byteenable + + + mem_s1_chipselect + Output + 1 + chipselect + + + mem_s1_clken + Output + 1 + clken + + + false + mem + s1 + mem.s1 + 0 + 131072 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_clk + false + true + true + true + + + java.lang.String + cpu_reset_reset_bridge_in_reset + false + true + true + true + + + int + 8 + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 1 + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + false + true + + + int + 0 + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + mem_s2_address + Output + 15 + address + + + mem_s2_write + Output + 1 + write + + + mem_s2_readdata + Input + 32 + readdata + + + mem_s2_writedata + Output + 32 + writedata + + + mem_s2_byteenable + Output + 4 + byteenable + + + mem_s2_chipselect + Output + 1 + chipselect + + + mem_s2_clken + Output + 1 + clken + + + false + mem + s2 + mem.s2 + 0 + 131072 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_clk + false + true + true + true + + + java.lang.String + cpu_reset_reset_bridge_in_reset + false + true + true + true + + + int + 8 + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + false + true + + + int + 0 + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + sem_ctl_slave_address + Output + 1 + address + + + sem_ctl_slave_write + Output + 1 + write + + + sem_ctl_slave_read + Output + 1 + read + + + sem_ctl_slave_readdata + Input + 32 + readdata + + + sem_ctl_slave_writedata + Output + 32 + writedata + + + false + sem + ctl_slave + sem.ctl_slave + 0 + 8 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_clk + false + true + true + true + + + java.lang.String + cpu_reset_reset_bridge_in_reset + false + true + true + true + + + int + 8 + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + false + true + + + int + 0 + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + sem_ram_slave_address + Output + 2 + address + + + sem_ram_slave_write + Output + 1 + write + + + sem_ram_slave_writedata + Output + 32 + writedata + + + false + sem + ram_slave + sem.ram_slave + 0 + 16 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk_clk + false + true + true + true + + + java.lang.String + cpu_reset_reset_bridge_in_reset + false + true + true + true + + + int + 8 + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 32 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + false + true + + + int + 0 + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + true + + sys_clk_timer_s1_address + Output + 3 + address + + + sys_clk_timer_s1_write + Output + 1 + write + + + sys_clk_timer_s1_readdata + Input + 16 + readdata + + + sys_clk_timer_s1_writedata + Output + 16 + writedata + + + sys_clk_timer_s1_chipselect + Output + 1 + chipselect + + + false + sys_clk_timer + s1 + sys_clk_timer.s1 + 0 + 32 + + + + + + + int + 2 + false + true + true + true + + + int + 32 + false + true + true + true + + + java.lang.String + 0:0,1:1 + false + true + true + true + + + java.lang.String + CYCLONEIVE + false + true + false + true + DEVICE_FAMILY + + + java.lang.String + Cyclone IV E + false + true + false + true + DEVICE_FAMILY + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset + Input + 1 + reset + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + true + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + clk_reset + false + true + false + true + + + java.lang.String + + false + true + false + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + INDIVIDUAL_REQUESTS + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + true + + receiver0_irq + Input + 1 + irq + + + false + sys_clk_timer + irq + sys_clk_timer.irq + 0 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + true + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + clk_reset + false + true + false + true + + + java.lang.String + + false + true + false + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + INDIVIDUAL_REQUESTS + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + true + + receiver1_irq + Input + 1 + irq + + + false + jtag_uart + irq + jtag_uart.irq + 0 + + + + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + true + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + clk_reset + false + true + false + true + + + java.lang.Integer + + false + true + true + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + true + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + NONE + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + false + + sender_irq + Output + 32 + irq + + + + + + + int + 2 + false + true + true + true + + + java.lang.String + deassert + false + true + true + true + + + int + 2 + false + true + true + true + + + int + 1 + false + true + true + true + + + int + 1 + false + true + true + true + + + int + 3 + false + true + true + true + + + int + 1 + false + true + true + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 0 + true + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + java.lang.String + + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + NONE + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset_in0 + Input + 1 + reset + + + + + + java.lang.String + + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + NONE + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset_in1 + Input + 1 + reset + + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + + false + true + true + true + + + [Ljava.lang.String; + reset_in0,reset_in1 + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + true + + reset_out + Output + 1 + reset + + + reset_req + Output + 1 + reset_req + + + + + + + int + 0 + false + true + true + true + + + java.lang.String + deassert + false + true + true + true + + + int + 1 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + in_reset + Input + 1 + reset + + + reset_req_in + Input + 1 + reset_req + + + + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + in_reset + false + true + true + true + + + [Ljava.lang.String; + in_reset + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + true + + out_reset + Output + 1 + reset + + + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + cpu + clk + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + jtag_uart + clk + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + sys_clk_timer + clk + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + mem + clk1 + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + sem + clock + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x0000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + data_master + mm_interconnect_0 + cpu_data_master + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + mm_interconnect_0 + clk_clk + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x0000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + instruction_master + mm_interconnect_0 + cpu_instruction_master + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x0000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + mm_interconnect_0 + jtag_uart_avalon_jtag_slave + jtag_uart + avalon_jtag_slave + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x0000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + mm_interconnect_0 + sem_ctl_slave + sem + ctl_slave + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x0000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + mm_interconnect_0 + cpu_debug_mem_slave + cpu + debug_mem_slave + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x0000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + mm_interconnect_0 + sem_ram_slave + sem + ram_slave + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x0000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + mm_interconnect_0 + sys_clk_timer_s1 + sys_clk_timer + s1 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x0000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + mm_interconnect_0 + mem_s2 + mem + s2 + + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x0000 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + mm_interconnect_0 + mem_s1 + mem + s1 + + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + irq_mapper + receiver0 + sys_clk_timer + irq + + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + irq_mapper + receiver1 + jtag_uart + irq + + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + irq + irq_mapper + sender + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + irq_mapper + clk + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_controller + reset_out + cpu + reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_controller + reset_out + rst_translator + in_reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_translator + out_reset + jtag_uart + reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_controller + reset_out + mem + reset1 + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_controller + reset_out + rst_translator + in_reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_translator + out_reset + sem + reset_n + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_controller + reset_out + rst_translator + in_reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_translator + out_reset + sys_clk_timer + reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_controller + reset_out + rst_translator + in_reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_translator + out_reset + mm_interconnect_0 + cpu_reset_reset_bridge_in_reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_controller + reset_out + rst_translator + in_reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + rst_translator + out_reset + irq_mapper + clk_reset + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk_reset + rst_controller + reset_in0 + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu + debug_reset_request + rst_controller + reset_in1 + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + rst_controller + clk + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk + clk + rst_translator + clk + + + 1 + clock_source + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Clock Source + 18.1 + + + 1 + clock_sink + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Clock Input + 18.1 + + + 1 + reset_sink + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Reset Input + 18.1 + + + 1 + clock_source + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Clock Output + 18.1 + + + 1 + reset_source + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Reset Output + 18.1 + + + 1 + altera_nios2_gen2 + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Nios II Processor + 18.1 + + + 9 + clock_sink + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Clock Input + 18.1 + + + 10 + reset_sink + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Reset Input + 18.1 + + + 9 + avalon_master + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Avalon Memory Mapped Master + 18.1 + + + 3 + interrupt_receiver + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Interrupt Receiver + 18.1 + + + 3 + reset_source + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Reset Output + 18.1 + + + 9 + avalon_slave + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Avalon Memory Mapped Slave + 18.1 + + + 1 + nios_custom_instruction_master + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Custom Instruction Master + 18.1 + + + 1 + altera_avalon_jtag_uart + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + JTAG UART Intel FPGA IP + 18.1 + + + 3 + interrupt_sender + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Interrupt Sender + 18.1 + + + 1 + altera_avalon_onchip_memory2 + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + On-Chip Memory (RAM or ROM) Intel FPGA IP + 18.1 + + + 1 + Semafor + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Semafor + 1.0 + + + 1 + conduit_end + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Conduit + 18.1 + + + 1 + altera_avalon_timer + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Interval Timer Intel FPGA IP + 18.1 + + + 1 + altera_mm_interconnect + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + MM Interconnect + 18.1 + + + 1 + altera_irq_mapper + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Merlin IRQ Mapper + 18.1 + + + 1 + altera_reset_controller + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Merlin Reset Controller + 18.1 + + + 1 + altera_reset_translator + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Reset Translator + 18.1 + + + 5 + clock + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Clock Connection + 18.1 + + + 9 + avalon + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Avalon Memory Mapped Connection + 18.1 + + + 4 + clock + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Clock Connection + 18.1 + + + 3 + interrupt + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Interrupt Connection + 18.1 + + + 14 + reset + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Reset Connection + 18.1 + + 18.1 625 + 7831C1D0809000000183EFC2B97A + diff --git a/Top/niosII/synthesis/niosII.qip b/Top/niosII/synthesis/niosII.qip new file mode 100644 index 0000000..8dabd6b --- /dev/null +++ b/Top/niosII/synthesis/niosII.qip @@ -0,0 +1,1176 @@ +set_global_assignment -entity "niosII" -library "niosII" -name IP_TOOL_NAME "Qsys" +set_global_assignment -entity "niosII" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -library "niosII" -name SOPCINFO_FILE [file join $::quartus(qip_path) "../../niosII.sopcinfo"] +set_global_assignment -entity "niosII" -library "niosII" -name SLD_INFO "QSYS_NAME niosII HAS_SOPCINFO 1 GENERATION_ID 1666174853" +set_global_assignment -library "niosII" -name MISC_FILE [file join $::quartus(qip_path) "../niosII.cmp"] +set_global_assignment -library "niosII" -name SLD_FILE [file join $::quartus(qip_path) "niosII.regmap"] +set_global_assignment -library "niosII" -name SLD_FILE [file join $::quartus(qip_path) "niosII.debuginfo"] +set_global_assignment -entity "niosII" -library "niosII" -name IP_TARGETED_DEVICE_FAMILY "Cyclone IV E" +set_global_assignment -entity "niosII" -library "niosII" -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}" +set_global_assignment -entity "niosII" -library "niosII" -name IP_QSYS_MODE "SYSTEM" +set_global_assignment -name SYNTHESIS_ONLY_QIP ON +set_global_assignment -library "niosII" -name MISC_FILE [file join $::quartus(qip_path) "../../niosII.qsys"] +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJ" +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "bmlvc0lJ" +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "On" +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_VERSION "MS4w" +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19HRU5FUkFUSU9OX0lE::MTY2NjE3NDg1Mw==::QXV0byBHRU5FUkFUSU9OX0lE" +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::Q3ljbG9uZSBJViBF::QXV0byBERVZJQ0VfRkFNSUxZ" +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::RVA0Q0UxMTVGMjlDNw==::QXV0byBERVZJQ0U=" +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::Nw==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ==" +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19DTEtfQ0xPQ0tfUkFURQ==::LTE=::QXV0byBDTE9DS19SQVRF" +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19DTEtfQ0xPQ0tfRE9NQUlO::LTE=::QXV0byBDTE9DS19ET01BSU4=" +set_global_assignment -entity "niosII" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19DTEtfUkVTRVRfRE9NQUlO::LTE=::QXV0byBSRVNFVF9ET01BSU4=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_NAME "YWx0ZXJhX3Jlc2V0X2NvbnRyb2xsZXI=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVybGluIFJlc2V0IENvbnRyb2xsZXI=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_DESCRIPTION "Rm9yIHN5c3RlbXMgd2l0aCBtdWx0aXBsZSByZXNldCBpbnB1dHMsIHRoZSBNZXJsaW4gUmVzZXQgQ29udHJvbGxlciBPUnMgYWxsIHJlc2V0IGlucHV0cyBhbmQgZ2VuZXJhdGVzIGEgc2luZ2xlIHJlc2V0IG91dHB1dC4=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "TlVNX1JFU0VUX0lOUFVUUw==::Mg==::TnVtYmVyIG9mIGlucHV0cw==" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "T1VUUFVUX1JFU0VUX1NZTkNfRURHRVM=::ZGVhc3NlcnQ=::T3V0cHV0IFJlc2V0IFN5bmNocm9ub3VzIEVkZ2Vz" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "U1lOQ19ERVBUSA==::Mg==::U3luY2hyb25pemVyIGRlcHRo" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "UkVTRVRfUkVRVUVTVF9QUkVTRU5U::MQ==::UmVzZXQgcmVxdWVzdCBsb2dpYyBlbmFibGU=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "UkVTRVRfUkVRX1dBSVRfVElNRQ==::MQ==::UmVzZXQgcmVxdWVzdCB3YWl0IHRpbWU=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "TUlOX1JTVF9BU1NFUlRJT05fVElNRQ==::Mw==::TWluaW11bSByZXNldCBhc3NlcnRpb24gdGltZQ==" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "UkVTRVRfUkVRX0VBUkxZX0RTUlRfVElNRQ==::MQ==::UmVzZXQgcmVxdWVzdCBkZWFzc2VydCB0aW1pbmc=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4w::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjA=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4x::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjE=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4y::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjI=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4z::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjM=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU40::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjQ=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU41::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjU=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU42::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjY=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU43::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjc=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU44::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjg=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU45::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjk=" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMA==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEw" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMQ==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEx" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMg==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEy" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMw==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEz" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xNA==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjE0" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xNQ==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjE1" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU5QVVQ=::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcmVzZXRfaW5wdXRz" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_COMPONENT_PARAMETER "QURBUFRfUkVTRVRfUkVRVUVTVA==::MA==::T25seSBhZGFwdCBvbmx5IHJlc2V0IHJlcXVlc3Q=" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX2lycV9tYXBwZXI=" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVybGluIElSUSBNYXBwZXI=" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_COMPONENT_DESCRIPTION "Q29udmVydHMgaW5kaXZpZHVhbCBpbnRlcnJ1cHQgd2lyZXMgdG8gYSBidXMuIEJ5IGRlZmF1bHQsIHRoZSBpbnRlcnJ1cHQgc2VuZGVyIGNvbm5lY3RlZCB0byB0aGUgcmVjZWl2ZXIwIGludGVyZmFjZSBvZiB0aGUgSVJRIG1hcHBlciBpcyB0aGUgaGlnaGVzdCBwcmlvcml0eSB3aXRoIHNlcXVlbnRpYWwgcmVjZWl2ZXJzIGJlaWluZyBzdWNjZXNzaXZlbHkgbG93ZXIgcHJpb3JpdHku" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_COMPONENT_PARAMETER "TlVNX1JDVlJT::Mg==::TnVtYmVyIG9mIHJlY2VpdmVycw==" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VOREVSX0lSUV9XSURUSA==::MzI=::U2VuZGVyIGludGVycnVwdCB3aWR0aA==" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_COMPONENT_PARAMETER "SVJRX01BUA==::MDowLDE6MQ==::SVJRIG1hcA==" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::Q3ljbG9uZSBJViBF::QXV0byBERVZJQ0VfRkFNSUxZ" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8w" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TU0gSW50ZXJjb25uZWN0" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_COMPONENT_INTERNAL "On" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_COMPONENT_DESCRIPTION "TU0gSW50ZXJjb25uZWN0" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::Q3ljbG9uZSBJViBF::QXV0byBERVZJQ0VfRkFNSUxZ" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::RVA0Q0UxMTVGMjlDNw==::QXV0byBERVZJQ0U=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX2F2YWxvbl9zdF9hZGFwdGVy" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uLVNUIEFkYXB0ZXI=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_DESCRIPTION "QWRhcHQgbWlzbWF0Y2hlZCBBdmFsb24tU1QgZW5kcG9pbnRz" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5CaXRzUGVyU3ltYm9s::MzQ=::U3ltYm9sIFdpZHRo" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5Vc2VQYWNrZXRz::MA==::VXNlIFBhY2tldA==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5EYXRhV2lkdGg=::MzQ=::U291cmNlIERhdGEgV2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5NYXhDaGFubmVs::MA==::U291cmNlIE1heCBDaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5DaGFubmVsV2lkdGg=::MA==::U291cmNlIENoYW5uZWwgUG9ydCBXaWR0aA==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5FcnJvcldpZHRo::MA==::U291cmNlIEVycm9yIFBvcnQgV2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5Vc2VFbXB0eVBvcnQ=::MA==::U291cmNlIFVzZXMgRW1wdHkgUG9ydA==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5FbXB0eVdpZHRo::MQ==::U291cmNlIEVtcHR5IFBvcnQgV2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5Vc2VWYWxpZA==::MQ==::U291cmNlIFVzZXMgVmFsaWQgUG9ydA==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5Vc2VSZWFkeQ==::MQ==::U291cmNlIFVzZXMgUmVhZHkgUG9ydA==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5SZWFkeUxhdGVuY3k=::MA==::U291cmNlIFJlYWR5IExhdGVuY3k=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "b3V0RGF0YVdpZHRo::MzQ=::U2luayBEYXRhIFdpZHRo" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "b3V0TWF4Q2hhbm5lbA==::MA==::U2luayBNYXggQ2hhbm5lbA==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "b3V0Q2hhbm5lbFdpZHRo::MA==::U2luayBDaGFubmVsIFBvcnQgV2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "b3V0RXJyb3JXaWR0aA==::MQ==::U2luayBFcnJvciBQb3J0IFdpZHRo" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "b3V0VXNlRW1wdHlQb3J0::MA==::U2luayBVc2VzIEVtcHR5IFBvcnQ=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "b3V0RW1wdHlXaWR0aA==::MQ==::U2luayBFbXB0eSBQb3J0IFdpZHRo" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "b3V0VXNlVmFsaWQ=::MQ==::U2luayBVc2VzIFZhbGlkIFBvcnQ=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "b3V0VXNlUmVhZHk=::MQ==::U2luayBVc2VzIFJlYWR5IFBvcnQ=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "b3V0UmVhZHlMYXRlbmN5::MA==::U2luayBSZWFkeSBMYXRlbmN5" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::Q3ljbG9uZSBJViBF::QXV0byBERVZJQ0VfRkFNSUxZ" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::RVA0Q0UxMTVGMjlDNw==::QXV0byBERVZJQ0U=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX2F2YWxvbl9zdF9hZGFwdGVyX2Vycm9yX2FkYXB0ZXJfMA==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uLVNUIEVycm9yIEFkYXB0ZXI=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5DaGFubmVsV2lkdGg=::MA==::Q2hhbm5lbCBTaWduYWwgV2lkdGggKGJpdHMp" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5NYXhDaGFubmVs::MA==::TWF4IENoYW5uZWw=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5CaXRzUGVyU3ltYm9s::MzQ=::RGF0YSBCaXRzIFBlciBTeW1ib2w=" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5Vc2VQYWNrZXRz::ZmFsc2U=::SW5jbHVkZSBQYWNrZXQgU3VwcG9ydA==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5Vc2VFbXB0eQ==::ZmFsc2U=::aW5Vc2VFbXB0eQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5TeW1ib2xzUGVyQmVhdA==::MQ==::RGF0YSBTeW1ib2xzIFBlciBCZWF0" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5Vc2VSZWFkeQ==::dHJ1ZQ==::U3VwcG9ydCBCYWNrcHJlc3N1cmUgd2l0aCB0aGUgcmVhZHkgc2lnbmFs" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5SZWFkeUxhdGVuY3k=::MA==::UmVhZHkgTGF0ZW5jeQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5FcnJvcldpZHRo::MA==::RXJyb3IgU2lnbmFsIFdpZHRoIChiaXRzKQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_COMPONENT_PARAMETER "b3V0RXJyb3JXaWR0aA==::MQ==::RXJyb3IgU2lnbmFsIFdpZHRoIChiaXRzKQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX3JzcF9tdXhfMDAx" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBNdWx0aXBsZXhlcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_DESCRIPTION "QXJiaXRyYXRlcyBiZXR3ZWVuIHJlcXVlc3RpbmcgbWFzdGVycyB1c2luZyBhbiBlcXVhbCBzaGFyZSwgcm91bmQtcm9iaW4gYWxnb3JpdGhtLiBUaGUgYXJiaXRyYXRpb24gc2NoZW1lIGNhbiBiZSBjaGFuZ2VkIHRvIHdlaWdodGVkIHJvdW5kLXJvYmluIGJ5IHNwZWNpZnlpbmcgYSByZWxhdGl2ZSBudW1iZXIgb2YgYXJiaXRyYXRpb24gc2hhcmVzIHRvIHRoZSBtYXN0ZXJzIHRoYXQgYWNjZXNzIGEgcGFydGljdWxhciBzbGF2ZS4=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::U3RyZWFtaW5nIGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "TlVNX0lOUFVUUw==::Mg==::TnVtYmVyIG9mIG11eCBpbnB1dHM=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "UElQRUxJTkVfQVJC::MA==::UGlwZWxpbmVkIGFyYml0cmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0VYVEVSTkFMX0FSQg==::MA==::VXNlIGV4dGVybmFsIGFyYml0cmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX0xPQ0s=::NTg=::UGFja2V0IGxvY2sgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "QVJCSVRSQVRJT05fU0NIRU1F::bm8tYXJi::QXJiaXRyYXRpb24gc2NoZW1l" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "QVJCSVRSQVRJT05fU0hBUkVT::MSwx::QXJiaXRyYXRpb24gc2hhcmVz" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX3JzcF9tdXg=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBNdWx0aXBsZXhlcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_DESCRIPTION "QXJiaXRyYXRlcyBiZXR3ZWVuIHJlcXVlc3RpbmcgbWFzdGVycyB1c2luZyBhbiBlcXVhbCBzaGFyZSwgcm91bmQtcm9iaW4gYWxnb3JpdGhtLiBUaGUgYXJiaXRyYXRpb24gc2NoZW1lIGNhbiBiZSBjaGFuZ2VkIHRvIHdlaWdodGVkIHJvdW5kLXJvYmluIGJ5IHNwZWNpZnlpbmcgYSByZWxhdGl2ZSBudW1iZXIgb2YgYXJiaXRyYXRpb24gc2hhcmVzIHRvIHRoZSBtYXN0ZXJzIHRoYXQgYWNjZXNzIGEgcGFydGljdWxhciBzbGF2ZS4=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::U3RyZWFtaW5nIGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "TlVNX0lOUFVUUw==::Ng==::TnVtYmVyIG9mIG11eCBpbnB1dHM=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "UElQRUxJTkVfQVJC::MA==::UGlwZWxpbmVkIGFyYml0cmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0VYVEVSTkFMX0FSQg==::MA==::VXNlIGV4dGVybmFsIGFyYml0cmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX0xPQ0s=::NTg=::UGFja2V0IGxvY2sgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "QVJCSVRSQVRJT05fU0NIRU1F::bm8tYXJi::QXJiaXRyYXRpb24gc2NoZW1l" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "QVJCSVRSQVRJT05fU0hBUkVT::MSwxLDEsMSwxLDE=::QXJiaXRyYXRpb24gc2hhcmVz" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX3JzcF9kZW11eA==" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBEZW11bHRpcGxleGVy" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_DESCRIPTION "QWNjZXB0cyBjaGFubmVsaXplZCBkYXRhIG9uIGl0cyBzaW5rIGludGVyZmFjZSBhbmQgdHJhbnNtaXRzIHRoZSBkYXRhIG9uIG9uZSBvZiBpdHMgc291cmNlIGludGVyZmFjZXMu" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::UGFja2V0IGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "TlVNX09VVFBVVFM=::MQ==::TnVtYmVyIG9mIGRlbXV4IG91dHB1dHM=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "VkFMSURfV0lEVEg=::MQ==::VmFsaWQgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::Q3ljbG9uZSBJViBF::QXV0byBERVZJQ0VfRkFNSUxZ" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19DTEtfQ0xPQ0tfUkFURQ==::NTAwMDAwMDA=::QXV0byBDTE9DS19SQVRF" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX2NtZF9tdXhfMDAy" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBNdWx0aXBsZXhlcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_DESCRIPTION "QXJiaXRyYXRlcyBiZXR3ZWVuIHJlcXVlc3RpbmcgbWFzdGVycyB1c2luZyBhbiBlcXVhbCBzaGFyZSwgcm91bmQtcm9iaW4gYWxnb3JpdGhtLiBUaGUgYXJiaXRyYXRpb24gc2NoZW1lIGNhbiBiZSBjaGFuZ2VkIHRvIHdlaWdodGVkIHJvdW5kLXJvYmluIGJ5IHNwZWNpZnlpbmcgYSByZWxhdGl2ZSBudW1iZXIgb2YgYXJiaXRyYXRpb24gc2hhcmVzIHRvIHRoZSBtYXN0ZXJzIHRoYXQgYWNjZXNzIGEgcGFydGljdWxhciBzbGF2ZS4=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::U3RyZWFtaW5nIGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_PARAMETER "TlVNX0lOUFVUUw==::Mg==::TnVtYmVyIG9mIG11eCBpbnB1dHM=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_PARAMETER "UElQRUxJTkVfQVJC::MQ==::UGlwZWxpbmVkIGFyYml0cmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0VYVEVSTkFMX0FSQg==::MA==::VXNlIGV4dGVybmFsIGFyYml0cmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX0xPQ0s=::NTg=::UGFja2V0IGxvY2sgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_PARAMETER "QVJCSVRSQVRJT05fU0NIRU1F::cm91bmQtcm9iaW4=::QXJiaXRyYXRpb24gc2NoZW1l" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_PARAMETER "QVJCSVRSQVRJT05fU0hBUkVT::MSwx::QXJiaXRyYXRpb24gc2hhcmVz" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX2NtZF9tdXg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBNdWx0aXBsZXhlcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_DESCRIPTION "QXJiaXRyYXRlcyBiZXR3ZWVuIHJlcXVlc3RpbmcgbWFzdGVycyB1c2luZyBhbiBlcXVhbCBzaGFyZSwgcm91bmQtcm9iaW4gYWxnb3JpdGhtLiBUaGUgYXJiaXRyYXRpb24gc2NoZW1lIGNhbiBiZSBjaGFuZ2VkIHRvIHdlaWdodGVkIHJvdW5kLXJvYmluIGJ5IHNwZWNpZnlpbmcgYSByZWxhdGl2ZSBudW1iZXIgb2YgYXJiaXRyYXRpb24gc2hhcmVzIHRvIHRoZSBtYXN0ZXJzIHRoYXQgYWNjZXNzIGEgcGFydGljdWxhciBzbGF2ZS4=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::U3RyZWFtaW5nIGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "TlVNX0lOUFVUUw==::MQ==::TnVtYmVyIG9mIG11eCBpbnB1dHM=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "UElQRUxJTkVfQVJC::MQ==::UGlwZWxpbmVkIGFyYml0cmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0VYVEVSTkFMX0FSQg==::MA==::VXNlIGV4dGVybmFsIGFyYml0cmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX0xPQ0s=::NTg=::UGFja2V0IGxvY2sgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "QVJCSVRSQVRJT05fU0NIRU1F::cm91bmQtcm9iaW4=::QXJiaXRyYXRpb24gc2NoZW1l" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "QVJCSVRSQVRJT05fU0hBUkVT::MQ==::QXJiaXRyYXRpb24gc2hhcmVz" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX2NtZF9kZW11eF8wMDE=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBEZW11bHRpcGxleGVy" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_DESCRIPTION "QWNjZXB0cyBjaGFubmVsaXplZCBkYXRhIG9uIGl0cyBzaW5rIGludGVyZmFjZSBhbmQgdHJhbnNtaXRzIHRoZSBkYXRhIG9uIG9uZSBvZiBpdHMgc291cmNlIGludGVyZmFjZXMu" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::UGFja2V0IGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "TlVNX09VVFBVVFM=::Mg==::TnVtYmVyIG9mIGRlbXV4IG91dHB1dHM=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "VkFMSURfV0lEVEg=::MQ==::VmFsaWQgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::Q3ljbG9uZSBJViBF::QXV0byBERVZJQ0VfRkFNSUxZ" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19DTEtfQ0xPQ0tfUkFURQ==::NTAwMDAwMDA=::QXV0byBDTE9DS19SQVRF" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX2NtZF9kZW11eA==" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBEZW11bHRpcGxleGVy" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_DESCRIPTION "QWNjZXB0cyBjaGFubmVsaXplZCBkYXRhIG9uIGl0cyBzaW5rIGludGVyZmFjZSBhbmQgdHJhbnNtaXRzIHRoZSBkYXRhIG9uIG9uZSBvZiBpdHMgc291cmNlIGludGVyZmFjZXMu" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::UGFja2V0IGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "TlVNX09VVFBVVFM=::Ng==::TnVtYmVyIG9mIGRlbXV4IG91dHB1dHM=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "VkFMSURfV0lEVEg=::MQ==::VmFsaWQgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::Q3ljbG9uZSBJViBF::QXV0byBERVZJQ0VfRkFNSUxZ" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19DTEtfQ0xPQ0tfUkFURQ==::NTAwMDAwMDA=::QXV0byBDTE9DS19SQVRF" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX3JvdXRlcl8wMDg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBSb3V0ZXI=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_DESCRIPTION "Um91dGVzIGNvbW1hbmQgcGFja2V0cyBmcm9tIHRoZSBtYXN0ZXIgdG8gdGhlIHNsYXZlIGFuZCByZXNwb25zZSBwYWNrZXRzIGZyb20gdGhlIHNsYXZlIHRvIHRoZSBtYXN0ZXIu" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "REVTVElOQVRJT05fSUQ=::MQ==::RGVzdGluYXRpb24gSUQ=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "Q0hBTk5FTF9JRA==::MQ==::QmluYXJ5IENoYW5uZWwgU3RyaW5n" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "VFlQRV9PRl9UUkFOU0FDVElPTg==::cmVhZA==::VHlwZSBvZiBUcmFuc2FjdGlvbg==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RBUlRfQUREUkVTUw==::MHgw::U3RhcnQgYWRkcmVzc2VzIChpbmNsdXNpdmUp" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "RU5EX0FERFJFU1M=::MHgw::RW5kIGFkZHJlc3NlcyAoZXhjbHVzaXZlKQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "Tk9OX1NFQ1VSRURfVEFH::MQ==::Tm9uLXNlY3VyZWQgdGFncw==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VDVVJFRF9SQU5HRV9QQUlSUw==::MA==::TnVtYmVyIG9mIHNlY3VyZWQgcmFuZ2UgcGFpcnM=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VDVVJFRF9SQU5HRV9MSVNU::MA==::U2VjdXJlZCByYW5nZSBwYWlycw==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfSA==::NTM=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfTA==::MzY=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fSA==::ODQ=::UGFja2V0IEFYSSBwcm90ZWN0aW9uIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fTA==::ODI=::UGFja2V0IEFYSSBwcm90ZWN0aW9uIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfSA==::ODA=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfTA==::Nzg=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1dSSVRF::NTY=::UGFja2V0IHdyaXRlIHRyYW5zYWN0aW9uIGZpZWxkIGluZGV4" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1JFQUQ=::NTc=::UGFja2V0IHJlYWQgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::U3RyZWFtaW5nIGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "U0xBVkVTX0lORk8=::MToxOjB4MDoweDA6cmVhZDoxOjA6MDox::U0xBVkVTX0lORk8=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "REVDT0RFUl9UWVBF::MQ==::RGVjb2RlciB0eXBl" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9DSEFOTkVM::MA==::RGVmYXVsdCBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9XUl9DSEFOTkVM::LTE=::RGVmYXVsdCB3ciBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9SRF9DSEFOTkVM::LTE=::RGVmYXVsdCByZCBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9ERVNUSUQ=::MQ==::RGVmYXVsdCBkZXN0aW5hdGlvbiBJRA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVNT1JZX0FMSUFTSU5HX0RFQ09ERQ==::MA==::TWVtb3J5IEFsaWFzaW5nIERlY29kZQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX3JvdXRlcl8wMDQ=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBSb3V0ZXI=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_DESCRIPTION "Um91dGVzIGNvbW1hbmQgcGFja2V0cyBmcm9tIHRoZSBtYXN0ZXIgdG8gdGhlIHNsYXZlIGFuZCByZXNwb25zZSBwYWNrZXRzIGZyb20gdGhlIHNsYXZlIHRvIHRoZSBtYXN0ZXIu" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "REVTVElOQVRJT05fSUQ=::MCwx::RGVzdGluYXRpb24gSUQ=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "Q0hBTk5FTF9JRA==::MDEsMTA=::QmluYXJ5IENoYW5uZWwgU3RyaW5n" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "VFlQRV9PRl9UUkFOU0FDVElPTg==::Ym90aCxyZWFk::VHlwZSBvZiBUcmFuc2FjdGlvbg==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RBUlRfQUREUkVTUw==::MHgwLDB4MA==::U3RhcnQgYWRkcmVzc2VzIChpbmNsdXNpdmUp" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "RU5EX0FERFJFU1M=::MHgwLDB4MA==::RW5kIGFkZHJlc3NlcyAoZXhjbHVzaXZlKQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "Tk9OX1NFQ1VSRURfVEFH::MSwx::Tm9uLXNlY3VyZWQgdGFncw==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VDVVJFRF9SQU5HRV9QQUlSUw==::MCww::TnVtYmVyIG9mIHNlY3VyZWQgcmFuZ2UgcGFpcnM=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VDVVJFRF9SQU5HRV9MSVNU::MCww::U2VjdXJlZCByYW5nZSBwYWlycw==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfSA==::NTM=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfTA==::MzY=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fSA==::ODQ=::UGFja2V0IEFYSSBwcm90ZWN0aW9uIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fTA==::ODI=::UGFja2V0IEFYSSBwcm90ZWN0aW9uIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfSA==::ODA=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfTA==::Nzg=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1dSSVRF::NTY=::UGFja2V0IHdyaXRlIHRyYW5zYWN0aW9uIGZpZWxkIGluZGV4" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1JFQUQ=::NTc=::UGFja2V0IHJlYWQgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::U3RyZWFtaW5nIGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "U0xBVkVTX0lORk8=::MDowMToweDA6MHgwOmJvdGg6MTowOjA6MSwxOjEwOjB4MDoweDA6cmVhZDoxOjA6MDox::U0xBVkVTX0lORk8=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "REVDT0RFUl9UWVBF::MQ==::RGVjb2RlciB0eXBl" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9DSEFOTkVM::MA==::RGVmYXVsdCBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9XUl9DSEFOTkVM::LTE=::RGVmYXVsdCB3ciBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9SRF9DSEFOTkVM::LTE=::RGVmYXVsdCByZCBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9ERVNUSUQ=::MA==::RGVmYXVsdCBkZXN0aW5hdGlvbiBJRA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVNT1JZX0FMSUFTSU5HX0RFQ09ERQ==::MA==::TWVtb3J5IEFsaWFzaW5nIERlY29kZQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX3JvdXRlcl8wMDI=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBSb3V0ZXI=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_DESCRIPTION "Um91dGVzIGNvbW1hbmQgcGFja2V0cyBmcm9tIHRoZSBtYXN0ZXIgdG8gdGhlIHNsYXZlIGFuZCByZXNwb25zZSBwYWNrZXRzIGZyb20gdGhlIHNsYXZlIHRvIHRoZSBtYXN0ZXIu" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "REVTVElOQVRJT05fSUQ=::MA==::RGVzdGluYXRpb24gSUQ=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "Q0hBTk5FTF9JRA==::MQ==::QmluYXJ5IENoYW5uZWwgU3RyaW5n" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "VFlQRV9PRl9UUkFOU0FDVElPTg==::Ym90aA==::VHlwZSBvZiBUcmFuc2FjdGlvbg==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RBUlRfQUREUkVTUw==::MHgw::U3RhcnQgYWRkcmVzc2VzIChpbmNsdXNpdmUp" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "RU5EX0FERFJFU1M=::MHgw::RW5kIGFkZHJlc3NlcyAoZXhjbHVzaXZlKQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "Tk9OX1NFQ1VSRURfVEFH::MQ==::Tm9uLXNlY3VyZWQgdGFncw==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VDVVJFRF9SQU5HRV9QQUlSUw==::MA==::TnVtYmVyIG9mIHNlY3VyZWQgcmFuZ2UgcGFpcnM=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VDVVJFRF9SQU5HRV9MSVNU::MA==::U2VjdXJlZCByYW5nZSBwYWlycw==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfSA==::NTM=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfTA==::MzY=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fSA==::ODQ=::UGFja2V0IEFYSSBwcm90ZWN0aW9uIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fTA==::ODI=::UGFja2V0IEFYSSBwcm90ZWN0aW9uIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfSA==::ODA=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfTA==::Nzg=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1dSSVRF::NTY=::UGFja2V0IHdyaXRlIHRyYW5zYWN0aW9uIGZpZWxkIGluZGV4" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1JFQUQ=::NTc=::UGFja2V0IHJlYWQgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::U3RyZWFtaW5nIGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "U0xBVkVTX0lORk8=::MDoxOjB4MDoweDA6Ym90aDoxOjA6MDox::U0xBVkVTX0lORk8=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "REVDT0RFUl9UWVBF::MQ==::RGVjb2RlciB0eXBl" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9DSEFOTkVM::MA==::RGVmYXVsdCBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9XUl9DSEFOTkVM::LTE=::RGVmYXVsdCB3ciBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9SRF9DSEFOTkVM::LTE=::RGVmYXVsdCByZCBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9ERVNUSUQ=::MA==::RGVmYXVsdCBkZXN0aW5hdGlvbiBJRA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVNT1JZX0FMSUFTSU5HX0RFQ09ERQ==::MA==::TWVtb3J5IEFsaWFzaW5nIERlY29kZQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX3JvdXRlcl8wMDE=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBSb3V0ZXI=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_DESCRIPTION "Um91dGVzIGNvbW1hbmQgcGFja2V0cyBmcm9tIHRoZSBtYXN0ZXIgdG8gdGhlIHNsYXZlIGFuZCByZXNwb25zZSBwYWNrZXRzIGZyb20gdGhlIHNsYXZlIHRvIHRoZSBtYXN0ZXIu" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "REVTVElOQVRJT05fSUQ=::Miww::RGVzdGluYXRpb24gSUQ=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "Q0hBTk5FTF9JRA==::MTAsMDE=::QmluYXJ5IENoYW5uZWwgU3RyaW5n" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "VFlQRV9PRl9UUkFOU0FDVElPTg==::Ym90aCxib3Ro::VHlwZSBvZiBUcmFuc2FjdGlvbg==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RBUlRfQUREUkVTUw==::MHgwLDB4MjA4MDA=::U3RhcnQgYWRkcmVzc2VzIChpbmNsdXNpdmUp" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "RU5EX0FERFJFU1M=::MHgyMDAwMCwweDIxMDAw::RW5kIGFkZHJlc3NlcyAoZXhjbHVzaXZlKQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "Tk9OX1NFQ1VSRURfVEFH::MSwx::Tm9uLXNlY3VyZWQgdGFncw==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VDVVJFRF9SQU5HRV9QQUlSUw==::MCww::TnVtYmVyIG9mIHNlY3VyZWQgcmFuZ2UgcGFpcnM=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VDVVJFRF9SQU5HRV9MSVNU::MCww::U2VjdXJlZCByYW5nZSBwYWlycw==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfSA==::NTM=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfTA==::MzY=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fSA==::ODQ=::UGFja2V0IEFYSSBwcm90ZWN0aW9uIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fTA==::ODI=::UGFja2V0IEFYSSBwcm90ZWN0aW9uIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfSA==::ODA=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfTA==::Nzg=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1dSSVRF::NTY=::UGFja2V0IHdyaXRlIHRyYW5zYWN0aW9uIGZpZWxkIGluZGV4" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1JFQUQ=::NTc=::UGFja2V0IHJlYWQgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::U3RyZWFtaW5nIGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "U0xBVkVTX0lORk8=::MjoxMDoweDA6MHgyMDAwMDpib3RoOjE6MDowOjEsMDowMToweDIwODAwOjB4MjEwMDA6Ym90aDoxOjA6MDox::U0xBVkVTX0lORk8=" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "REVDT0RFUl9UWVBF::MA==::RGVjb2RlciB0eXBl" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9DSEFOTkVM::MQ==::RGVmYXVsdCBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9XUl9DSEFOTkVM::LTE=::RGVmYXVsdCB3ciBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9SRF9DSEFOTkVM::LTE=::RGVmYXVsdCByZCBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9ERVNUSUQ=::Mg==::RGVmYXVsdCBkZXN0aW5hdGlvbiBJRA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVNT1JZX0FMSUFTSU5HX0RFQ09ERQ==::MA==::TWVtb3J5IEFsaWFzaW5nIERlY29kZQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21tX2ludGVyY29ubmVjdF8wX3JvdXRlcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TWVtb3J5IE1hcHBlZCBSb3V0ZXI=" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_DESCRIPTION "Um91dGVzIGNvbW1hbmQgcGFja2V0cyBmcm9tIHRoZSBtYXN0ZXIgdG8gdGhlIHNsYXZlIGFuZCByZXNwb25zZSBwYWNrZXRzIGZyb20gdGhlIHNsYXZlIHRvIHRoZSBtYXN0ZXIu" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "REVTVElOQVRJT05fSUQ=::MywwLDYsNSw0LDE=::RGVzdGluYXRpb24gSUQ=" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "Q0hBTk5FTF9JRA==::MTAwMDAwLDAwMDEwMCwwMTAwMDAsMDAxMDAwLDAwMDAxMCwwMDAwMDE=::QmluYXJ5IENoYW5uZWwgU3RyaW5n" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "VFlQRV9PRl9UUkFOU0FDVElPTg==::Ym90aCxib3RoLGJvdGgsd3JpdGUsYm90aCxib3Ro::VHlwZSBvZiBUcmFuc2FjdGlvbg==" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RBUlRfQUREUkVTUw==::MHgwLDB4MjA4MDAsMHgyMTAwMCwweDIxMDIwLDB4MjEwMzAsMHgyMTAzOA==::U3RhcnQgYWRkcmVzc2VzIChpbmNsdXNpdmUp" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "RU5EX0FERFJFU1M=::MHgyMDAwMCwweDIxMDAwLDB4MjEwMjAsMHgyMTAzMCwweDIxMDM4LDB4MjEwNDA=::RW5kIGFkZHJlc3NlcyAoZXhjbHVzaXZlKQ==" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "Tk9OX1NFQ1VSRURfVEFH::MSwxLDEsMSwxLDE=::Tm9uLXNlY3VyZWQgdGFncw==" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VDVVJFRF9SQU5HRV9QQUlSUw==::MCwwLDAsMCwwLDA=::TnVtYmVyIG9mIHNlY3VyZWQgcmFuZ2UgcGFpcnM=" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VDVVJFRF9SQU5HRV9MSVNU::MCwwLDAsMCwwLDA=::U2VjdXJlZCByYW5nZSBwYWlycw==" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfSA==::NTM=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfTA==::MzY=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fSA==::ODQ=::UGFja2V0IEFYSSBwcm90ZWN0aW9uIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fTA==::ODI=::UGFja2V0IEFYSSBwcm90ZWN0aW9uIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfSA==::ODA=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfTA==::Nzg=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1dSSVRF::NTY=::UGFja2V0IHdyaXRlIHRyYW5zYWN0aW9uIGZpZWxkIGluZGV4" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1JFQUQ=::NTc=::UGFja2V0IHJlYWQgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::U3RyZWFtaW5nIGRhdGEgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "U0xBVkVTX0lORk8=::MzoxMDAwMDA6MHgwOjB4MjAwMDA6Ym90aDoxOjA6MDoxLDA6MDAwMTAwOjB4MjA4MDA6MHgyMTAwMDpib3RoOjE6MDowOjEsNjowMTAwMDA6MHgyMTAwMDoweDIxMDIwOmJvdGg6MTowOjA6MSw1OjAwMTAwMDoweDIxMDIwOjB4MjEwMzA6d3JpdGU6MTowOjA6MSw0OjAwMDAxMDoweDIxMDMwOjB4MjEwMzg6Ym90aDoxOjA6MDoxLDE6MDAwMDAxOjB4MjEwMzg6MHgyMTA0MDpib3RoOjE6MDowOjE=::U0xBVkVTX0lORk8=" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "REVDT0RFUl9UWVBF::MA==::RGVjb2RlciB0eXBl" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9DSEFOTkVM::NQ==::RGVmYXVsdCBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9XUl9DSEFOTkVM::LTE=::RGVmYXVsdCB3ciBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9SRF9DSEFOTkVM::LTE=::RGVmYXVsdCByZCBjaGFubmVs" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "REVGQVVMVF9ERVNUSUQ=::Mw==::RGVmYXVsdCBkZXN0aW5hdGlvbiBJRA==" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVNT1JZX0FMSUFTSU5HX0RFQ09ERQ==::MA==::TWVtb3J5IEFsaWFzaW5nIERlY29kZQ==" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_NAME "YWx0ZXJhX2F2YWxvbl9zY19maWZv" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uLVNUIFNpbmdsZSBDbG9jayBGSUZP" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "U1lNQk9MU19QRVJfQkVBVA==::MQ==::U3ltYm9scyBwZXIgYmVhdA==" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "QklUU19QRVJfU1lNQk9M::OTU=::Qml0cyBwZXIgc3ltYm9s" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "RklGT19ERVBUSA==::Mg==::RklGTyBkZXB0aA==" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "Q0hBTk5FTF9XSURUSA==::MA==::Q2hhbm5lbCB3aWR0aA==" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "RVJST1JfV0lEVEg=::MA==::RXJyb3Igd2lkdGg=" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1BBQ0tFVFM=::MQ==::VXNlIHBhY2tldHM=" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0ZJTExfTEVWRUw=::MA==::VXNlIGZpbGwgbGV2ZWw=" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "RU1QVFlfTEFURU5DWQ==::MQ==::TGF0ZW5jeQ==" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX01FTU9SWV9CTE9DS1M=::MA==::VXNlIG1lbW9yeSBibG9ja3M=" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1NUT1JFX0ZPUldBUkQ=::MA==::VXNlIHN0b3JlIGFuZCBmb3J3YXJk" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0FMTU9TVF9GVUxMX0lG::MA==::VXNlIGFsbW9zdCBmdWxsIHN0YXR1cw==" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0FMTU9TVF9FTVBUWV9JRg==::MA==::VXNlIGFsbW9zdCBlbXB0eSBzdGF0dXM=" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "RU5BQkxFX0VYUExJQ0lUX01BWENIQU5ORUw=::ZmFsc2U=::RW5hYmxlIGV4cGxpY2l0IG1heENoYW5uZWw=" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_COMPONENT_PARAMETER "RVhQTElDSVRfTUFYQ0hBTk5FTA==::MA==::RXhwbGljaXQgbWF4Q2hhbm5lbA==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_NAME "YWx0ZXJhX21lcmxpbl9zbGF2ZV9hZ2VudA==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uIE1NIFNsYXZlIEFnZW50" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_DESCRIPTION "QWNjZXB0cyBjb21tYW5kIHBhY2tldHMgYW5kIGlzc3VlcyB0aGUgcmVzdWx0aW5nIHRyYW5zYWN0aW9ucyB0byB0aGUgQXZhbG9uIGludGVyZmFjZS4gUmVmZXIgdG8gdGhlIEF2YWxvbiBJbnRlcmZhY2UgU3BlY2lmaWNhdGlvbnMgKGh0dHA6Ly93d3cuYWx0ZXJhLmNvbS9saXRlcmF0dXJlL21hbnVhbC9tbmxfYXZhbG9uX3NwZWMucGRmKSBmb3IgZXhwbGFuYXRpb25zIG9mIHRoZSBidXJzdGluZyBwcm9wZXJ0aWVzLg==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX09SSV9CVVJTVF9TSVpFX0g=::OTM=::UGFja2V0IG9yaWdpbmFsIGJ1cnN0IHNpemUgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX09SSV9CVVJTVF9TSVpFX0w=::OTE=::UGFja2V0IG9yaWdpbmFsIGJ1cnN0IHNpemUgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1JFU1BPTlNFX1NUQVRVU19I::OTA=::UGFja2V0IHJlc3BvbnNlIHN0YXR1cyBmaWVsZCBpbmRleCAtIGhpZ2g=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1JFU1BPTlNFX1NUQVRVU19M::ODk=::UGFja2V0IHJlc3BvbnNlIHN0YXR1cyBmaWVsZCBpbmRleCAtIGxvdw==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JVUlNUX1NJWkVfSA==::Njg=::UGFja2V0IGJ1cnN0c2l6ZSBmaWVsZCBpbmRleCAtIGhpZ2g=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JVUlNUX1NJWkVfTA==::NjY=::UGFja2V0IGJ1cnN0c2l6ZSBmaWVsZCBpbmRleCAtIGxvdw==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX0xPQ0s=::NTg=::UGFja2V0IGxvY2sgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JFR0lOX0JVUlNU::NzM=::UGFja2V0IGJlZ2luIGJ1cnN0IGZpZWxkIGluZGV4" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fSA==::ODQ=::UGFja2V0IHByb3RlY3Rpb24gZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fTA==::ODI=::UGFja2V0IHByb3RlY3Rpb24gZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JVUlNUV1JBUF9I::NjU=::UGFja2V0IGJ1cnN0d3JhcCBmaWVsZCBpbmRleCAtIGhpZ2g=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JVUlNUV1JBUF9M::NjM=::UGFja2V0IGJ1cnN0d3JhcCBmaWVsZCBpbmRleCAtIGxvdw==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JZVEVfQ05UX0g=::NjI=::UGFja2V0IGJ5dGUgY291bnQgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JZVEVfQ05UX0w=::NjA=::UGFja2V0IGJ5dGUgY291bnQgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfSA==::NTM=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfTA==::MzY=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX0NPTVBSRVNTRURfUkVBRA==::NTQ=::UGFja2V0IGNvbXByZXNzZWQgcmVhZCB0cmFuc2FjdGlvbiBmaWVsZCBpbmRleA==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1BPU1RFRA==::NTU=::UGFja2V0IHBvc3RlZCB0cmFuc2FjdGlvbiBmaWVsZCBpbmRleA==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1dSSVRF::NTY=::UGFja2V0IHdyaXRlIHRyYW5zYWN0aW9uIGZpZWxkIGluZGV4" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1JFQUQ=::NTc=::UGFja2V0IHJlYWQgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RBVEFfSA==::MzE=::UGFja2V0IGRhdGEgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RBVEFfTA==::MA==::UGFja2V0IGRhdGEgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JZVEVFTl9I::MzU=::UGFja2V0IGJ5dGVlbmFibGUgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JZVEVFTl9M::MzI=::UGFja2V0IGJ5dGVlbmFibGUgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1NSQ19JRF9I::Nzc=::UGFja2V0IHNvdXJjZSBpZCBmaWVsZCBpbmRleCAtIGhpZ2g=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1NSQ19JRF9M::NzU=::UGFja2V0IHNvdXJjZSBpZCBmaWVsZCBpbmRleCAtIGxvdw==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfSA==::ODA=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfTA==::Nzg=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1NZTUJPTF9X::OA==::UGFja2V0IHN5bWJvbCB3aWR0aA==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::U3RyZWFtaW5nIGRhdGEgd2lkdGg=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZTX0JVUlNUQ09VTlRfU1lNQk9MUw==::MA==::YnVyc3Rjb3VudFN5bWJvbHM=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZTX0JVUlNUQ09VTlRfVw==::Mw==::YnVyc3Rjb3VudCB3aWR0aA==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfTElORVdSQVBCVVJTVFM=::MA==::bGluZXdyYXBCdXJzdHM=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "U1VQUFJFU1NfMF9CWVRFRU5fQ01E::MA==::U3VwcHJlc3MgMC1ieXRlZW5hYmxlIHRyYW5zYWN0aW9ucw==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UFJFVkVOVF9GSUZPX09WRVJGTE9X::MQ==::UHJldmVudCBGSUZPIG92ZXJmbG93" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "TUFYX0JZVEVfQ05U::NA==::TWF4aW11bSBieXRlLWNvdW50IHZhbHVl" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "TUFYX0JVUlNUV1JBUA==::Nw==::TWF4aW11bSBidXJzdHdyYXAgdmFsdWU=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "SUQ=::MQ==::U2xhdmUgSUQ=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFQURSRVNQT05TRQ==::MA==::VXNlIHJlYWRyZXNwb25zZQ==" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFUkVTUE9OU0U=::MA==::VXNlIHdyaXRlcmVzcG9uc2U=" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "RUNDX0VOQUJMRQ==::MA==::RUNDX0VOQUJMRQ==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_NAME "YWx0ZXJhX21lcmxpbl9tYXN0ZXJfYWdlbnQ=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uIE1NIE1hc3RlciBBZ2VudA==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_DESCRIPTION "VHJhbnNsYXRlcyBBdmFsb24tTU0gbWFzdGVyIHRyYW5zYWN0aW9ucyBpbnRvIFFzeXMgY29tbWFuZCBwYWNrZXRzIGFuZCB0cmFuc2xhdGVzIHRoZSBRc3lzIEF2YWxvbi1NTSBzbGF2ZSByZXNwb25zZSBwYWNrZXRzIGludG8gQXZhbG9uLU1NIHJlc3BvbnNlcy4gUmVmZXIgdG8gdGhlIEF2YWxvbiBJbnRlcmZhY2UgU3BlY2lmaWNhdGlvbnMgKGh0dHA6Ly93d3cuYWx0ZXJhLmNvbS9saXRlcmF0dXJlL21hbnVhbC9tbmxfYXZhbG9uX3NwZWMucGRmKSBmb3IgYW4gZXhwbGFuYXRpb24gb2YgYnVyc3RpbmcgYmVoYXZpb3Iu" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX09SSV9CVVJTVF9TSVpFX0g=::OTM=::UGFja2V0IG9yaWdpbmFsIGJ1cnN0IHNpemUgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX09SSV9CVVJTVF9TSVpFX0w=::OTE=::UGFja2V0IG9yaWdpbmFsIGJ1cnN0IHNpemUgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1JFU1BPTlNFX1NUQVRVU19I::OTA=::UGFja2V0IHJlc3BvbnNlIHN0YXR1cyBmaWVsZCBpbmRleCAtIGhpZ2g=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1JFU1BPTlNFX1NUQVRVU19M::ODk=::UGFja2V0IHJlc3BvbnNlIHN0YXR1cyBmaWVsZCBpbmRleCAtIGxvdw==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1FPU19I::NzQ=::UGFja2V0IHFvcyBzaWRlYmFuZCBmaWVsZCBpbmRleCAtIGhpZ2g=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1FPU19M::NzQ=::UGFja2V0IHFvcyBzaWRlYmFuZCBmaWVsZCBpbmRleCAtIGxvdw==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RBVEFfU0lERUJBTkRfSA==::NzI=::UGFja2V0IGRhdGEgc2lkZWJhbmQgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RBVEFfU0lERUJBTkRfTA==::NzI=::UGFja2V0IGRhdGEgc2lkZWJhbmQgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfU0lERUJBTkRfSA==::NzE=::UGFja2V0IGFkZHJlc3Mgc2lkZWJhbmQgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfU0lERUJBTkRfTA==::NzE=::UGFja2V0IGFkZHJlc3Mgc2lkZWJhbmQgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JVUlNUX1RZUEVfSA==::NzA=::UGFja2V0IGJ1cnN0dHlwZSBmaWVsZCBpbmRleCAtIGhpZ2g=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JVUlNUX1RZUEVfTA==::Njk=::UGFja2V0IGJ1cnN0dHlwZSBmaWVsZCBpbmRleCAtIGxvdw==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0NBQ0hFX0g=::ODg=::UGFja2V0IGNhY2hlIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0NBQ0hFX0w=::ODU=::UGFja2V0IGNhY2hlIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RIUkVBRF9JRF9I::ODE=::UGFja2V0IHRocmVhZCBpZCBmaWVsZCBpbmRleCAtIGhpZ2g=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RIUkVBRF9JRF9M::ODE=::UGFja2V0IHRocmVhZCBpZCBmaWVsZCBpbmRleCAtIGxvdw==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JVUlNUX1NJWkVfSA==::Njg=::UGFja2V0IGJ1cnN0c2l6ZSBmaWVsZCBpbmRleCAtIGhpZ2g=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JVUlNUX1NJWkVfTA==::NjY=::UGFja2V0IGJ1cnN0c2l6ZSBmaWVsZCBpbmRleCAtIGxvdw==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX0VYQ0xVU0lWRQ==::NTk=::UGFja2V0IGV4Y2x1c2l2ZSB0cmFuc2FjdGlvbiBmaWVsZCBpbmRleA==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX0xPQ0s=::NTg=::UGFja2V0IGxvY2sgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JFR0lOX0JVUlNU::NzM=::UGFja2V0IGJlZ2luIGJ1cnN0IGZpZWxkIGluZGV4" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fSA==::ODQ=::UGFja2V0IHByb3RlY3Rpb24gZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1BST1RFQ1RJT05fTA==::ODI=::UGFja2V0IHByb3RlY3Rpb24gZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JVUlNUV1JBUF9I::NjU=::UGFja2V0IGJ1cnN0d3JhcCBmaWVsZCBpbmRleCAtIGhpZ2g=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JVUlNUV1JBUF9M::NjM=::UGFja2V0IGJ1cnN0d3JhcCBmaWVsZCBpbmRleCAtIGxvdw==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JZVEVfQ05UX0g=::NjI=::UGFja2V0IGJ5dGUgY291bnQgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JZVEVfQ05UX0w=::NjA=::UGFja2V0IGJ5dGUgY291bnQgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfSA==::NTM=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0FERFJfTA==::MzY=::UGFja2V0IGFkZHJlc3MgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX0NPTVBSRVNTRURfUkVBRA==::NTQ=::UGFja2V0IGNvbXByZXNzZWQgcmVhZCB0cmFuc2FjdGlvbiBmaWVsZCBpbmRleA==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1BPU1RFRA==::NTU=::UGFja2V0IHBvc3RlZCB0cmFuc2FjdGlvbiBmaWVsZCBpbmRleA==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1dSSVRF::NTY=::UGFja2V0IHdyaXRlIHRyYW5zYWN0aW9uIGZpZWxkIGluZGV4" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1RSQU5TX1JFQUQ=::NTc=::UGFja2V0IHJlYWQgdHJhbnNhY3Rpb24gZmllbGQgaW5kZXg=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RBVEFfSA==::MzE=::UGFja2V0IGRhdGEgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RBVEFfTA==::MA==::UGFja2V0IGRhdGEgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JZVEVFTl9I::MzU=::UGFja2V0IGJ5dGVlbmFibGUgZmllbGQgaW5kZXggLSBoaWdo" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0JZVEVFTl9M::MzI=::UGFja2V0IGJ5dGVlbmFibGUgZmllbGQgaW5kZXggLSBsb3c=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1NSQ19JRF9I::Nzc=::UGFja2V0IHNvdXJjZSBpZCBmaWVsZCBpbmRleCAtIGhpZ2g=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX1NSQ19JRF9M::NzU=::UGFja2V0IHNvdXJjZSBpZCBmaWVsZCBpbmRleCAtIGxvdw==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfSA==::ODA=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gaGlnaA==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "UEtUX0RFU1RfSURfTA==::Nzg=::UGFja2V0IGRlc3RpbmF0aW9uIGlkIGZpZWxkIGluZGV4IC0gbG93" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfREFUQV9X::OTQ=::U3RyZWFtaW5nIGRhdGEgd2lkdGg=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "U1RfQ0hBTk5FTF9X::Nw==::U3RyZWFtaW5nIGNoYW5uZWwgd2lkdGg=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9X::Mw==::QXZhbG9uLU1NIGJ1cnN0Y291bnQgd2lkdGg=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfTElORVdSQVBCVVJTVFM=::MA==::bGluZXdyYXBCdXJzdHM=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RCT1VOREFSSUVT::MQ==::YnVyc3RPbkJ1cnN0Qm91bmRhcmllc09ubHk=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "TUVSTElOX1BBQ0tFVF9GT1JNQVQ=::b3JpX2J1cnN0X3NpemUoOTM6OTEpIHJlc3BvbnNlX3N0YXR1cyg5MDo4OSkgY2FjaGUoODg6ODUpIHByb3RlY3Rpb24oODQ6ODIpIHRocmVhZF9pZCg4MSkgZGVzdF9pZCg4MDo3OCkgc3JjX2lkKDc3Ojc1KSBxb3MoNzQpIGJlZ2luX2J1cnN0KDczKSBkYXRhX3NpZGViYW5kKDcyKSBhZGRyX3NpZGViYW5kKDcxKSBidXJzdF90eXBlKDcwOjY5KSBidXJzdF9zaXplKDY4OjY2KSBidXJzdHdyYXAoNjU6NjMpIGJ5dGVfY250KDYyOjYwKSB0cmFuc19leGNsdXNpdmUoNTkpIHRyYW5zX2xvY2soNTgpIHRyYW5zX3JlYWQoNTcpIHRyYW5zX3dyaXRlKDU2KSB0cmFuc19wb3N0ZWQoNTUpIHRyYW5zX2NvbXByZXNzZWRfcmVhZCg1NCkgYWRkcig1MzozNikgYnl0ZWVuKDM1OjMyKSBkYXRhKDMxOjAp::TWVybGluIHBhY2tldCBmb3JtYXQgZGVzY3JpcHRvcg==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "U1VQUFJFU1NfMF9CWVRFRU5fUlNQ::MA==::U3VwcHJlc3MgMC1ieXRlZW5hYmxlIHJlc3BvbnNlcw==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "SUQ=::MA==::TWFzdGVyIElE" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "QlVSU1RXUkFQX1ZBTFVF::Nw==::QnVyc3R3cmFwIHZhbHVl" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "Q0FDSEVfVkFMVUU=::MA==::Q2FjaGUgdmFsdWU=" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "U0VDVVJFX0FDQ0VTU19CSVQ=::MQ==::U2VjdXJpdHkgYml0IHZhbHVl" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFQURSRVNQT05TRQ==::MA==::VXNlIHJlYWRyZXNwb25zZQ==" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFUkVTUE9OU0U=::MA==::VXNlIHdyaXRlcmVzcG9uc2U=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_NAME "YWx0ZXJhX21lcmxpbl9zbGF2ZV90cmFuc2xhdG9y" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uIE1NIFNsYXZlIFRyYW5zbGF0b3I=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_DESCRIPTION "Q29udmVydHMgdGhlIEF2YWxvbi1NTSBzbGF2ZSBpbnRlcmZhY2UgdG8gYSBzaW1wbGlmaWVkIHJlcHJlc2VudGF0aW9uIHRoYXQgdGhlIFFzeXMgbmV0d29yayB1c2VzLiBSZWZlciB0byB0aGUgQXZhbG9uIEludGVyZmFjZSBTcGVjaWZpY2F0aW9ucyAoaHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvbWFudWFsL21ubF9hdmFsb25fc3BlYy5wZGYpIGZvciBkZWZpbml0aW9ucyBvZiB0aGUgQXZhbG9uLU1NIHNpZ25hbHMgYW5kIGV4cGxhbmF0aW9ucyBvZiB0aGUgYnVyc3RpbmcgcHJvcGVydGllcyBhbmQgYWRkcmVzcyBhbGlnbm1lbnQu" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19X::MQ==::Q29tcG9uZW50IGFkZHJlc3Mgd2lkdGg=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9X::MzI=::Q29tcG9uZW50IERhdGEgd2lkdGg=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VUFWX0RBVEFfVw==::MzI=::TmV0d29yayBEYXRhIHdpZHRo" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9X::MQ==::Q29tcG9uZW50IGJ1cnN0Y291bnQgd2lkdGg=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQllURUVOQUJMRV9X::MQ==::Q29tcG9uZW50IGJ5dGVlbmFibGUgd2lkdGg=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VUFWX0JZVEVFTkFCTEVfVw==::NA==::TmV0d29yayBieXRlZW5hYmxlIHdpZHRo" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NfVw==::MTg=::TmV0d29yayBhZGRyZXNzIHdpZHRo" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VUFWX0JVUlNUQ09VTlRfVw==::Mw==::TmV0d29yayBidXJzdGNvdW50IHdpZHRo" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfUkVBRExBVEVOQ1k=::MA==::cmVhZExhdGVuY3k=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfU0VUVVBfV0FJVA==::MA==::c2V0dXBUaW1l" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfV1JJVEVfV0FJVA==::MA==::d3JpdGVXYWl0VGltZQ==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfUkVBRF9XQUlU::MQ==::cmVhZFdhaXRUaW1l" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9IT0xE::MA==::SG9sZCB0aW1l" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfVElNSU5HX1VOSVRT::MQ==::VGltaW5nIHVuaXRz" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRB::MQ==::VXNlIHJlYWRkYXRh" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFREFUQQ==::MQ==::VXNlIHdyaXRlZGF0YQ==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUQ=::MQ==::VXNlIHJlYWQ=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRF::MQ==::VXNlIHdyaXRl" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOQlVSU1RUUkFOU0ZFUg==::MA==::VXNlIGJlZ2luYnVyc3R0cmFuc2Zlcg==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOVFJBTlNGRVI=::MA==::VXNlIGJlZ2ludHJhbnNmZXI=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0JZVEVFTkFCTEU=::MA==::VXNlIGJ5dGVlbmFibGU=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0NISVBTRUxFQ1Q=::MQ==::VXNlIGNoaXBzZWxlY3Q=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0FERFJFU1M=::MQ==::VXNlIGFkZHJlc3M=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0JVUlNUQ09VTlQ=::MA==::VXNlIGJ1cnN0Y291bnQ=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRBVkFMSUQ=::MA==::VXNlIHJlYWRkYXRhdmFsaWQ=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1dBSVRSRVFVRVNU::MQ==::VXNlIHdhaXRyZXF1ZXN0" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFQllURUVOQUJMRQ==::MA==::VXNlIHdyaXRlYnl0ZWVuYWJsZQ==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0xPQ0s=::MA==::VXNlIGxvY2s=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0FWX0NMS0VO::MA==::VXNlIGNvbXBvbmVudCBjbGtlbg==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1VBVl9DTEtFTg==::MA==::VXNlIG5ldHdvcmsgY2xrZW4=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX09VVFBVVEVOQUJMRQ==::MA==::VXNlIG91dHB1dGVuYWJsZQ==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0RFQlVHQUNDRVNT::MA==::VXNlIGRlYnVnYWNjZXNz" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFQURSRVNQT05TRQ==::MA==::VXNlIHJlYWRyZXNwb25zZQ==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFUkVTUE9OU0U=::MA==::VXNlIHdyaXRlcmVzcG9uc2U=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfU1lNQk9MU19QRVJfV09SRA==::NA==::U3ltYm9scyBwZXIgd29yZA==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19TWU1CT0xT::MA==::QWRkcmVzcyBzeW1ib2xz" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9TWU1CT0xT::MA==::QnVyc3Rjb3VudCBzeW1ib2xz" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQ09OU1RBTlRfQlVSU1RfQkVIQVZJT1I=::MA==::Q29tcG9uZW50IGNvbnN0YW50QnVyc3RCZWhhdmlvcg==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VUFWX0NPTlNUQU5UX0JVUlNUX0JFSEFWSU9S::MA==::TmV0d29yayBjb25zdGFudEJ1cnN0QmVoYXZpb3I=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfUkVRVUlSRV9VTkFMSUdORURfQUREUkVTU0VT::MA==::VW5hbGlnbmVkIGFkZHJlc3Nlcw==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfTElORVdSQVBCVVJTVFM=::MA==::bGluZXdyYXBCdXJzdHM=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfTUFYX1BFTkRJTkdfUkVBRF9UUkFOU0FDVElPTlM=::MQ==::bWF4UGVuZGluZ1JlYWRUcmFuc2FjdGlvbnM=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfTUFYX1BFTkRJTkdfV1JJVEVfVFJBTlNBQ1RJT05T::MA==::bWF4UGVuZGluZ1dyaXRlVHJhbnNhY3Rpb25z" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RCT1VOREFSSUVT::MA==::YnVyc3RPbkJ1cnN0Qm91bmRhcmllc09ubHk=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfSU5URVJMRUFWRUJVUlNUUw==::MA==::aW50ZXJsZWF2ZUJ1cnN0cw==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQklUU19QRVJfU1lNQk9M::OA==::Qml0cy9zeW1ib2w=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfSVNCSUdFTkRJQU4=::MA==::aXNCaWdFbmRpYW4=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU0dST1VQ::MA==::Q29tcG9uZW50IGFkZHJlc3MgZ3JvdXA=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NHUk9VUA==::MA==::TmV0d29yayBhZGRyZXNzIGdyb3Vw" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJPVVRHT0lOR1NJR05BTFM=::MA==::cmVnaXN0ZXJPdXRnb2luZ1NpZ25hbHM=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJJTkNPTUlOR1NJR05BTFM=::MA==::cmVnaXN0ZXJJbmNvbWluZ1NpZ25hbHM=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQUxXQVlTQlVSU1RNQVhCVVJTVA==::MA==::QWx3YXlzIGJ1cnN0IG1heC1idXJzdA==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "Q0hJUFNFTEVDVF9USFJPVUdIX1JFQURMQVRFTkNZ::MA==::Q2hpcHNlbGVjdCB0aHJvdWdoIHJlYWQgbGF0ZW5jeQ==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "Q0xPQ0tfUkFURQ==::NTAwMDAwMDA=::Q0xPQ0tfUkFURQ==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfUkVBRF9XQUlUX0NZQ0xFUw==::MQ==::QVZfUkVBRF9XQUlUX0NZQ0xFUw==" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfV1JJVEVfV0FJVF9DWUNMRVM=::MA==::QVZfV1JJVEVfV0FJVF9DWUNMRVM=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfU0VUVVBfV0FJVF9DWUNMRVM=::MA==::QVZfU0VUVVBfV0FJVF9DWUNMRVM=" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9IT0xEX0NZQ0xFUw==::MA==::QVZfREFUQV9IT0xEX0NZQ0xFUw==" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_NAME "YWx0ZXJhX21lcmxpbl9tYXN0ZXJfdHJhbnNsYXRvcg==" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uIE1NIE1hc3RlciBUcmFuc2xhdG9y" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_DESCRIPTION "Q29udmVydHMgdGhlIEF2YWxvbi1NTSBtYXN0ZXIgaW50ZXJmYWNlIHRvIGEgc2ltcGxlciByZXByZXNlbnRhdGlvbiB0aGF0IHRoZSBRc3lzIG5ldHdvcmsgdXNlcy4gUmVmZXIgdG8gdGhlIEF2YWxvbiBJbnRlcmZhY2UgU3BlY2lmaWNhdGlvbnMgKGh0dHA6Ly93d3cuYWx0ZXJhLmNvbS9saXRlcmF0dXJlL21hbnVhbC9tbmxfYXZhbG9uX3NwZWMucGRmKSBmb3IgZGVmaW5pdGlvbnMgb2YgdGhlIEF2YWxvbi1NTSBzaWduYWxzIGFuZCBleHBsYW5hdGlvbnMgb2YgdGhlIGJ1cnN0aW5nIHByb3BlcnRpZXMu" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19X::MTg=::Q29tcG9uZW50IGFkZHJlc3Mgd2lkdGg=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9X::MzI=::Q29tcG9uZW50IERhdGEgd2lkdGg=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9X::MQ==::Q29tcG9uZW50IGJ1cnN0Y291bnQgd2lkdGg=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQllURUVOQUJMRV9X::NA==::Q29tcG9uZW50IGJ5dGVlbmFibGUgd2lkdGg=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NfVw==::MTg=::TmV0d29yayBhZGRyZXNzIHdpZHRo" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VUFWX0JVUlNUQ09VTlRfVw==::Mw==::TmV0d29yayBidXJzdGNvdW50IHdpZHRo" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfUkVBRExBVEVOQ1k=::MA==::cmVhZExhdGVuY3k=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfV1JJVEVfV0FJVA==::MA==::d3JpdGVXYWl0VGltZQ==" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfUkVBRF9XQUlU::MQ==::cmVhZFdhaXRUaW1l" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9IT0xE::MA==::SG9sZCB0aW1l" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfU0VUVVBfV0FJVA==::MA==::c2V0dXBUaW1l" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRB::MQ==::VXNlIHJlYWRkYXRh" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFREFUQQ==::MQ==::VXNlIHdyaXRlZGF0YQ==" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUQ=::MQ==::VXNlIHJlYWQ=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRF::MQ==::VXNlIHdyaXRl" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOQlVSU1RUUkFOU0ZFUg==::MA==::VXNlIGJlZ2luYnVyc3R0cmFuc2Zlcg==" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOVFJBTlNGRVI=::MA==::VXNlIGJlZ2ludHJhbnNmZXI=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0JZVEVFTkFCTEU=::MQ==::VXNlIGJ5dGVlbmFibGU=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0NISVBTRUxFQ1Q=::MA==::VXNlIGNoaXBzZWxlY3Q=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0FERFJFU1M=::MQ==::VXNlIGFkZHJlc3M=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0JVUlNUQ09VTlQ=::MA==::VXNlIGJ1cnN0Y291bnQ=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0RFQlVHQUNDRVNT::MQ==::VXNlIGRlYnVnYWNjZXNz" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0NMS0VO::MA==::VXNlIG5ldHdvcmsgY2xrZW4=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRBVkFMSUQ=::MA==::VXNlIHJlYWRkYXRhdmFsaWQ=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1dBSVRSRVFVRVNU::MQ==::VXNlIHdhaXRyZXF1ZXN0" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX0xPQ0s=::MA==::VXNlIGxvY2s=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1JFQURSRVNQT05TRQ==::MA==::VXNlIHJlYWRyZXNwb25zZQ==" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFUkVTUE9OU0U=::MA==::VXNlIHdyaXRlcmVzcG9uc2U=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfU1lNQk9MU19QRVJfV09SRA==::NA==::U3ltYm9scyBwZXIgd29yZA==" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19TWU1CT0xT::MQ==::QWRkcmVzcyBzeW1ib2xz" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9TWU1CT0xT::MA==::QnVyc3Rjb3VudCBzeW1ib2xz" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQ09OU1RBTlRfQlVSU1RfQkVIQVZJT1I=::MA==::Q29tcG9uZW50IGNvbnN0YW50QnVyc3RCZWhhdmlvcg==" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VUFWX0NPTlNUQU5UX0JVUlNUX0JFSEFWSU9S::MA==::TmV0d29yayBjb25zdGFudEJ1cnN0QmVoYXZpb3I=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfTElORVdSQVBCVVJTVFM=::MA==::bGluZXdyYXBCdXJzdHM=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfTUFYX1BFTkRJTkdfUkVBRF9UUkFOU0FDVElPTlM=::NjQ=::bWF4UGVuZGluZ1JlYWRUcmFuc2FjdGlvbnM=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RCT1VOREFSSUVT::MQ==::YnVyc3RPbkJ1cnN0Qm91bmRhcmllc09ubHk=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfSU5URVJMRUFWRUJVUlNUUw==::MA==::aW50ZXJsZWF2ZUJ1cnN0cw==" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQklUU19QRVJfU1lNQk9M::OA==::Qml0cy9zeW1ib2w=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfSVNCSUdFTkRJQU4=::MA==::aXNCaWdFbmRpYW4=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU0dST1VQ::MA==::Q29tcG9uZW50IGFkZHJlc3MgZ3JvdXA=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NHUk9VUA==::MA==::TmV0d29yayBhZGRyZXNzIGdyb3Vw" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJPVVRHT0lOR1NJR05BTFM=::MA==::cmVnaXN0ZXJPdXRnb2luZ1NpZ25hbHM=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJJTkNPTUlOR1NJR05BTFM=::MQ==::cmVnaXN0ZXJJbmNvbWluZ1NpZ25hbHM=" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "QVZfQUxXQVlTQlVSU1RNQVhCVVJTVA==::MA==::QWx3YXlzIGJ1cnN0IG1heC1idXJzdA==" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_COMPONENT_PARAMETER "U1lOQ19SRVNFVA==::MA==::VXNlIHN5bmNocm9ub3VzIHJlc2V0cw==" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX3N5c19jbGtfdGltZXI=" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "SW50ZXJ2YWwgVGltZXIgSW50ZWwgRlBHQSBJUA==" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24=" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "YWx3YXlzUnVu::ZmFsc2U=::Tm8gU3RhcnQvU3RvcCBjb250cm9sIGJpdHM=" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "Y291bnRlclNpemU=::MzI=::Q291bnRlciBTaXpl" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "Zml4ZWRQZXJpb2Q=::ZmFsc2U=::Rml4ZWQgcGVyaW9k" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "cGVyaW9k::MQ==::UGVyaW9k" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "cGVyaW9kVW5pdHM=::TVNFQw==::VW5pdHM=" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVzZXRPdXRwdXQ=::ZmFsc2U=::U3lzdGVtIHJlc2V0IG9uIHRpbWVvdXQgKFdhdGNoZG9nKQ==" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "c25hcHNob3Q=::dHJ1ZQ==::UmVhZGFibGUgc25hcHNob3Q=" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "dGltZW91dFB1bHNlT3V0cHV0::ZmFsc2U=::VGltZW91dCBwdWxzZSAoMSBjbG9jayB3aWRlKQ==" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "c3lzdGVtRnJlcXVlbmN5::NTAwMDAwMDA=::c3lzdGVtRnJlcXVlbmN5" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "d2F0Y2hkb2dQdWxzZQ==::Mg==::V2F0Y2hkb2cgVGltZXIgUHVsc2UgTGVuZ3Ro" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "dGltZXJQcmVzZXQ=::RlVMTF9GRUFUVVJFRA==::UHJlc2V0cw==" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "cGVyaW9kVW5pdHNTdHJpbmc=::bXM=::cGVyaW9kVW5pdHNTdHJpbmc=" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "dmFsdWVJblNlY29uZA==::MC4wMDE=::dmFsdWVJblNlY29uZA==" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "bG9hZFZhbHVl::NDk5OTk=::bG9hZFZhbHVl" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "bXVsdA==::MC4wMDE=::bXVsdA==" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlja3NQZXJTZWM=::MTAwMC4w::dGlja3NQZXJTZWM=" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_COMPONENT_PARAMETER "c2xhdmVfYWRkcmVzc193aWR0aA==::Mw==::c2xhdmVfYWRkcmVzc193aWR0aA==" +set_global_assignment -entity "dec" -library "niosII" -name IP_COMPONENT_NAME "ZGVj" +set_global_assignment -entity "dec" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "U2VtYWZvcg==" +set_global_assignment -entity "dec" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "dec" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "dec" -library "niosII" -name IP_COMPONENT_VERSION "MS4w" +set_global_assignment -entity "dec" -library "niosII" -name IP_COMPONENT_PARAMETER "bQ==::OA==::bQ==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX21lbQ==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "T24tQ2hpcCBNZW1vcnkgKFJBTSBvciBST00pIEludGVsIEZQR0EgSVA=" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24=" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "YWxsb3dJblN5c3RlbU1lbW9yeUNvbnRlbnRFZGl0b3I=::ZmFsc2U=::RW5hYmxlIEluLVN5c3RlbSBNZW1vcnkgQ29udGVudCBFZGl0b3IgZmVhdHVyZQ==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "YmxvY2tUeXBl::QVVUTw==::QmxvY2sgdHlwZQ==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YVdpZHRo::MzI=::U2xhdmUgUzEgRGF0YSB3aWR0aA==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YVdpZHRoMg==::MzI=::U2xhdmUgUzIgRGF0YSB3aWR0aA==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZHVhbFBvcnQ=::dHJ1ZQ==::RHVhbC1wb3J0IGFjY2Vzcw==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZW5hYmxlRGlmZldpZHRo::ZmFsc2U=::RW5hYmxlIGRpZmZlcmVudCB3aWR0aCBmb3IgRHVhbC1wb3J0IGFjY2Vzcw==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9lbmFibGVEaWZmV2lkdGg=::ZmFsc2U=::ZGVyaXZlZF9lbmFibGVEaWZmV2lkdGg=" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5pdE1lbUNvbnRlbnQ=::dHJ1ZQ==::SW5pdGlhbGl6ZSBtZW1vcnkgY29udGVudA==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZW5QUkluaXRNb2Rl::ZmFsc2U=::RW5hYmxlIFBhcnRpYWwgUmVjb25maWd1cmF0aW9uIEluaXRpYWxpemF0aW9uIE1vZGU=" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "bWVtb3J5U2l6ZQ==::MTMxMDcy::VG90YWwgbWVtb3J5IHNpemU=" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVhZER1cmluZ1dyaXRlTW9kZQ==::RE9OVF9DQVJF::UmVhZCBEdXJpbmcgV3JpdGUgTW9kZQ==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "c2ltQWxsb3dNUkFNQ29udGVudHNGaWxl::ZmFsc2U=::QWxsb3cgTVJBTSBjb250ZW50cyBmaWxlIGZvciBzaW11bGF0aW9u" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "c2ltTWVtSW5pdE9ubHlGaWxlbmFtZQ==::MA==::U2ltdWxhdGlvbiBtZW1pbml0IG9ubHkgaGFzIGZpbGVuYW1l" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "c2luZ2xlQ2xvY2tPcGVyYXRpb24=::dHJ1ZQ==::U2luZ2xlIGNsb2NrIG9wZXJhdGlvbg==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zaW5nbGVDbG9ja09wZXJhdGlvbg==::dHJ1ZQ==::ZGVyaXZlZF9zaW5nbGVDbG9ja09wZXJhdGlvbg==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "c2xhdmUxTGF0ZW5jeQ==::MQ==::U2xhdmUgczEgTGF0ZW5jeQ==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "c2xhdmUyTGF0ZW5jeQ==::MQ==::U2xhdmUgczIgTGF0ZW5jeQ==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "dXNlTm9uRGVmYXVsdEluaXRGaWxl::ZmFsc2U=::RW5hYmxlIG5vbi1kZWZhdWx0IGluaXRpYWxpemF0aW9uIGZpbGU=" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "d3JpdGFibGU=::dHJ1ZQ==::VHlwZQ==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZWNjX2VuYWJsZWQ=::ZmFsc2U=::RXh0ZW5kIHRoZSBkYXRhIHdpZHRoIHRvIHN1cHBvcnQgRUNDIGJpdHM=" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVzZXRyZXF1ZXN0X2VuYWJsZWQ=::dHJ1ZQ==::UmVzZXQgUmVxdWVzdA==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "YXV0b0luaXRpYWxpemF0aW9uRmlsZU5hbWU=::bmlvc0lJX21lbQ==::YXV0b0luaXRpYWxpemF0aW9uRmlsZU5hbWU=" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGV2aWNlRmFtaWx5::Q3ljbG9uZSBJViBF::ZGV2aWNlRmFtaWx5" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGV2aWNlRmVhdHVyZXM=::ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1::ZGV2aWNlRmVhdHVyZXM=" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfYWRkcl93aWR0aA==::MTU=::U2xhdmUgMSBhZGRyZXNzIHdpZHRo" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfYWRkcl93aWR0aDI=::MTU=::U2xhdmUgMiBhZGRyZXNzIHdpZHRo" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfZGF0YV93aWR0aA==::MzI=::U2xhdmUgMSBkYXRhIHdpZHRo" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfZGF0YV93aWR0aDI=::MzI=::U2xhdmUgMiBkYXRhIHdpZHRo" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9ndWlfcmFtX2Jsb2NrX3R5cGU=::QXV0b21hdGlj::ZGVyaXZlZF9ndWlfcmFtX2Jsb2NrX3R5cGU=" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9pc19oYXJkY29weQ==::ZmFsc2U=::ZGVyaXZlZF9pc19oYXJkY29weQ==" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9pbml0X2ZpbGVfbmFtZQ==::bmlvc0lJX21lbS5oZXg=::ZGVyaXZlZF9pbml0X2ZpbGVfbmFtZQ==" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX2p0YWdfdWFydA==" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "SlRBRyBVQVJUIEludGVsIEZQR0EgSVA=" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24=" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "YWxsb3dNdWx0aXBsZUNvbm5lY3Rpb25z::ZmFsc2U=::QWxsb3cgbXVsdGlwbGUgY29ubmVjdGlvbnMgdG8gQXZhbG9uIEpUQUcgc2xhdmU=" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "aHViSW5zdGFuY2VJRA==::MA==::aHViSW5zdGFuY2VJRA==" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVhZEJ1ZmZlckRlcHRo::NjQ=::QnVmZmVyIGRlcHRoIChieXRlcyk=" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVhZElSUVRocmVzaG9sZA==::OA==::SVJRIHRocmVzaG9sZA==" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "c2ltSW50ZXJhY3RpdmVPcHRpb25z::Tk9fSU5URVJBQ1RJVkVfV0lORE9XUw==::T3B0aW9ucw==" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "dXNlUmVnaXN0ZXJzRm9yUmVhZEJ1ZmZlcg==::ZmFsc2U=::Q29uc3RydWN0IHVzaW5nIHJlZ2lzdGVycyBpbnN0ZWFkIG9mIG1lbW9yeSBibG9ja3M=" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "dXNlUmVnaXN0ZXJzRm9yV3JpdGVCdWZmZXI=::ZmFsc2U=::Q29uc3RydWN0IHVzaW5nIHJlZ2lzdGVycyBpbnN0ZWFkIG9mIG1lbW9yeSBibG9ja3M=" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "dXNlUmVsYXRpdmVQYXRoRm9yU2ltRmlsZQ==::ZmFsc2U=::dXNlUmVsYXRpdmVQYXRoRm9yU2ltRmlsZQ==" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "d3JpdGVCdWZmZXJEZXB0aA==::NjQ=::QnVmZmVyIGRlcHRoIChieXRlcyk=" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "d3JpdGVJUlFUaHJlc2hvbGQ=::OA==::SVJRIHRocmVzaG9sZA==" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "Y2xrRnJlcQ==::NTAwMDAwMDA=::Y2xrRnJlcQ==" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "YXZhbG9uU3BlYw==::Mi4w::YXZhbG9uU3BlYw==" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "bGVnYWN5U2lnbmFsQWxsb3c=::ZmFsc2U=::bGVnYWN5U2lnbmFsQWxsb3c=" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "ZW5hYmxlSW50ZXJhY3RpdmVJbnB1dA==::ZmFsc2U=::ZW5hYmxlSW50ZXJhY3RpdmVJbnB1dA==" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_COMPONENT_PARAMETER "ZW5hYmxlSW50ZXJhY3RpdmVPdXRwdXQ=::ZmFsc2U=::ZW5hYmxlSW50ZXJhY3RpdmVPdXRwdXQ=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX2NwdQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TmlvcyBJSSBQcm9jZXNzb3I=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_INTERNAL "Off" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_DESCRIPTION "QWx0ZXJhIE5pb3MgSUkgUHJvY2Vzc29y" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dG1yX2VuYWJsZWQ=::ZmFsc2U=::TmlvcyBJSSBUcmlwbGUgTW9kZSBSZWR1bmRhbmN5" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19kaXNhYmxlX3Rtcl9pbmo=::ZmFsc2U=::RGlzYWJsZWQgVE1SIEVycm9yIEluamVjdGlvbiBQb3J0" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19zaG93VW5wdWJsaXNoZWRTZXR0aW5ncw==::ZmFsc2U=::U2hvdyBVbnB1Ymxpc2hlZCBTZXR0aW5ncw==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19zaG93SW50ZXJuYWxTZXR0aW5ncw==::ZmFsc2U=::U2hvdyBJbnRlcm5hbCBWZXJpZmljYXRpb24gU2V0dGluZ3M=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19leHBvcnRQQ0I=::ZmFsc2U=::c2V0dGluZ19leHBvcnRQQ0I=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19leHBvcnRkZWJ1Z2luZm8=::ZmFsc2U=::RXhwb3J0IEluc3RydWN0aW9uIEV4ZWN1dGlvbiBTdGF0ZXM=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19jbGVhclhCaXRzTEROb25CeXBhc3M=::dHJ1ZQ==::Q2xlYXIgWCBkYXRhIGJpdHM=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19iaWdFbmRpYW4=::ZmFsc2U=::c2V0dGluZ19iaWdFbmRpYW4=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19leHBvcnRfbGFyZ2VfUkFNcw==::ZmFsc2U=::RXhwb3J0IExhcmdlIFJBTXM=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hc2ljX2VuYWJsZWQ=::ZmFsc2U=::QVNJQyBlbmFibGVk" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVnaXN0ZXJfZmlsZV9wb3I=::ZmFsc2U=::UmVnaXN0ZXIgRmlsZSBQT1I=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hc2ljX3N5bm9wc3lzX3RyYW5zbGF0ZV9vbl9vZmY=::ZmFsc2U=::QVNJQyBTeW5vcHN5cyB0cmFuc2xhdGU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hc2ljX3RoaXJkX3BhcnR5X3N5bnRoZXNpcw==::ZmFsc2U=::QVNJQyB0aGlyZCBwYXJ0eSBzeW50aGVzaXM=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hc2ljX2FkZF9zY2FuX21vZGVfaW5wdXQ=::ZmFsc2U=::QVNJQyBhZGQgc2NhbiBtb2RlIGlucHV0" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19vY2lfdmVyc2lvbg==::MQ==::TmlvcyBJSSBPQ0kgVmVyc2lvbg==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19mYXN0X3JlZ2lzdGVyX3JlYWQ=::ZmFsc2U=::RmFzdCBSZWdpc3RlciBSZWFk" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19leHBvcnRIb3N0RGVidWdQb3J0::ZmFsc2U=::RXhwb3J0IERlYnVnIEhvc3QgU2xhdmU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19vY2lfZXhwb3J0X2p0YWdfc2lnbmFscw==::ZmFsc2U=::RXhwb3J0IEpUQUcgc2lnbmFscw==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hdmFsb25EZWJ1Z1BvcnRQcmVzZW50::ZmFsc2U=::QXZhbG9uIERlYnVnIFBvcnQgUHJlc2VudA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hbHdheXNFbmNyeXB0::dHJ1ZQ==::QWx3YXlzIGVuY3J5cHQ=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hY3RpdmF0ZVRyYWNl::ZmFsc2U=::R2VuZXJhdGUgdHJhY2UgZmlsZSBkdXJpbmcgUlRMIHNpbXVsYXRpb24=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hbGxvd19icmVha19pbnN0::ZmFsc2U=::QWxsb3cgQnJlYWsgaW5zdHJ1Y3Rpb25z" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hY3RpdmF0ZVRlc3RFbmRDaGVja2Vy::ZmFsc2U=::QWN0aXZhdGUgdGVzdCBlbmQgY2hlY2tlcg==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19lY2Nfc2ltX3Rlc3RfcG9ydHM=::ZmFsc2U=::RW5hYmxlIEVDQyBzaW11bGF0aW9uIHRlc3QgcG9ydHM=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19kaXNhYmxlb2NpdHJhY2U=::ZmFsc2U=::RGlzYWJsZSBjb21wdHIgZ2VuZXJhdGlvbg==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hY3RpdmF0ZU1vbml0b3Jz::dHJ1ZQ==::QWN0aXZhdGUgbW9uaXRvcnM=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19IRExTaW1DYWNoZXNDbGVhcmVk::dHJ1ZQ==::SERMIHNpbXVsYXRpb24gY2FjaGVzIGNsZWFyZWQ=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19IQnJlYWtUZXN0::ZmFsc2U=::QWRkIEhCcmVhayBSZXF1ZXN0IHBvcnQ=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19icmVha3NsYXZlb3ZlcmlkZQ==::ZmFsc2U=::TWFudWFsbHkgYXNzaWduIGJyZWFrIHNsYXZl" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3B1UmVzZXQ=::ZmFsc2U=::SW5jbHVkZSBjcHVfcmVzZXRyZXF1ZXN0IGFuZCBjcHVfcmVzZXR0YWtlbiBzaWduYWxz" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVzZXRyZXF1ZXN0X2VuYWJsZWQ=::dHJ1ZQ==::SW5jbHVkZSByZXNldF9yZXEgc2lnbmFsIGZvciBPQ0kgUkFNIGFuZCBNdWx0aS1DeWNsZSBDdXN0b20gSW5zdHJ1Y3Rpb25z" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19yZW1vdmVSQU1pbml0::ZmFsc2U=::UmVtb3ZlIFJBTSBJbml0aWFsaXphdGlvbg==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ190bXJfb3V0cHV0X2Rpc2FibGU=::ZmFsc2U=::Q3JlYXRlIGEgc2lnbmFsIHRvIGRpc2FibGUgVE1SIG91dHB1dHM=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVzZXRPZmZzZXQ=::MA==::UmVzZXQgdmVjdG9yIG9mZnNldA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZXhjZXB0aW9uT2Zmc2V0::MzI=::RXhjZXB0aW9uIHZlY3RvciBvZmZzZXQ=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3B1SUQ=::MA==::Q1BVSUQgY29udHJvbCByZWdpc3RlciB2YWx1ZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "YnJlYWtPZmZzZXQ=::MzI=::QnJlYWsgdmVjdG9yIG9mZnNldA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVzZXRTbGF2ZQ==::bWVtLnMx::UmVzZXQgdmVjdG9yIG1lbW9yeQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZXhjZXB0aW9uU2xhdmU=::bWVtLnMx::RXhjZXB0aW9uIHZlY3RvciBtZW1vcnk=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "YnJlYWtTbGF2ZQ==::Tm9uZQ==::QnJlYWsgdmVjdG9yIG1lbW9yeQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3B1QXJjaFJldg==::MQ==::QXJjaGl0ZWN0dXJlIFJldmlzaW9u" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c3RyYXRpeF9kc3BibG9ja19zaGlmdF9tdWw=::ZmFsc2U=::c3RyYXRpeF9kc3BibG9ja19zaGlmdF9tdWw=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2hpZnRlclR5cGU=::bWVkaXVtX2xlX3NoaWZ0::c2hpZnRlclR5cGU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bXVsdGlwbGllclR5cGU=::bm9fbXVs::bXVsdGlwbGllclR5cGU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW1wbA==::VGlueQ==::TmlvcyBJSSBDb3Jl" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aWNhY2hlX3RhZ3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::VGFnIFJBTSBibG9jayB0eXBl" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aWNhY2hlX3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::RGF0YSBSQU0gYmxvY2sgdHlwZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX3RhZ3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::VGFnIFJBTSBibG9jayB0eXBl" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::RGF0YSBSQU0gYmxvY2sgdHlwZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19leHBvcnR2ZWN0b3Jz::ZmFsc2U=::RXhwb3J0IFZlY3RvcnM=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ191c2VkZXNpZ253YXJl::ZmFsc2U=::VXNlIERlc2lnbndhcmUgQ29tcG9uZW50cw==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19lY2NfcHJlc2VudA==::ZmFsc2U=::RUNDIFByZXNlbnQ=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19pY19lY2NfcHJlc2VudA==::dHJ1ZQ==::SW5zdHJ1Y3Rpb24gQ2FjaGUgRUNDIFByZXNlbnQ=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19yZl9lY2NfcHJlc2VudA==::dHJ1ZQ==::UmVnaXN0ZXIgRmlsZSBFQ0MgUHJlc2VudA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19tbXVfZWNjX3ByZXNlbnQ=::dHJ1ZQ==::TU1VIEVDQyBQcmVzZW50" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19kY19lY2NfcHJlc2VudA==::dHJ1ZQ==::RGF0YSBDYWNoZSBFQ0MgUHJlc2VudA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19pdGNtX2VjY19wcmVzZW50::dHJ1ZQ==::SW5zdHJ1Y3Rpb24gVENNIEVDQyBQcmVzZW50" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19kdGNtX2VjY19wcmVzZW50::dHJ1ZQ==::RGF0YSBUQ00gRUNDIFByZXNlbnQ=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVnZmlsZV9yYW1CbG9ja1R5cGU=::QXV0b21hdGlj::UkFNIGJsb2NrIHR5cGU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "b2NpbWVtX3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::UkFNIGJsb2NrIHR5cGU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "b2NpbWVtX3JhbUluaXQ=::ZmFsc2U=::SW5pdGlhbGl6ZWQgT0NJIFJBTQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::TU1VIFJBTSBibG9jayB0eXBl" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Ymh0X3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::QkhUIFJBTSBCbG9jayBUeXBl" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y2R4X2VuYWJsZWQ=::ZmFsc2U=::Q0RYIChDb2RlIERlbnNpdHkgZVh0ZW5zaW9uKSBJbnN0cnVjdGlvbnM=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bXB4X2VuYWJsZWQ=::ZmFsc2U=::bXB4X2VuYWJsZWQ=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfZW5hYmxlZA==::dHJ1ZQ==::SW5jbHVkZSBKVEFHIERlYnVn" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfdHJpZ2dlckFybWluZw==::dHJ1ZQ==::VHJpZ2dlciBBcm1pbmc=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfYXNzaWduSnRhZ0luc3RhbmNlSUQ=::ZmFsc2U=::QXNzaWduIEpUQUcgSW5zdGFuY2UgSUQgZm9yIGRlYnVnIGNvcmUgbWFudWFsbHk=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfanRhZ0luc3RhbmNlSUQ=::MA==::SlRBRyBJbnN0YW5jZSBJRCB2YWx1ZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bWFzdGVyX2FkZHJfbWFw::ZmFsc2U=::TWFudWFsbHkgU2V0IE1hc3RlciBCYXNlIEFkZHJlc3MgYW5kIFNpemU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX2Jhc2U=::MA==::SW5zdHJ1Y3Rpb24gTWFzdGVyIEJhc2UgQWRkcmVzcw==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX3NpemU=::MA==::SW5zdHJ1Y3Rpb24gTWFzdGVyIFNpemU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Zmxhc2hfaW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX2Jhc2U=::MA==::Rmxhc2ggSW5zdHJ1Y3Rpb24gTWFzdGVyIEJhc2UgQWRkcmVzcw==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Zmxhc2hfaW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX3NpemU=::MA==::Rmxhc2ggSW5zdHJ1Y3Rpb24gTWFzdGVyIFNpemU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YV9tYXN0ZXJfcGFkZHJfYmFzZQ==::MA==::RGF0YSBNYXN0ZXIgQmFzZSBBZGRyZXNz" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YV9tYXN0ZXJfcGFkZHJfc2l6ZQ==::MA==::RGF0YSBNYXN0ZXIgU2l6ZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8wX3BhZGRyX2Jhc2U=::MA==::VGlnaHRseSBjb3VwbGVkIEluc3RydWN0aW9uIE1hc3RlciAwIEJhc2UgQWRkcmVzcw==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8wX3BhZGRyX3NpemU=::MA==::VGlnaHRseSBjb3VwbGVkIEluc3RydWN0aW9uIE1hc3RlciAwIFNpemU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8xX3BhZGRyX2Jhc2U=::MA==::VGlnaHRseSBjb3VwbGVkIEluc3RydWN0aW9uIE1hc3RlciAxIEJhc2UgQWRkcmVzcw==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8xX3BhZGRyX3NpemU=::MA==::VGlnaHRseSBjb3VwbGVkIEluc3RydWN0aW9uIE1hc3RlciAxIFNpemU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8yX3BhZGRyX2Jhc2U=::MA==::VGlnaHRseSBjb3VwbGVkIEluc3RydWN0aW9uIE1hc3RlciAyIEJhc2UgQWRkcmVzcw==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8yX3BhZGRyX3NpemU=::MA==::VGlnaHRseSBjb3VwbGVkIEluc3RydWN0aW9uIE1hc3RlciAyIFNpemU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8zX3BhZGRyX2Jhc2U=::MA==::VGlnaHRseSBjb3VwbGVkIEluc3RydWN0aW9uIE1hc3RlciAzIEJhc2UgQWRkcmVzcw==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8zX3BhZGRyX3NpemU=::MA==::VGlnaHRseSBjb3VwbGVkIEluc3RydWN0aW9uIE1hc3RlciAzIFNpemU=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzBfcGFkZHJfYmFzZQ==::MA==::VGlnaHRseSBjb3VwbGVkIERhdGEgTWFzdGVyIDAgQmFzZSBBZGRyZXNz" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzBfcGFkZHJfc2l6ZQ==::MA==::VGlnaHRseSBjb3VwbGVkIERhdGEgTWFzdGVyIDAgU2l6ZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzFfcGFkZHJfYmFzZQ==::MA==::VGlnaHRseSBjb3VwbGVkIERhdGEgTWFzdGVyIDEgQmFzZSBBZGRyZXNz" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzFfcGFkZHJfc2l6ZQ==::MA==::VGlnaHRseSBjb3VwbGVkIERhdGEgTWFzdGVyIDEgU2l6ZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzJfcGFkZHJfYmFzZQ==::MA==::VGlnaHRseSBjb3VwbGVkIERhdGEgTWFzdGVyIDIgQmFzZSBBZGRyZXNz" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzJfcGFkZHJfc2l6ZQ==::MA==::VGlnaHRseSBjb3VwbGVkIERhdGEgTWFzdGVyIDIgU2l6ZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzNfcGFkZHJfYmFzZQ==::MA==::VGlnaHRseSBjb3VwbGVkIERhdGEgTWFzdGVyIDMgQmFzZSBBZGRyZXNz" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzNfcGFkZHJfc2l6ZQ==::MA==::VGlnaHRseSBjb3VwbGVkIERhdGEgTWFzdGVyIDMgU2l6ZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdHJ1Y3Rpb25fbWFzdGVyX2hpZ2hfcGVyZm9ybWFuY2VfcGFkZHJfYmFzZQ==::MA==::SW5zdHJ1Y3Rpb24gTWFzdGVyIEhpZ2ggUGVyZm9ybWFuY2UgQmFzZSBBZGRyZXNz" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdHJ1Y3Rpb25fbWFzdGVyX2hpZ2hfcGVyZm9ybWFuY2VfcGFkZHJfc2l6ZQ==::MA==::SW5zdHJ1Y3Rpb24gTWFzdGVyIEhpZ2ggUGVyZm9ybWFuY2UgU2l6ZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YV9tYXN0ZXJfaGlnaF9wZXJmb3JtYW5jZV9wYWRkcl9iYXNl::MA==::RGF0YSBNYXN0ZXIgSGlnaCBQZXJmb3JtYW5jZSBCYXNlIEFkZHJlc3M=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YV9tYXN0ZXJfaGlnaF9wZXJmb3JtYW5jZV9wYWRkcl9zaXpl::MA==::RGF0YSBNYXN0ZXIgSGlnaCBQZXJmb3JtYW5jZSBTaXpl" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVzZXRBYnNvbHV0ZUFkZHI=::MA==::UmVzZXQgdmVjdG9y" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZXhjZXB0aW9uQWJzb2x1dGVBZGRy::MzI=::RXhjZXB0aW9uIHZlY3Rvcg==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "YnJlYWtBYnNvbHV0ZUFkZHI=::MTMzMTUy::QnJlYWsgdmVjdG9y" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X1RMQk1pc3NFeGNBYnNBZGRy::MA==::RmFzdCBUTEIgTWlzcyBFeGNlcHRpb24gdmVjdG9y" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX2J1cnN0c19kZXJpdmVk::ZmFsc2U=::ZGNhY2hlX2J1cnN0c19kZXJpdmVk" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX3NpemVfZGVyaXZlZA==::MjA0OA==::ZGNhY2hlX3NpemVfZGVyaXZlZA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "YnJlYWtTbGF2ZV9kZXJpdmVk::Y3B1LmRlYnVnX21lbV9zbGF2ZQ==::YnJlYWtTbGF2ZV9kZXJpdmVk" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX2xpbmVTaXplX2Rlcml2ZWQ=::MzI=::ZGNhY2hlX2xpbmVTaXplX2Rlcml2ZWQ=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19pb3JlZ2lvbkJ5cGFzc0RDYWNoZQ==::ZmFsc2U=::c2V0dGluZ19pb3JlZ2lvbkJ5cGFzc0RDYWNoZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19iaXQzMUJ5cGFzc0RDYWNoZQ==::ZmFsc2U=::c2V0dGluZ19iaXQzMUJ5cGFzc0RDYWNoZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dHJhbnNsYXRlX29u::InN5bnRoZXNpcyB0cmFuc2xhdGVfb24i::dHJhbnNsYXRlX29u" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dHJhbnNsYXRlX29mZg==::InN5bnRoZXNpcyB0cmFuc2xhdGVfb2ZmIg==::dHJhbnNsYXRlX29mZg==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfb25jaGlwdHJhY2U=::ZmFsc2U=::ZGVidWdfb25jaGlwdHJhY2U=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfb2ZmY2hpcHRyYWNl::ZmFsc2U=::ZGVidWdfb2ZmY2hpcHRyYWNl" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfaW5zdHRyYWNl::ZmFsc2U=::ZGVidWdfaW5zdHRyYWNl" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfZGF0YXRyYWNl::ZmFsc2U=::ZGVidWdfZGF0YXRyYWNl" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdEFkZHJXaWR0aA==::MTg=::aW5zdEFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZmFBZGRyV2lkdGg=::MQ==::ZmFBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YUFkZHJXaWR0aA==::MTg=::ZGF0YUFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMEFkZHJXaWR0aA==::MQ==::dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMEFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMUFkZHJXaWR0aA==::MQ==::dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMUFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMkFkZHJXaWR0aA==::MQ==::dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMkFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyM0FkZHJXaWR0aA==::MQ==::dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyM0FkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjBBZGRyV2lkdGg=::MQ==::dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjBBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjFBZGRyV2lkdGg=::MQ==::dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjFBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjJBZGRyV2lkdGg=::MQ==::dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjJBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjNBZGRyV2lkdGg=::MQ==::dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjNBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YU1hc3RlckhpZ2hQZXJmb3JtYW5jZUFkZHJXaWR0aA==::MQ==::ZGF0YU1hc3RlckhpZ2hQZXJmb3JtYW5jZUFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdHJ1Y3Rpb25NYXN0ZXJIaWdoUGVyZm9ybWFuY2VBZGRyV2lkdGg=::MQ==::aW5zdHJ1Y3Rpb25NYXN0ZXJIaWdoUGVyZm9ybWFuY2VBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdFNsYXZlTWFwUGFyYW0=::PGFkZHJlc3MtbWFwPjxzbGF2ZSBuYW1lPSdtZW0uczEnIHN0YXJ0PScweDAnIGVuZD0nMHgyMDAwMCcgdHlwZT0nYWx0ZXJhX2F2YWxvbl9vbmNoaXBfbWVtb3J5Mi5zMScgLz48c2xhdmUgbmFtZT0nY3B1LmRlYnVnX21lbV9zbGF2ZScgc3RhcnQ9JzB4MjA4MDAnIGVuZD0nMHgyMTAwMCcgdHlwZT0nYWx0ZXJhX25pb3MyX2dlbjIuZGVidWdfbWVtX3NsYXZlJyAvPjwvYWRkcmVzcy1tYXA+::aW5zdFNsYXZlTWFwUGFyYW0=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YVNsYXZlTWFwUGFyYW0=::PGFkZHJlc3MtbWFwPjxzbGF2ZSBuYW1lPSdtZW0uczInIHN0YXJ0PScweDAnIGVuZD0nMHgyMDAwMCcgdHlwZT0nYWx0ZXJhX2F2YWxvbl9vbmNoaXBfbWVtb3J5Mi5zMicgLz48c2xhdmUgbmFtZT0nY3B1LmRlYnVnX21lbV9zbGF2ZScgc3RhcnQ9JzB4MjA4MDAnIGVuZD0nMHgyMTAwMCcgdHlwZT0nYWx0ZXJhX25pb3MyX2dlbjIuZGVidWdfbWVtX3NsYXZlJyAvPjxzbGF2ZSBuYW1lPSdzeXNfY2xrX3RpbWVyLnMxJyBzdGFydD0nMHgyMTAwMCcgZW5kPScweDIxMDIwJyB0eXBlPSdhbHRlcmFfYXZhbG9uX3RpbWVyLnMxJyAvPjxzbGF2ZSBuYW1lPSdzZW0ucmFtX3NsYXZlJyBzdGFydD0nMHgyMTAyMCcgZW5kPScweDIxMDMwJyB0eXBlPSdTZW1hZm9yLnJhbV9zbGF2ZScgLz48c2xhdmUgbmFtZT0nc2VtLmN0bF9zbGF2ZScgc3RhcnQ9JzB4MjEwMzAnIGVuZD0nMHgyMTAzOCcgdHlwZT0nU2VtYWZvci5jdGxfc2xhdmUnIC8+PHNsYXZlIG5hbWU9J2p0YWdfdWFydC5hdmFsb25fanRhZ19zbGF2ZScgc3RhcnQ9JzB4MjEwMzgnIGVuZD0nMHgyMTA0MCcgdHlwZT0nYWx0ZXJhX2F2YWxvbl9qdGFnX3VhcnQuYXZhbG9uX2p0YWdfc2xhdmUnIC8+PC9hZGRyZXNzLW1hcD4=::ZGF0YVNsYXZlTWFwUGFyYW0=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y2xvY2tGcmVxdWVuY3k=::NTAwMDAwMDA=::Y2xvY2tGcmVxdWVuY3k=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGV2aWNlRmFtaWx5TmFtZQ==::Q3ljbG9uZSBJViBF::ZGV2aWNlRmFtaWx5TmFtZQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW50ZXJuYWxJcnFNYXNrU3lzdGVtSW5mbw==::Mw==::aW50ZXJuYWxJcnFNYXNrU3lzdGVtSW5mbw==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3VzdG9tSW5zdFNsYXZlc1N5c3RlbUluZm8=::PGluZm8vPg==::Y3VzdG9tSW5zdFNsYXZlc1N5c3RlbUluZm8=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3VzdG9tSW5zdFNsYXZlc1N5c3RlbUluZm9fbmlvc19h::PGluZm8vPg==::Y3VzdG9tSW5zdFNsYXZlc1N5c3RlbUluZm9fbmlvc19h" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3VzdG9tSW5zdFNsYXZlc1N5c3RlbUluZm9fbmlvc19i::PGluZm8vPg==::Y3VzdG9tSW5zdFNsYXZlc1N5c3RlbUluZm9fbmlvc19i" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3VzdG9tSW5zdFNsYXZlc1N5c3RlbUluZm9fbmlvc19j::PGluZm8vPg==::Y3VzdG9tSW5zdFNsYXZlc1N5c3RlbUluZm9fbmlvc19j" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGV2aWNlRmVhdHVyZXNTeXN0ZW1JbmZv::ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1::ZGV2aWNlRmVhdHVyZXNTeXN0ZW1JbmZv" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::RVA0Q0UxMTVGMjlDNw==::QXV0byBERVZJQ0U=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::Nw==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ==" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19DTEtfQ0xPQ0tfRE9NQUlO::MQ==::QXV0byBDTE9DS19ET01BSU4=" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "QVVUT19DTEtfUkVTRVRfRE9NQUlO::MQ==::QXV0byBSRVNFVF9ET01BSU4=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_NAME "bmlvc0lJX2NwdV9jcHU=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_DISPLAY_NAME "TmlvcyBJSSBQcm9jZXNzb3IgVW5pdA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_REPORT_HIERARCHY "Off" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_INTERNAL "On" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_VERSION "MTguMQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_DESCRIPTION "QWx0ZXJhIE5pb3MgSUkgVW5pdCBQcm9jZXNzb3I=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3B1X25hbWU=::Y3B1::Y3B1X25hbWU=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19zaG93VW5wdWJsaXNoZWRTZXR0aW5ncw==::ZmFsc2U=::U2hvdyBVbnB1Ymxpc2hlZCBTZXR0aW5ncw==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19zaG93SW50ZXJuYWxTZXR0aW5ncw==::ZmFsc2U=::U2hvdyBJbnRlcm5hbCBWZXJpZmljYXRpb24gU2V0dGluZ3M=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19wcmVjaXNlSWxsZWdhbE1lbUFjY2Vzc0V4Y2VwdGlvbg==::ZmFsc2U=::TWlzYWxpZ25lZCBtZW1vcnkgYWNjZXNz" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19leHBvcnRQQ0I=::ZmFsc2U=::c2V0dGluZ19leHBvcnRQQ0I=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19leHBvcnRkZWJ1Z2luZm8=::ZmFsc2U=::RXhwb3J0IEluc3RydWN0aW9uIEV4ZWN1dGlvbiBTdGF0ZXM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19jbGVhclhCaXRzTEROb25CeXBhc3M=::dHJ1ZQ==::Q2xlYXIgWCBkYXRhIGJpdHM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19iaWdFbmRpYW4=::ZmFsc2U=::c2V0dGluZ19iaWdFbmRpYW4=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19leHBvcnRfbGFyZ2VfUkFNcw==::ZmFsc2U=::RXhwb3J0IExhcmdlIFJBTXM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hc2ljX2VuYWJsZWQ=::ZmFsc2U=::QVNJQyBlbmFibGVk" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hc2ljX3N5bm9wc3lzX3RyYW5zbGF0ZV9vbl9vZmY=::ZmFsc2U=::QVNJQyBTeW5vcHN5cyB0cmFuc2xhdGU=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hc2ljX3RoaXJkX3BhcnR5X3N5bnRoZXNpcw==::ZmFsc2U=::QVNJQyB0aGlyZCBwYXJ0eSBzeW50aGVzaXM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hc2ljX2FkZF9zY2FuX21vZGVfaW5wdXQ=::ZmFsc2U=::QVNJQyBhZGQgc2NhbiBtb2RlIGlucHV0" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19vY2lfZXhwb3J0X2p0YWdfc2lnbmFscw==::ZmFsc2U=::RXhwb3J0IEpUQUcgc2lnbmFscw==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hdmFsb25EZWJ1Z1BvcnRQcmVzZW50::ZmFsc2U=::QXZhbG9uIERlYnVnIFBvcnQgUHJlc2VudA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hbHdheXNFbmNyeXB0::dHJ1ZQ==::QWx3YXlzIGVuY3J5cHQ=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVnaXN0ZXJfZmlsZV9wb3I=::ZmFsc2U=::UmVnaXN0ZXIgRmlsZSBQT1I=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW9fcmVnaW9uYmFzZQ==::MA==::QmFzZSBBZGRyZXNz" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW9fcmVnaW9uc2l6ZQ==::MA==::U2l6ZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19zdXBwb3J0MzFiaXRkY2FjaGVieXBhc3M=::dHJ1ZQ==::VXNlIG1vc3Qtc2lnbmlmaWNhbnQgYWRkcmVzcyBiaXQgaW4gcHJvY2Vzc29yIHRvIGJ5cGFzcyBkYXRhIGNhY2hl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hY3RpdmF0ZVRyYWNl::ZmFsc2U=::R2VuZXJhdGUgdHJhY2UgZmlsZSBkdXJpbmcgUlRMIHNpbXVsYXRpb24=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hbGxvd19icmVha19pbnN0::ZmFsc2U=::QWxsb3cgQnJlYWsgaW5zdHJ1Y3Rpb25z" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hY3RpdmF0ZVRlc3RFbmRDaGVja2Vy::ZmFsc2U=::QWN0aXZhdGUgdGVzdCBlbmQgY2hlY2tlcg==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19lY2Nfc2ltX3Rlc3RfcG9ydHM=::ZmFsc2U=::RW5hYmxlIEVDQyBzaW11bGF0aW9uIHRlc3QgcG9ydHM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19kaXNhYmxlb2NpdHJhY2U=::ZmFsc2U=::RGlzYWJsZSBjb21wdHI=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19hY3RpdmF0ZU1vbml0b3Jz::dHJ1ZQ==::QWN0aXZhdGUgbW9uaXRvcnM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19IRExTaW1DYWNoZXNDbGVhcmVk::dHJ1ZQ==::SERMIHNpbXVsYXRpb24gY2FjaGVzIGNsZWFyZWQ=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19IQnJlYWtUZXN0::ZmFsc2U=::QWRkIEhCcmVhayBSZXF1ZXN0IHBvcnQ=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19icmVha3NsYXZlb3ZlcmlkZQ==::ZmFsc2U=::TWFudWFsbHkgYXNzaWduIGJyZWFrIHNsYXZl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bXB1X3VzZUxpbWl0::ZmFsc2U=::VXNlIExpbWl0IGZvciByZWdpb24gcmFuZ2U=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bXB1X2VuYWJsZWQ=::ZmFsc2U=::SW5jbHVkZSBNUFU=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X2VuYWJsZWQ=::ZmFsc2U=::SW5jbHVkZSBNTVU=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X2F1dG9Bc3NpZ25UbGJQdHJTeg==::dHJ1ZQ==::T3B0aW1pemUgVExCIGVudHJpZXMgYmFzZSBvbiBkZXZpY2UgZmFtaWx5" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3B1UmVzZXQ=::ZmFsc2U=::SW5jbHVkZSBjcHVfcmVzZXRyZXF1ZXN0IGFuZCBjcHVfcmVzZXR0YWtlbiBzaWduYWxz" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVzZXRyZXF1ZXN0X2VuYWJsZWQ=::dHJ1ZQ==::SW5jbHVkZSByZXNldF9yZXEgc2lnbmFsIGZvciBPQ0kgUkFNIGFuZCBNdWx0aS1DeWNsZSBDdXN0b20gSW5zdHJ1Y3Rpb25z" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19yZW1vdmVSQU1pbml0::ZmFsc2U=::UmVtb3ZlIFJBTSBJbml0aWFsaXphdGlvbg==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19zaGFkb3dSZWdpc3RlclNldHM=::MA==::TnVtYmVyIG9mIHNoYWRvdyByZWdpc3RlciBzZXRzICgwLTYzKQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bXB1X251bU9mSW5zdFJlZ2lvbg==::OA==::TnVtYmVyIG9mIGluc3RydWN0aW9uIHJlZ2lvbnM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bXB1X251bU9mRGF0YVJlZ2lvbg==::OA==::TnVtYmVyIG9mIGRhdGEgcmVnaW9ucw==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X1RMQk1pc3NFeGNPZmZzZXQ=::MA==::RmFzdCBUTEIgTWlzcyBFeGNlcHRpb24gdmVjdG9yIG9mZnNldA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVzZXRPZmZzZXQ=::MA==::UmVzZXQgdmVjdG9yIG9mZnNldA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZXhjZXB0aW9uT2Zmc2V0::MzI=::RXhjZXB0aW9uIHZlY3RvciBvZmZzZXQ=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3B1SUQ=::MA==::Q1BVSUQgY29udHJvbCByZWdpc3RlciB2YWx1ZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "YnJlYWtPZmZzZXQ=::MzI=::QnJlYWsgdmVjdG9yIG9mZnNldA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVzZXRTbGF2ZQ==::bWVtLnMx::UmVzZXQgdmVjdG9yIG1lbW9yeQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X1RMQk1pc3NFeGNTbGF2ZQ==::Tm9uZQ==::RmFzdCBUTEIgTWlzcyBFeGNlcHRpb24gdmVjdG9yIG1lbW9yeQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZXhjZXB0aW9uU2xhdmU=::bWVtLnMx::RXhjZXB0aW9uIHZlY3RvciBtZW1vcnk=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "YnJlYWtTbGF2ZQ==::Tm9uZQ==::QnJlYWsgdmVjdG9yIG1lbW9yeQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19pbnRlcnJ1cHRDb250cm9sbGVyVHlwZQ==::SW50ZXJuYWw=::SW50ZXJydXB0IGNvbnRyb2xsZXI=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19icmFuY2hQcmVkaWN0aW9uVHlwZQ==::RHluYW1pYw==::QnJhbmNoIHByZWRpY3Rpb24gdHlwZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19iaHRQdHJTeg==::OA==::TnVtYmVyIG9mIGVudHJpZXMgKDItYml0cyB3aWRlKQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3B1QXJjaFJldg==::MQ==::QXJjaGl0ZWN0dXJlIFJldmlzaW9u" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c3RyYXRpeF9kc3BibG9ja19zaGlmdF9tdWw=::ZmFsc2U=::VXNlIERTUCBCbG9jayBmb3IgU2hpZnRlciBhbmQgTXVsdGlwbGllcg==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2hpZnRlclR5cGU=::bWVkaXVtX2xlX3NoaWZ0::U2hpZnRlcg==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bXVsdGlwbGllclR5cGU=::bm9fbXVs::TXVsdGlwbGllcg==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGl2aWRlclR5cGU=::bm9fZGl2::RGl2aWRlcg==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bXB1X21pbkluc3RSZWdpb25TaXpl::MTI=::TWluaW11bSBpbnN0cnVjdGlvbiByZWdpb24gc2l6ZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bXB1X21pbkRhdGFSZWdpb25TaXpl::MTI=::TWluaW11bSBkYXRhIHJlZ2lvbiBzaXpl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X3VpdGxiTnVtRW50cmllcw==::NA==::TWljcm8gSVRMQiBlbnRyaWVz" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X3VkdGxiTnVtRW50cmllcw==::Ng==::TWljcm8gRFRMQiBlbnRyaWVz" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X3RsYlB0clN6::Nw==::VExCIGVudHJpZXM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X3RsYk51bVdheXM=::MTY=::VExCIFNldC1Bc3NvY2lhdGl2aXR5" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X3Byb2Nlc3NJRE51bUJpdHM=::OA==::UHJvY2VzcyBJRCAoUElEKSBiaXRz" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW1wbA==::VGlueQ==::TmlvcyBJSSBDb3Jl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aWNhY2hlX3NpemU=::NDA5Ng==::U2l6ZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZmFfY2FjaGVfbGluZQ==::Mg==::TnVtYmVyIG9mIExpbmVz" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZmFfY2FjaGVfbGluZXNpemU=::MA==::TGluZSBTaXpl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aWNhY2hlX3RhZ3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::VGFnIFJBTSBibG9jayB0eXBl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aWNhY2hlX3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::RGF0YSBSQU0gYmxvY2sgdHlwZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aWNhY2hlX251bVRDSU0=::MA==::TnVtYmVyIG9mIHRpZ2h0bHkgY291cGxlZCBpbnN0cnVjdGlvbiBtYXN0ZXIgcG9ydHM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aWNhY2hlX2J1cnN0VHlwZQ==::Tm9uZQ==::QWRkIGJ1cnN0Y291bnQgc2lnbmFsIHRvIGluc3RydWN0aW9uX21hc3Rlcg==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX2J1cnN0cw==::ZmFsc2U=::QWRkIGJ1cnN0Y291bnQgc2lnbmFsIHRvIGRhdGFfbWFzdGVy" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX3ZpY3RpbV9idWZfaW1wbA==::cmFt::VmljdGltIGJ1ZmZlciBpbXBsZW1lbnRhdGlvbg==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX3NpemU=::MjA0OA==::U2l6ZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX3RhZ3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::VGFnIFJBTSBibG9jayB0eXBl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::RGF0YSBSQU0gYmxvY2sgdHlwZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX251bVRDRE0=::MA==::TnVtYmVyIG9mIHRpZ2h0bHkgY291cGxlZCBkYXRhIG1hc3RlciBwb3J0cw==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19leHBvcnR2ZWN0b3Jz::ZmFsc2U=::RXhwb3J0IFZlY3RvcnM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ191c2VkZXNpZ253YXJl::ZmFsc2U=::VXNlIERlc2lnbndhcmUgQ29tcG9uZW50cw==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19lY2NfcHJlc2VudA==::ZmFsc2U=::RUNDIFByZXNlbnQ=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19pY19lY2NfcHJlc2VudA==::dHJ1ZQ==::SW5zdHJ1Y3Rpb24gQ2FjaGUgRUNDIFByZXNlbnQ=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19yZl9lY2NfcHJlc2VudA==::dHJ1ZQ==::UmVnaXN0ZXIgRmlsZSBFQ0MgUHJlc2VudA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19tbXVfZWNjX3ByZXNlbnQ=::dHJ1ZQ==::TU1VIEVDQyBQcmVzZW50" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19kY19lY2NfcHJlc2VudA==::dHJ1ZQ==::RGF0YSBDYWNoZSBFQ0MgUHJlc2VudA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19pdGNtX2VjY19wcmVzZW50::dHJ1ZQ==::SW5zdHJ1Y3Rpb24gVENNIEVDQyBQcmVzZW50" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19kdGNtX2VjY19wcmVzZW50::dHJ1ZQ==::RGF0YSBUQ00gRUNDIFByZXNlbnQ=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVnZmlsZV9yYW1CbG9ja1R5cGU=::QXV0b21hdGlj::UkFNIGJsb2NrIHR5cGU=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "b2NpbWVtX3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::UkFNIGJsb2NrIHR5cGU=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "b2NpbWVtX3JhbUluaXQ=::ZmFsc2U=::SW5pdGlhbGl6ZWQgT0NJIFJBTQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::TU1VIFJBTSBibG9jayB0eXBl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Ymh0X3JhbUJsb2NrVHlwZQ==::QXV0b21hdGlj::QkhUIFJBTSBCbG9jayBUeXBl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y2R4X2VuYWJsZWQ=::ZmFsc2U=::Q0RYIChDb2RlIERlbnNpdHkgZVh0ZW5zaW9uKSBJbnN0cnVjdGlvbnM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bXB4X2VuYWJsZWQ=::ZmFsc2U=::TVBYIChNdWx0aS1Qcm9jZXNzb3IgZVh0ZW5zaW9uKSBJbnN0cnVjdGlvbnM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dG1yX2VuYWJsZWQ=::ZmFsc2U=::dG1yX2VuYWJsZWQ=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfZW5hYmxlZA==::dHJ1ZQ==::SW5jbHVkZSBKVEFHIERlYnVn" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfdHJpZ2dlckFybWluZw==::dHJ1ZQ==::VHJpZ2dlciBBcm1pbmc=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfZGVidWdSZXFTaWduYWxz::ZmFsc2U=::SW5jbHVkZSBkZWJ1Z3JlcSBhbmQgZGVidWdhY2sgU2lnbmFscw==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfYXNzaWduSnRhZ0luc3RhbmNlSUQ=::ZmFsc2U=::QXNzaWduIEpUQUcgSW5zdGFuY2UgSUQgZm9yIGRlYnVnIGNvcmUgbWFudWFsbHk=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfanRhZ0luc3RhbmNlSUQ=::MA==::SlRBRyBJbnN0YW5jZSBJRCB2YWx1ZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfT0NJT25jaGlwVHJhY2U=::XzEyOA==::T25jaGlwIFRyYWNlIEZyYW1lIFNpemU=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfaHdicmVha3BvaW50::MA==::SGFyZHdhcmUgQnJlYWtwb2ludHM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfZGF0YXRyaWdnZXI=::MA==::RGF0YSBUcmlnZ2Vycw==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfdHJhY2VUeXBl::bm9uZQ==::VHJhY2UgVHlwZXM=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfdHJhY2VTdG9yYWdl::b25jaGlwX3RyYWNl::VHJhY2UgU3RvcmFnZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19vY2lfdmVyc2lvbg==::MQ==::c2V0dGluZ19vY2lfdmVyc2lvbg==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19mYXN0X3JlZ2lzdGVyX3JlYWQ=::ZmFsc2U=::c2V0dGluZ19mYXN0X3JlZ2lzdGVyX3JlYWQ=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bWFzdGVyX2FkZHJfbWFw::ZmFsc2U=::bWFzdGVyX2FkZHJfbWFw" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX2Jhc2U=::MA==::aW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX2Jhc2U=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX3RvcA==::MA==::aW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX3RvcA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Zmxhc2hfaW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX2Jhc2U=::MA==::Zmxhc2hfaW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX2Jhc2U=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Zmxhc2hfaW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX3RvcA==::MA==::Zmxhc2hfaW5zdHJ1Y3Rpb25fbWFzdGVyX3BhZGRyX3RvcA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YV9tYXN0ZXJfcGFkZHJfYmFzZQ==::MA==::ZGF0YV9tYXN0ZXJfcGFkZHJfYmFzZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YV9tYXN0ZXJfcGFkZHJfdG9w::MA==::ZGF0YV9tYXN0ZXJfcGFkZHJfdG9w" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8wX3BhZGRyX2Jhc2U=::MA==::dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8wX3BhZGRyX2Jhc2U=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8wX3BhZGRyX3RvcA==::MA==::dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8wX3BhZGRyX3RvcA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8xX3BhZGRyX2Jhc2U=::MA==::dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8xX3BhZGRyX2Jhc2U=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8xX3BhZGRyX3RvcA==::MA==::dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8xX3BhZGRyX3RvcA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8yX3BhZGRyX2Jhc2U=::MA==::dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8yX3BhZGRyX2Jhc2U=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8yX3BhZGRyX3RvcA==::MA==::dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8yX3BhZGRyX3RvcA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8zX3BhZGRyX2Jhc2U=::MA==::dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8zX3BhZGRyX2Jhc2U=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8zX3BhZGRyX3RvcA==::MA==::dGlnaHRseV9jb3VwbGVkX2luc3RydWN0aW9uX21hc3Rlcl8zX3BhZGRyX3RvcA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzBfcGFkZHJfYmFzZQ==::MA==::dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzBfcGFkZHJfYmFzZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzBfcGFkZHJfdG9w::MA==::dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzBfcGFkZHJfdG9w" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzFfcGFkZHJfYmFzZQ==::MA==::dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzFfcGFkZHJfYmFzZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzFfcGFkZHJfdG9w::MA==::dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzFfcGFkZHJfdG9w" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzJfcGFkZHJfYmFzZQ==::MA==::dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzJfcGFkZHJfYmFzZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzJfcGFkZHJfdG9w::MA==::dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzJfcGFkZHJfdG9w" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzNfcGFkZHJfYmFzZQ==::MA==::dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzNfcGFkZHJfYmFzZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzNfcGFkZHJfdG9w::MA==::dGlnaHRseV9jb3VwbGVkX2RhdGFfbWFzdGVyXzNfcGFkZHJfdG9w" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdHJ1Y3Rpb25fbWFzdGVyX2hpZ2hfcGVyZm9ybWFuY2VfcGFkZHJfYmFzZQ==::MA==::aW5zdHJ1Y3Rpb25fbWFzdGVyX2hpZ2hfcGVyZm9ybWFuY2VfcGFkZHJfYmFzZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdHJ1Y3Rpb25fbWFzdGVyX2hpZ2hfcGVyZm9ybWFuY2VfcGFkZHJfdG9w::MA==::aW5zdHJ1Y3Rpb25fbWFzdGVyX2hpZ2hfcGVyZm9ybWFuY2VfcGFkZHJfdG9w" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YV9tYXN0ZXJfaGlnaF9wZXJmb3JtYW5jZV9wYWRkcl9iYXNl::MA==::ZGF0YV9tYXN0ZXJfaGlnaF9wZXJmb3JtYW5jZV9wYWRkcl9iYXNl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YV9tYXN0ZXJfaGlnaF9wZXJmb3JtYW5jZV9wYWRkcl90b3A=::MA==::ZGF0YV9tYXN0ZXJfaGlnaF9wZXJmb3JtYW5jZV9wYWRkcl90b3A=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "cmVzZXRBYnNvbHV0ZUFkZHI=::MA==::UmVzZXQgdmVjdG9y" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZXhjZXB0aW9uQWJzb2x1dGVBZGRy::MzI=::RXhjZXB0aW9uIHZlY3Rvcg==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "YnJlYWtBYnNvbHV0ZUFkZHI=::MTMzMTUy::QnJlYWsgdmVjdG9y" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "bW11X1RMQk1pc3NFeGNBYnNBZGRy::MA==::RmFzdCBUTEIgTWlzcyBFeGNlcHRpb24gdmVjdG9y" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX2J1cnN0c19kZXJpdmVk::ZmFsc2U=::ZGNhY2hlX2J1cnN0c19kZXJpdmVk" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX3NpemVfZGVyaXZlZA==::MjA0OA==::ZGNhY2hlX3NpemVfZGVyaXZlZA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "YnJlYWtTbGF2ZV9kZXJpdmVk::Y3B1LmRlYnVnX21lbV9zbGF2ZQ==::YnJlYWtTbGF2ZV9kZXJpdmVk" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGNhY2hlX2xpbmVTaXplX2Rlcml2ZWQ=::MzI=::ZGNhY2hlX2xpbmVTaXplX2Rlcml2ZWQ=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19pb3JlZ2lvbkJ5cGFzc0RDYWNoZQ==::ZmFsc2U=::c2V0dGluZ19pb3JlZ2lvbkJ5cGFzc0RDYWNoZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "c2V0dGluZ19iaXQzMUJ5cGFzc0RDYWNoZQ==::ZmFsc2U=::c2V0dGluZ19iaXQzMUJ5cGFzc0RDYWNoZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dHJhbnNsYXRlX29u::InN5bnRoZXNpcyB0cmFuc2xhdGVfb24i::dHJhbnNsYXRlX29u" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dHJhbnNsYXRlX29mZg==::InN5bnRoZXNpcyB0cmFuc2xhdGVfb2ZmIg==::dHJhbnNsYXRlX29mZg==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfb25jaGlwdHJhY2U=::ZmFsc2U=::ZGVidWdfb25jaGlwdHJhY2U=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfb2ZmY2hpcHRyYWNl::ZmFsc2U=::ZGVidWdfb2ZmY2hpcHRyYWNl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfaW5zdHRyYWNl::ZmFsc2U=::ZGVidWdfaW5zdHRyYWNl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGVidWdfZGF0YXRyYWNl::ZmFsc2U=::ZGVidWdfZGF0YXRyYWNl" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdEFkZHJXaWR0aA==::MTg=::aW5zdEFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZmFBZGRyV2lkdGg=::MQ==::ZmFBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YUFkZHJXaWR0aA==::MTg=::ZGF0YUFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMEFkZHJXaWR0aA==::MQ==::dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMEFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMUFkZHJXaWR0aA==::MQ==::dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMUFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMkFkZHJXaWR0aA==::MQ==::dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyMkFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyM0FkZHJXaWR0aA==::MQ==::dGlnaHRseUNvdXBsZWREYXRhTWFzdGVyM0FkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjBBZGRyV2lkdGg=::MQ==::dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjBBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjFBZGRyV2lkdGg=::MQ==::dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjFBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjJBZGRyV2lkdGg=::MQ==::dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjJBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjNBZGRyV2lkdGg=::MQ==::dGlnaHRseUNvdXBsZWRJbnN0cnVjdGlvbk1hc3RlcjNBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YU1hc3RlckhpZ2hQZXJmb3JtYW5jZUFkZHJXaWR0aA==::MQ==::ZGF0YU1hc3RlckhpZ2hQZXJmb3JtYW5jZUFkZHJXaWR0aA==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdHJ1Y3Rpb25NYXN0ZXJIaWdoUGVyZm9ybWFuY2VBZGRyV2lkdGg=::MQ==::aW5zdHJ1Y3Rpb25NYXN0ZXJIaWdoUGVyZm9ybWFuY2VBZGRyV2lkdGg=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW5zdFNsYXZlTWFwUGFyYW0=::PGFkZHJlc3MtbWFwPjxzbGF2ZSBuYW1lPSdtZW0uczEnIHN0YXJ0PScweDAnIGVuZD0nMHgyMDAwMCcgdHlwZT0nYWx0ZXJhX2F2YWxvbl9vbmNoaXBfbWVtb3J5Mi5zMScgLz48c2xhdmUgbmFtZT0nY3B1LmRlYnVnX21lbV9zbGF2ZScgc3RhcnQ9JzB4MjA4MDAnIGVuZD0nMHgyMTAwMCcgdHlwZT0nYWx0ZXJhX25pb3MyX2dlbjIuZGVidWdfbWVtX3NsYXZlJyAvPjwvYWRkcmVzcy1tYXA+::aW5zdFNsYXZlTWFwUGFyYW0=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGF0YVNsYXZlTWFwUGFyYW0=::PGFkZHJlc3MtbWFwPjxzbGF2ZSBuYW1lPSdtZW0uczInIHN0YXJ0PScweDAnIGVuZD0nMHgyMDAwMCcgdHlwZT0nYWx0ZXJhX2F2YWxvbl9vbmNoaXBfbWVtb3J5Mi5zMicgLz48c2xhdmUgbmFtZT0nY3B1LmRlYnVnX21lbV9zbGF2ZScgc3RhcnQ9JzB4MjA4MDAnIGVuZD0nMHgyMTAwMCcgdHlwZT0nYWx0ZXJhX25pb3MyX2dlbjIuZGVidWdfbWVtX3NsYXZlJyAvPjxzbGF2ZSBuYW1lPSdzeXNfY2xrX3RpbWVyLnMxJyBzdGFydD0nMHgyMTAwMCcgZW5kPScweDIxMDIwJyB0eXBlPSdhbHRlcmFfYXZhbG9uX3RpbWVyLnMxJyAvPjxzbGF2ZSBuYW1lPSdzZW0ucmFtX3NsYXZlJyBzdGFydD0nMHgyMTAyMCcgZW5kPScweDIxMDMwJyB0eXBlPSdTZW1hZm9yLnJhbV9zbGF2ZScgLz48c2xhdmUgbmFtZT0nc2VtLmN0bF9zbGF2ZScgc3RhcnQ9JzB4MjEwMzAnIGVuZD0nMHgyMTAzOCcgdHlwZT0nU2VtYWZvci5jdGxfc2xhdmUnIC8+PHNsYXZlIG5hbWU9J2p0YWdfdWFydC5hdmFsb25fanRhZ19zbGF2ZScgc3RhcnQ9JzB4MjEwMzgnIGVuZD0nMHgyMTA0MCcgdHlwZT0nYWx0ZXJhX2F2YWxvbl9qdGFnX3VhcnQuYXZhbG9uX2p0YWdfc2xhdmUnIC8+PC9hZGRyZXNzLW1hcD4=::ZGF0YVNsYXZlTWFwUGFyYW0=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y2xvY2tGcmVxdWVuY3k=::NTAwMDAwMDA=::Y2xvY2tGcmVxdWVuY3k=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGV2aWNlRmFtaWx5TmFtZQ==::Q3ljbG9uZSBJViBF::ZGV2aWNlRmFtaWx5TmFtZQ==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "aW50ZXJuYWxJcnFNYXNrU3lzdGVtSW5mbw==::Mw==::aW50ZXJuYWxJcnFNYXNrU3lzdGVtSW5mbw==" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "Y3VzdG9tSW5zdFNsYXZlc1N5c3RlbUluZm8=::PGluZm8vPg==::Y3VzdG9tSW5zdFNsYXZlc1N5c3RlbUluZm8=" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_COMPONENT_PARAMETER "ZGV2aWNlRmVhdHVyZXNTeXN0ZW1JbmZv::ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1::ZGV2aWNlRmVhdHVyZXNTeXN0ZW1JbmZv" + +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "niosII.v"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_reset_controller.v"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_reset_synchronizer.v"] +set_global_assignment -library "niosII" -name SDC_FILE [file join $::quartus(qip_path) "submodules/altera_reset_controller.sdc"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_irq_mapper.sv"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0.v"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_avalon_st_adapter.v"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_rsp_mux_001.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_merlin_arbitrator.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_rsp_mux.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_rsp_demux.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_cmd_mux_002.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_cmd_mux.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_cmd_demux_001.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_cmd_demux.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_router_008.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_router_004.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_router_002.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_router_001.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mm_interconnect_0_router.sv"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_avalon_sc_fifo.v"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_merlin_slave_agent.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_merlin_burst_uncompressor.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_merlin_master_agent.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_merlin_slave_translator.sv"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_merlin_master_translator.sv"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_sys_clk_timer.v"] +set_global_assignment -library "niosII" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "submodules/dec.sv"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/periodram.v"] +set_global_assignment -library "niosII" -name SOURCE_FILE [file join $::quartus(qip_path) "submodules/niosII_mem.hex"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_mem.v"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_jtag_uart.v"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_cpu.v"] +set_global_assignment -library "niosII" -name SDC_FILE [file join $::quartus(qip_path) "submodules/niosII_cpu_cpu.sdc"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_cpu_cpu.v"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_cpu_cpu_debug_slave_sysclk.v"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_cpu_cpu_debug_slave_tck.v"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_cpu_cpu_debug_slave_wrapper.v"] +set_global_assignment -library "niosII" -name SOURCE_FILE [file join $::quartus(qip_path) "submodules/niosII_cpu_cpu_ociram_default_contents.mif"] +set_global_assignment -library "niosII" -name SOURCE_FILE [file join $::quartus(qip_path) "submodules/niosII_cpu_cpu_rf_ram_a.mif"] +set_global_assignment -library "niosII" -name SOURCE_FILE [file join $::quartus(qip_path) "submodules/niosII_cpu_cpu_rf_ram_b.mif"] +set_global_assignment -library "niosII" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/niosII_cpu_cpu_test_bench.v"] + +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_TOOL_NAME "altera_reset_controller" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "altera_reset_controller" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_TOOL_NAME "altera_irq_mapper" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_irq_mapper" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_TOOL_NAME "altera_mm_interconnect" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_TOOL_NAME "altera_avalon_st_adapter" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_TOOL_NAME "error_adapter" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_TOOL_NAME "altera_merlin_multiplexer" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux_001" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_TOOL_NAME "altera_merlin_multiplexer" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_mux" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_TOOL_NAME "altera_merlin_demultiplexer" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_rsp_demux" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_TOOL_NAME "altera_merlin_multiplexer" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux_002" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_TOOL_NAME "altera_merlin_multiplexer" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_mux" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_TOOL_NAME "altera_merlin_demultiplexer" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux_001" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_TOOL_NAME "altera_merlin_demultiplexer" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_cmd_demux" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_TOOL_NAME "altera_merlin_router" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_router_008" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_TOOL_NAME "altera_merlin_router" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_router_004" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_TOOL_NAME "altera_merlin_router" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_router_002" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_TOOL_NAME "altera_merlin_router" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_router_001" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_TOOL_NAME "altera_merlin_router" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mm_interconnect_0_router" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_TOOL_NAME "altera_avalon_sc_fifo" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "altera_avalon_sc_fifo" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_TOOL_NAME "altera_merlin_slave_agent" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "altera_merlin_slave_agent" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_TOOL_NAME "altera_merlin_master_agent" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "altera_merlin_master_agent" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_TOOL_NAME "altera_merlin_slave_translator" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "altera_merlin_slave_translator" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_TOOL_NAME "altera_merlin_master_translator" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "altera_merlin_master_translator" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_TOOL_NAME "altera_avalon_timer" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_sys_clk_timer" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_TOOL_NAME "altera_avalon_onchip_memory2" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_mem" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_TOOL_NAME "altera_avalon_jtag_uart" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_jtag_uart" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_TOOL_NAME "altera_nios2_gen2" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_cpu" -library "niosII" -name IP_TOOL_ENV "Qsys" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_TOOL_NAME "altera_nios2_gen2_unit" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_TOOL_VERSION "18.1" +set_global_assignment -entity "niosII_cpu_cpu" -library "niosII" -name IP_TOOL_ENV "Qsys" diff --git a/Top/niosII/synthesis/niosII.regmap b/Top/niosII/synthesis/niosII.regmap new file mode 100644 index 0000000..f356dc0 --- /dev/null +++ b/Top/niosII/synthesis/niosII.regmap @@ -0,0 +1,266 @@ + + +niosII + + + niosII_sys_clk_timer_s1_altera_avalon_timer0x00000000 + + 0x0 + 16 + registers + + + + status + Status + The status register has two defined bits. TO (timeout), RUN + 0x0 + 16 + read-write + 0x0 + 0xffff + + TO + The TO (timeout) bit is set to 1 when the internal counter reaches zero. Once set by a timeout event, the TO bit stays set until explicitly cleared by a master peripheral. Write zero to the status register to clear the TO bit. + 0x0 + 1 + read-only + clear + + RUN + The RUN bit reads as 1 when the internal counter is running; otherwise this bit reads as 0. The RUN bit is not changed by + a write operation to the status register. + 1 + 1 + read-only + + + Reserved + Reserved + 2 + 14 + read-write + + + Reserved + true + + + + + + + control + The control register has four defined bits. ITO (Timeout Interrupt), CONT (continue), START, STOP + 0x1 + 16 + read-write + + 0x0 + + + ITO + If the ITO bit is 1, the interval timer core generates an IRQ when the status register's TO bit is 1. When the ITO bit is 0, the timer does not generate IRQs. + 0 + 1 + read-write + + + CONT + The CONT (continuous) bit determines how the internal counter behaves when it reaches zero. If the CONT bit is 1, the counter runs continuously until it is stopped by the STOP bit. If CONT is 0, the counter stops after it reaches zero. When the counter reaches zero, it reloads with the value stored in the period registers, regardless of the CONT bit. + 1 + 1 + read-write + + + START + Writing a 1 to the START bit starts the internal counter running (counting down). The START bit is an event bit that enables the counter when a write operation is performed. If the timer is stopped, writing a 1 to the START bit causes the timer to restart counting from the number currently stored in its counter. If the timer is already running, writing a 1 to START has no effect. Writing 0 to the START bit has no effect. + 2 + 1 + write-only + + + STOP + Writing a 1 to the STOP bit stops the internal counter. The STOP bit is an event bit that causes the counter to stop when a write operation is performed. If the timer is already stopped, writing a 1 to STOP has no effect. Writing a 0 to the stop bit has no effect. If the timer hardware is configured with Start/Stop control bits off, writing the STOP bit has no effect. + 3 + 1 + write-only + + + Reserved + Reserved + 4 + 12 + read-write + + + Reserved + true + + + + + + ${period_name_0} + The period_n registers together store the timeout period value when a write operation to one of the period_n register or the internal counter reaches 0. The timer's actual period is one cycle greater than the value stored in the period_n registers because the counter assumes the value zero for one clock cycle. Writing to one of the period_n registers stops the internal counter, except when the hardware is configured with Start/Stop control bits off. If Start/Stop control bits is off, writing either register does not stop the counter. When the hardware is configured with Writeable period disabled, writing to one of the period_n registers causes the counter to reset to the fixed Timeout Period specified at system generation time. + 0x2 + 16 + read-write + ${period_name_0_reset_value} + 0xffff + + + ${period_name_1} + + 0x3 + 16 + read-write + ${period_name_1_reset_value} + 0xffff + + + ${period_snap_0} + + 0x4 + 16 + read-write + ${period_snap_0_reset_value} + 0xffff + + + ${period_snap_1} + + 0x5 + 16 + read-write + ${period_snap_1_reset_value} + 0xffff + + + ${snap_0} + A master peripheral may request a coherent snapshot of the current internal counter by performing a write operation (write-data ignored) to one of the snap_n registers. When a write occurs, the value of the counter is copied to snap_n registers. The snapshot occurs whether or not the counter is running. Requesting a snapshot does not change the internal counter's operation. + 0x6 + 16 + read-write + 0x0 + 0xffff + + + ${snap_1} + + 0x7 + 16 + read-write + 0x0 + 0xffff + + + ${snap_2} + + 0x8 + 16 + read-write + 0x0 + 0xffff + + + ${snap_3} + + 0x9 + 16 + read-write + 0x0 + 0xffff + + + + + niosII_jtag_uart_avalon_jtag_slave_altera_avalon_jtag_uart0x00000000 + + 0x0 + 8 + registers + + + + DATA + Data + Embedded software accesses the read and write FIFOs via the data register. A read from the data register returns the first character from the FIFO (if one is available) in the DATA field. Reading also returns information about the number of characters remaining in the FIFO in the RAVAIL field. A write to the data register stores the value of the DATA field in the write FIFO. If the write FIFO is full, the character is lost. + 0x0 + 32 + read-write + 0x0 + 0xffffffff + + data + The value to transfer to/from the JTAG core. When writing, the DATA field holds a character to be written to the write FIFO. When reading, the DATA field holds a character read from the read FIFO. + 0x0 + 8 + read-write + + rvalid + Indicates whether the DATA field is valid. If RVALID=1, the DATA field is valid, otherwise DATA is undefined. + 0xf + 1 + read-only + + ravail + The number of characters remaining in the read FIFO (after the current read). + 0x10 + 16 + read-only + + + + + CONTROL + Control + Embedded software controls the JTAG UART core's interrupt generation and reads status information via the control register. A read from the control register returns the status of the read and write FIFOs. Writes to the register can be used to enable/disable interrupts, or clear the AC bit. + 0x4 + 32 + read-write + 0x0 + 0xffffffff + + re + Interrupt-enable bit for read interrupts. + 0x0 + 1 + read-write + + we + Interrupt-enable bit for write interrupts + 0x1 + 1 + read-write + + ri + Indicates that the read interrupt is pending. + 0x8 + 1 + read-only + + wi + Indicates that the write interrupt is pending. + 0x9 + 1 + read-only + + ac + Indicates that there has been JTAG activity since the bit was cleared. Writing 1 to AC clears it to 0. + 0xa + 1 + read-write + + wspace + The number of spaces available in the write FIFO + 0x10 + 16 + read-only + + + + + + + \ No newline at end of file diff --git a/Top/niosII/synthesis/niosII.v b/Top/niosII/synthesis/niosII.v new file mode 100644 index 0000000..086dfa7 --- /dev/null +++ b/Top/niosII/synthesis/niosII.v @@ -0,0 +1,299 @@ +// niosII.v + +// Generated using ACDS version 18.1 625 + +`timescale 1 ps / 1 ps +module niosII ( + input wire clk_clk, // clk.clk + input wire reset_reset_n, // reset.reset_n + input wire sem_export_train, // sem_export.train + output wire sem_export_red, // .red + output wire sem_export_yellow, // .yellow + output wire sem_export_green // .green + ); + + wire [31:0] cpu_data_master_readdata; // mm_interconnect_0:cpu_data_master_readdata -> cpu:d_readdata + wire cpu_data_master_waitrequest; // mm_interconnect_0:cpu_data_master_waitrequest -> cpu:d_waitrequest + wire cpu_data_master_debugaccess; // cpu:debug_mem_slave_debugaccess_to_roms -> mm_interconnect_0:cpu_data_master_debugaccess + wire [17:0] cpu_data_master_address; // cpu:d_address -> mm_interconnect_0:cpu_data_master_address + wire [3:0] cpu_data_master_byteenable; // cpu:d_byteenable -> mm_interconnect_0:cpu_data_master_byteenable + wire cpu_data_master_read; // cpu:d_read -> mm_interconnect_0:cpu_data_master_read + wire cpu_data_master_write; // cpu:d_write -> mm_interconnect_0:cpu_data_master_write + wire [31:0] cpu_data_master_writedata; // cpu:d_writedata -> mm_interconnect_0:cpu_data_master_writedata + wire [31:0] cpu_instruction_master_readdata; // mm_interconnect_0:cpu_instruction_master_readdata -> cpu:i_readdata + wire cpu_instruction_master_waitrequest; // mm_interconnect_0:cpu_instruction_master_waitrequest -> cpu:i_waitrequest + wire [17:0] cpu_instruction_master_address; // cpu:i_address -> mm_interconnect_0:cpu_instruction_master_address + wire cpu_instruction_master_read; // cpu:i_read -> mm_interconnect_0:cpu_instruction_master_read + wire mm_interconnect_0_jtag_uart_avalon_jtag_slave_chipselect; // mm_interconnect_0:jtag_uart_avalon_jtag_slave_chipselect -> jtag_uart:av_chipselect + wire [31:0] mm_interconnect_0_jtag_uart_avalon_jtag_slave_readdata; // jtag_uart:av_readdata -> mm_interconnect_0:jtag_uart_avalon_jtag_slave_readdata + wire mm_interconnect_0_jtag_uart_avalon_jtag_slave_waitrequest; // jtag_uart:av_waitrequest -> mm_interconnect_0:jtag_uart_avalon_jtag_slave_waitrequest + wire [0:0] mm_interconnect_0_jtag_uart_avalon_jtag_slave_address; // mm_interconnect_0:jtag_uart_avalon_jtag_slave_address -> jtag_uart:av_address + wire mm_interconnect_0_jtag_uart_avalon_jtag_slave_read; // mm_interconnect_0:jtag_uart_avalon_jtag_slave_read -> jtag_uart:av_read_n + wire mm_interconnect_0_jtag_uart_avalon_jtag_slave_write; // mm_interconnect_0:jtag_uart_avalon_jtag_slave_write -> jtag_uart:av_write_n + wire [31:0] mm_interconnect_0_jtag_uart_avalon_jtag_slave_writedata; // mm_interconnect_0:jtag_uart_avalon_jtag_slave_writedata -> jtag_uart:av_writedata + wire [31:0] mm_interconnect_0_sem_ctl_slave_readdata; // sem:ctl_rddata -> mm_interconnect_0:sem_ctl_slave_readdata + wire [0:0] mm_interconnect_0_sem_ctl_slave_address; // mm_interconnect_0:sem_ctl_slave_address -> sem:ctl_addr + wire mm_interconnect_0_sem_ctl_slave_read; // mm_interconnect_0:sem_ctl_slave_read -> sem:ctl_rd + wire mm_interconnect_0_sem_ctl_slave_write; // mm_interconnect_0:sem_ctl_slave_write -> sem:ctl_wr + wire [31:0] mm_interconnect_0_sem_ctl_slave_writedata; // mm_interconnect_0:sem_ctl_slave_writedata -> sem:ctl_wrdata + wire [31:0] mm_interconnect_0_cpu_debug_mem_slave_readdata; // cpu:debug_mem_slave_readdata -> mm_interconnect_0:cpu_debug_mem_slave_readdata + wire mm_interconnect_0_cpu_debug_mem_slave_waitrequest; // cpu:debug_mem_slave_waitrequest -> mm_interconnect_0:cpu_debug_mem_slave_waitrequest + wire mm_interconnect_0_cpu_debug_mem_slave_debugaccess; // mm_interconnect_0:cpu_debug_mem_slave_debugaccess -> cpu:debug_mem_slave_debugaccess + wire [8:0] mm_interconnect_0_cpu_debug_mem_slave_address; // mm_interconnect_0:cpu_debug_mem_slave_address -> cpu:debug_mem_slave_address + wire mm_interconnect_0_cpu_debug_mem_slave_read; // mm_interconnect_0:cpu_debug_mem_slave_read -> cpu:debug_mem_slave_read + wire [3:0] mm_interconnect_0_cpu_debug_mem_slave_byteenable; // mm_interconnect_0:cpu_debug_mem_slave_byteenable -> cpu:debug_mem_slave_byteenable + wire mm_interconnect_0_cpu_debug_mem_slave_write; // mm_interconnect_0:cpu_debug_mem_slave_write -> cpu:debug_mem_slave_write + wire [31:0] mm_interconnect_0_cpu_debug_mem_slave_writedata; // mm_interconnect_0:cpu_debug_mem_slave_writedata -> cpu:debug_mem_slave_writedata + wire [1:0] mm_interconnect_0_sem_ram_slave_address; // mm_interconnect_0:sem_ram_slave_address -> sem:ram_addr + wire mm_interconnect_0_sem_ram_slave_write; // mm_interconnect_0:sem_ram_slave_write -> sem:ram_wr + wire [31:0] mm_interconnect_0_sem_ram_slave_writedata; // mm_interconnect_0:sem_ram_slave_writedata -> sem:ram_wrdata + wire mm_interconnect_0_sys_clk_timer_s1_chipselect; // mm_interconnect_0:sys_clk_timer_s1_chipselect -> sys_clk_timer:chipselect + wire [15:0] mm_interconnect_0_sys_clk_timer_s1_readdata; // sys_clk_timer:readdata -> mm_interconnect_0:sys_clk_timer_s1_readdata + wire [2:0] mm_interconnect_0_sys_clk_timer_s1_address; // mm_interconnect_0:sys_clk_timer_s1_address -> sys_clk_timer:address + wire mm_interconnect_0_sys_clk_timer_s1_write; // mm_interconnect_0:sys_clk_timer_s1_write -> sys_clk_timer:write_n + wire [15:0] mm_interconnect_0_sys_clk_timer_s1_writedata; // mm_interconnect_0:sys_clk_timer_s1_writedata -> sys_clk_timer:writedata + wire mm_interconnect_0_mem_s2_chipselect; // mm_interconnect_0:mem_s2_chipselect -> mem:chipselect2 + wire [31:0] mm_interconnect_0_mem_s2_readdata; // mem:readdata2 -> mm_interconnect_0:mem_s2_readdata + wire [14:0] mm_interconnect_0_mem_s2_address; // mm_interconnect_0:mem_s2_address -> mem:address2 + wire [3:0] mm_interconnect_0_mem_s2_byteenable; // mm_interconnect_0:mem_s2_byteenable -> mem:byteenable2 + wire mm_interconnect_0_mem_s2_write; // mm_interconnect_0:mem_s2_write -> mem:write2 + wire [31:0] mm_interconnect_0_mem_s2_writedata; // mm_interconnect_0:mem_s2_writedata -> mem:writedata2 + wire mm_interconnect_0_mem_s2_clken; // mm_interconnect_0:mem_s2_clken -> mem:clken2 + wire mm_interconnect_0_mem_s1_chipselect; // mm_interconnect_0:mem_s1_chipselect -> mem:chipselect + wire [31:0] mm_interconnect_0_mem_s1_readdata; // mem:readdata -> mm_interconnect_0:mem_s1_readdata + wire [14:0] mm_interconnect_0_mem_s1_address; // mm_interconnect_0:mem_s1_address -> mem:address + wire [3:0] mm_interconnect_0_mem_s1_byteenable; // mm_interconnect_0:mem_s1_byteenable -> mem:byteenable + wire mm_interconnect_0_mem_s1_write; // mm_interconnect_0:mem_s1_write -> mem:write + wire [31:0] mm_interconnect_0_mem_s1_writedata; // mm_interconnect_0:mem_s1_writedata -> mem:writedata + wire mm_interconnect_0_mem_s1_clken; // mm_interconnect_0:mem_s1_clken -> mem:clken + wire irq_mapper_receiver0_irq; // sys_clk_timer:irq -> irq_mapper:receiver0_irq + wire irq_mapper_receiver1_irq; // jtag_uart:av_irq -> irq_mapper:receiver1_irq + wire [31:0] cpu_irq_irq; // irq_mapper:sender_irq -> cpu:irq + wire rst_controller_reset_out_reset; // rst_controller:reset_out -> [cpu:reset_n, irq_mapper:reset, jtag_uart:rst_n, mem:reset, mm_interconnect_0:cpu_reset_reset_bridge_in_reset_reset, rst_translator:in_reset, sem:clrn, sys_clk_timer:reset_n] + wire rst_controller_reset_out_reset_req; // rst_controller:reset_req -> [cpu:reset_req, mem:reset_req, rst_translator:reset_req_in] + wire cpu_debug_reset_request_reset; // cpu:debug_reset_request -> rst_controller:reset_in1 + + niosII_cpu cpu ( + .clk (clk_clk), // clk.clk + .reset_n (~rst_controller_reset_out_reset), // reset.reset_n + .reset_req (rst_controller_reset_out_reset_req), // .reset_req + .d_address (cpu_data_master_address), // data_master.address + .d_byteenable (cpu_data_master_byteenable), // .byteenable + .d_read (cpu_data_master_read), // .read + .d_readdata (cpu_data_master_readdata), // .readdata + .d_waitrequest (cpu_data_master_waitrequest), // .waitrequest + .d_write (cpu_data_master_write), // .write + .d_writedata (cpu_data_master_writedata), // .writedata + .debug_mem_slave_debugaccess_to_roms (cpu_data_master_debugaccess), // .debugaccess + .i_address (cpu_instruction_master_address), // instruction_master.address + .i_read (cpu_instruction_master_read), // .read + .i_readdata (cpu_instruction_master_readdata), // .readdata + .i_waitrequest (cpu_instruction_master_waitrequest), // .waitrequest + .irq (cpu_irq_irq), // irq.irq + .debug_reset_request (cpu_debug_reset_request_reset), // debug_reset_request.reset + .debug_mem_slave_address (mm_interconnect_0_cpu_debug_mem_slave_address), // debug_mem_slave.address + .debug_mem_slave_byteenable (mm_interconnect_0_cpu_debug_mem_slave_byteenable), // .byteenable + .debug_mem_slave_debugaccess (mm_interconnect_0_cpu_debug_mem_slave_debugaccess), // .debugaccess + .debug_mem_slave_read (mm_interconnect_0_cpu_debug_mem_slave_read), // .read + .debug_mem_slave_readdata (mm_interconnect_0_cpu_debug_mem_slave_readdata), // .readdata + .debug_mem_slave_waitrequest (mm_interconnect_0_cpu_debug_mem_slave_waitrequest), // .waitrequest + .debug_mem_slave_write (mm_interconnect_0_cpu_debug_mem_slave_write), // .write + .debug_mem_slave_writedata (mm_interconnect_0_cpu_debug_mem_slave_writedata), // .writedata + .dummy_ci_port () // custom_instruction_master.readra + ); + + niosII_jtag_uart jtag_uart ( + .clk (clk_clk), // clk.clk + .rst_n (~rst_controller_reset_out_reset), // reset.reset_n + .av_chipselect (mm_interconnect_0_jtag_uart_avalon_jtag_slave_chipselect), // avalon_jtag_slave.chipselect + .av_address (mm_interconnect_0_jtag_uart_avalon_jtag_slave_address), // .address + .av_read_n (~mm_interconnect_0_jtag_uart_avalon_jtag_slave_read), // .read_n + .av_readdata (mm_interconnect_0_jtag_uart_avalon_jtag_slave_readdata), // .readdata + .av_write_n (~mm_interconnect_0_jtag_uart_avalon_jtag_slave_write), // .write_n + .av_writedata (mm_interconnect_0_jtag_uart_avalon_jtag_slave_writedata), // .writedata + .av_waitrequest (mm_interconnect_0_jtag_uart_avalon_jtag_slave_waitrequest), // .waitrequest + .av_irq (irq_mapper_receiver1_irq) // irq.irq + ); + + niosII_mem mem ( + .address (mm_interconnect_0_mem_s1_address), // s1.address + .clken (mm_interconnect_0_mem_s1_clken), // .clken + .chipselect (mm_interconnect_0_mem_s1_chipselect), // .chipselect + .write (mm_interconnect_0_mem_s1_write), // .write + .readdata (mm_interconnect_0_mem_s1_readdata), // .readdata + .writedata (mm_interconnect_0_mem_s1_writedata), // .writedata + .byteenable (mm_interconnect_0_mem_s1_byteenable), // .byteenable + .address2 (mm_interconnect_0_mem_s2_address), // s2.address + .chipselect2 (mm_interconnect_0_mem_s2_chipselect), // .chipselect + .clken2 (mm_interconnect_0_mem_s2_clken), // .clken + .write2 (mm_interconnect_0_mem_s2_write), // .write + .readdata2 (mm_interconnect_0_mem_s2_readdata), // .readdata + .writedata2 (mm_interconnect_0_mem_s2_writedata), // .writedata + .byteenable2 (mm_interconnect_0_mem_s2_byteenable), // .byteenable + .clk (clk_clk), // clk1.clk + .reset (rst_controller_reset_out_reset), // reset1.reset + .reset_req (rst_controller_reset_out_reset_req), // .reset_req + .freeze (1'b0) // (terminated) + ); + + dec #( + .m (8) + ) sem ( + .clk (clk_clk), // clock.clk + .ctl_wr (mm_interconnect_0_sem_ctl_slave_write), // ctl_slave.write + .ctl_rd (mm_interconnect_0_sem_ctl_slave_read), // .read + .ctl_addr (mm_interconnect_0_sem_ctl_slave_address), // .address + .ctl_wrdata (mm_interconnect_0_sem_ctl_slave_writedata), // .writedata + .ctl_rddata (mm_interconnect_0_sem_ctl_slave_readdata), // .readdata + .clrn (~rst_controller_reset_out_reset), // reset_n.reset_n + .ram_wr (mm_interconnect_0_sem_ram_slave_write), // ram_slave.write + .ram_addr (mm_interconnect_0_sem_ram_slave_address), // .address + .ram_wrdata (mm_interconnect_0_sem_ram_slave_writedata), // .writedata + .train (sem_export_train), // sem.train + .red (sem_export_red), // .red + .yellow (sem_export_yellow), // .yellow + .green (sem_export_green) // .green + ); + + niosII_sys_clk_timer sys_clk_timer ( + .clk (clk_clk), // clk.clk + .reset_n (~rst_controller_reset_out_reset), // reset.reset_n + .address (mm_interconnect_0_sys_clk_timer_s1_address), // s1.address + .writedata (mm_interconnect_0_sys_clk_timer_s1_writedata), // .writedata + .readdata (mm_interconnect_0_sys_clk_timer_s1_readdata), // .readdata + .chipselect (mm_interconnect_0_sys_clk_timer_s1_chipselect), // .chipselect + .write_n (~mm_interconnect_0_sys_clk_timer_s1_write), // .write_n + .irq (irq_mapper_receiver0_irq) // irq.irq + ); + + niosII_mm_interconnect_0 mm_interconnect_0 ( + .clk_clk_clk (clk_clk), // clk_clk.clk + .cpu_reset_reset_bridge_in_reset_reset (rst_controller_reset_out_reset), // cpu_reset_reset_bridge_in_reset.reset + .cpu_data_master_address (cpu_data_master_address), // cpu_data_master.address + .cpu_data_master_waitrequest (cpu_data_master_waitrequest), // .waitrequest + .cpu_data_master_byteenable (cpu_data_master_byteenable), // .byteenable + .cpu_data_master_read (cpu_data_master_read), // .read + .cpu_data_master_readdata (cpu_data_master_readdata), // .readdata + .cpu_data_master_write (cpu_data_master_write), // .write + .cpu_data_master_writedata (cpu_data_master_writedata), // .writedata + .cpu_data_master_debugaccess (cpu_data_master_debugaccess), // .debugaccess + .cpu_instruction_master_address (cpu_instruction_master_address), // cpu_instruction_master.address + .cpu_instruction_master_waitrequest (cpu_instruction_master_waitrequest), // .waitrequest + .cpu_instruction_master_read (cpu_instruction_master_read), // .read + .cpu_instruction_master_readdata (cpu_instruction_master_readdata), // .readdata + .cpu_debug_mem_slave_address (mm_interconnect_0_cpu_debug_mem_slave_address), // cpu_debug_mem_slave.address + .cpu_debug_mem_slave_write (mm_interconnect_0_cpu_debug_mem_slave_write), // .write + .cpu_debug_mem_slave_read (mm_interconnect_0_cpu_debug_mem_slave_read), // .read + .cpu_debug_mem_slave_readdata (mm_interconnect_0_cpu_debug_mem_slave_readdata), // .readdata + .cpu_debug_mem_slave_writedata (mm_interconnect_0_cpu_debug_mem_slave_writedata), // .writedata + .cpu_debug_mem_slave_byteenable (mm_interconnect_0_cpu_debug_mem_slave_byteenable), // .byteenable + .cpu_debug_mem_slave_waitrequest (mm_interconnect_0_cpu_debug_mem_slave_waitrequest), // .waitrequest + .cpu_debug_mem_slave_debugaccess (mm_interconnect_0_cpu_debug_mem_slave_debugaccess), // .debugaccess + .jtag_uart_avalon_jtag_slave_address (mm_interconnect_0_jtag_uart_avalon_jtag_slave_address), // jtag_uart_avalon_jtag_slave.address + .jtag_uart_avalon_jtag_slave_write (mm_interconnect_0_jtag_uart_avalon_jtag_slave_write), // .write + .jtag_uart_avalon_jtag_slave_read (mm_interconnect_0_jtag_uart_avalon_jtag_slave_read), // .read + .jtag_uart_avalon_jtag_slave_readdata (mm_interconnect_0_jtag_uart_avalon_jtag_slave_readdata), // .readdata + .jtag_uart_avalon_jtag_slave_writedata (mm_interconnect_0_jtag_uart_avalon_jtag_slave_writedata), // .writedata + .jtag_uart_avalon_jtag_slave_waitrequest (mm_interconnect_0_jtag_uart_avalon_jtag_slave_waitrequest), // .waitrequest + .jtag_uart_avalon_jtag_slave_chipselect (mm_interconnect_0_jtag_uart_avalon_jtag_slave_chipselect), // .chipselect + .mem_s1_address (mm_interconnect_0_mem_s1_address), // mem_s1.address + .mem_s1_write (mm_interconnect_0_mem_s1_write), // .write + .mem_s1_readdata (mm_interconnect_0_mem_s1_readdata), // .readdata + .mem_s1_writedata (mm_interconnect_0_mem_s1_writedata), // .writedata + .mem_s1_byteenable (mm_interconnect_0_mem_s1_byteenable), // .byteenable + .mem_s1_chipselect (mm_interconnect_0_mem_s1_chipselect), // .chipselect + .mem_s1_clken (mm_interconnect_0_mem_s1_clken), // .clken + .mem_s2_address (mm_interconnect_0_mem_s2_address), // mem_s2.address + .mem_s2_write (mm_interconnect_0_mem_s2_write), // .write + .mem_s2_readdata (mm_interconnect_0_mem_s2_readdata), // .readdata + .mem_s2_writedata (mm_interconnect_0_mem_s2_writedata), // .writedata + .mem_s2_byteenable (mm_interconnect_0_mem_s2_byteenable), // .byteenable + .mem_s2_chipselect (mm_interconnect_0_mem_s2_chipselect), // .chipselect + .mem_s2_clken (mm_interconnect_0_mem_s2_clken), // .clken + .sem_ctl_slave_address (mm_interconnect_0_sem_ctl_slave_address), // sem_ctl_slave.address + .sem_ctl_slave_write (mm_interconnect_0_sem_ctl_slave_write), // .write + .sem_ctl_slave_read (mm_interconnect_0_sem_ctl_slave_read), // .read + .sem_ctl_slave_readdata (mm_interconnect_0_sem_ctl_slave_readdata), // .readdata + .sem_ctl_slave_writedata (mm_interconnect_0_sem_ctl_slave_writedata), // .writedata + .sem_ram_slave_address (mm_interconnect_0_sem_ram_slave_address), // sem_ram_slave.address + .sem_ram_slave_write (mm_interconnect_0_sem_ram_slave_write), // .write + .sem_ram_slave_writedata (mm_interconnect_0_sem_ram_slave_writedata), // .writedata + .sys_clk_timer_s1_address (mm_interconnect_0_sys_clk_timer_s1_address), // sys_clk_timer_s1.address + .sys_clk_timer_s1_write (mm_interconnect_0_sys_clk_timer_s1_write), // .write + .sys_clk_timer_s1_readdata (mm_interconnect_0_sys_clk_timer_s1_readdata), // .readdata + .sys_clk_timer_s1_writedata (mm_interconnect_0_sys_clk_timer_s1_writedata), // .writedata + .sys_clk_timer_s1_chipselect (mm_interconnect_0_sys_clk_timer_s1_chipselect) // .chipselect + ); + + niosII_irq_mapper irq_mapper ( + .clk (clk_clk), // clk.clk + .reset (rst_controller_reset_out_reset), // clk_reset.reset + .receiver0_irq (irq_mapper_receiver0_irq), // receiver0.irq + .receiver1_irq (irq_mapper_receiver1_irq), // receiver1.irq + .sender_irq (cpu_irq_irq) // sender.irq + ); + + altera_reset_controller #( + .NUM_RESET_INPUTS (2), + .OUTPUT_RESET_SYNC_EDGES ("deassert"), + .SYNC_DEPTH (2), + .RESET_REQUEST_PRESENT (1), + .RESET_REQ_WAIT_TIME (1), + .MIN_RST_ASSERTION_TIME (3), + .RESET_REQ_EARLY_DSRT_TIME (1), + .USE_RESET_REQUEST_IN0 (0), + .USE_RESET_REQUEST_IN1 (0), + .USE_RESET_REQUEST_IN2 (0), + .USE_RESET_REQUEST_IN3 (0), + .USE_RESET_REQUEST_IN4 (0), + .USE_RESET_REQUEST_IN5 (0), + .USE_RESET_REQUEST_IN6 (0), + .USE_RESET_REQUEST_IN7 (0), + .USE_RESET_REQUEST_IN8 (0), + .USE_RESET_REQUEST_IN9 (0), + .USE_RESET_REQUEST_IN10 (0), + .USE_RESET_REQUEST_IN11 (0), + .USE_RESET_REQUEST_IN12 (0), + .USE_RESET_REQUEST_IN13 (0), + .USE_RESET_REQUEST_IN14 (0), + .USE_RESET_REQUEST_IN15 (0), + .ADAPT_RESET_REQUEST (0) + ) rst_controller ( + .reset_in0 (~reset_reset_n), // reset_in0.reset + .reset_in1 (cpu_debug_reset_request_reset), // reset_in1.reset + .clk (clk_clk), // clk.clk + .reset_out (rst_controller_reset_out_reset), // reset_out.reset + .reset_req (rst_controller_reset_out_reset_req), // .reset_req + .reset_req_in0 (1'b0), // (terminated) + .reset_req_in1 (1'b0), // (terminated) + .reset_in2 (1'b0), // (terminated) + .reset_req_in2 (1'b0), // (terminated) + .reset_in3 (1'b0), // (terminated) + .reset_req_in3 (1'b0), // (terminated) + .reset_in4 (1'b0), // (terminated) + .reset_req_in4 (1'b0), // (terminated) + .reset_in5 (1'b0), // (terminated) + .reset_req_in5 (1'b0), // (terminated) + .reset_in6 (1'b0), // (terminated) + .reset_req_in6 (1'b0), // (terminated) + .reset_in7 (1'b0), // (terminated) + .reset_req_in7 (1'b0), // (terminated) + .reset_in8 (1'b0), // (terminated) + .reset_req_in8 (1'b0), // (terminated) + .reset_in9 (1'b0), // (terminated) + .reset_req_in9 (1'b0), // (terminated) + .reset_in10 (1'b0), // (terminated) + .reset_req_in10 (1'b0), // (terminated) + .reset_in11 (1'b0), // (terminated) + .reset_req_in11 (1'b0), // (terminated) + .reset_in12 (1'b0), // (terminated) + .reset_req_in12 (1'b0), // (terminated) + .reset_in13 (1'b0), // (terminated) + .reset_req_in13 (1'b0), // (terminated) + .reset_in14 (1'b0), // (terminated) + .reset_req_in14 (1'b0), // (terminated) + .reset_in15 (1'b0), // (terminated) + .reset_req_in15 (1'b0) // (terminated) + ); + +endmodule diff --git a/Top/niosII/synthesis/submodules/altera_avalon_sc_fifo.v b/Top/niosII/synthesis/submodules/altera_avalon_sc_fifo.v new file mode 100644 index 0000000..cf8576a --- /dev/null +++ b/Top/niosII/synthesis/submodules/altera_avalon_sc_fifo.v @@ -0,0 +1,915 @@ +// ----------------------------------------------------------- +// Legal Notice: (C)2007 Altera Corporation. All rights reserved. Your +// use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any +// output files any of the foregoing (including device programming or +// simulation files), and any associated documentation or information are +// expressly subject to the terms and conditions of the Altera Program +// License Subscription Agreement or other applicable license agreement, +// including, without limitation, that your use is for the sole purpose +// of programming logic devices manufactured by Altera and sold by Altera +// or its authorized distributors. Please refer to the applicable +// agreement for further details. +// +// Description: Single clock Avalon-ST FIFO. +// ----------------------------------------------------------- + +`timescale 1 ns / 1 ns + + +//altera message_off 10036 +module altera_avalon_sc_fifo +#( + // -------------------------------------------------- + // Parameters + // -------------------------------------------------- + parameter SYMBOLS_PER_BEAT = 1, + parameter BITS_PER_SYMBOL = 8, + parameter FIFO_DEPTH = 16, + parameter CHANNEL_WIDTH = 0, + parameter ERROR_WIDTH = 0, + parameter USE_PACKETS = 0, + parameter USE_FILL_LEVEL = 0, + parameter USE_STORE_FORWARD = 0, + parameter USE_ALMOST_FULL_IF = 0, + parameter USE_ALMOST_EMPTY_IF = 0, + + // -------------------------------------------------- + // Empty latency is defined as the number of cycles + // required for a write to deassert the empty flag. + // For example, a latency of 1 means that the empty + // flag is deasserted on the cycle after a write. + // + // Another way to think of it is the latency for a + // write to propagate to the output. + // + // An empty latency of 0 implies lookahead, which is + // only implemented for the register-based FIFO. + // -------------------------------------------------- + parameter EMPTY_LATENCY = 3, + parameter USE_MEMORY_BLOCKS = 1, + + // -------------------------------------------------- + // Internal Parameters + // -------------------------------------------------- + parameter DATA_WIDTH = SYMBOLS_PER_BEAT * BITS_PER_SYMBOL, + parameter EMPTY_WIDTH = log2ceil(SYMBOLS_PER_BEAT) +) +( + // -------------------------------------------------- + // Ports + // -------------------------------------------------- + input clk, + input reset, + + input [DATA_WIDTH-1: 0] in_data, + input in_valid, + input in_startofpacket, + input in_endofpacket, + input [((EMPTY_WIDTH>0) ? (EMPTY_WIDTH-1):0) : 0] in_empty, + input [((ERROR_WIDTH>0) ? (ERROR_WIDTH-1):0) : 0] in_error, + input [((CHANNEL_WIDTH>0) ? (CHANNEL_WIDTH-1):0): 0] in_channel, + output in_ready, + + output [DATA_WIDTH-1 : 0] out_data, + output reg out_valid, + output out_startofpacket, + output out_endofpacket, + output [((EMPTY_WIDTH>0) ? (EMPTY_WIDTH-1):0) : 0] out_empty, + output [((ERROR_WIDTH>0) ? (ERROR_WIDTH-1):0) : 0] out_error, + output [((CHANNEL_WIDTH>0) ? (CHANNEL_WIDTH-1):0): 0] out_channel, + input out_ready, + + input [(USE_STORE_FORWARD ? 2 : 1) : 0] csr_address, + input csr_write, + input csr_read, + input [31 : 0] csr_writedata, + output reg [31 : 0] csr_readdata, + + output wire almost_full_data, + output wire almost_empty_data +); + + // -------------------------------------------------- + // Local Parameters + // -------------------------------------------------- + localparam ADDR_WIDTH = log2ceil(FIFO_DEPTH); + localparam DEPTH = FIFO_DEPTH; + localparam PKT_SIGNALS_WIDTH = 2 + EMPTY_WIDTH; + localparam PAYLOAD_WIDTH = (USE_PACKETS == 1) ? + 2 + EMPTY_WIDTH + DATA_WIDTH + ERROR_WIDTH + CHANNEL_WIDTH: + DATA_WIDTH + ERROR_WIDTH + CHANNEL_WIDTH; + + // -------------------------------------------------- + // Internal Signals + // -------------------------------------------------- + genvar i; + + reg [PAYLOAD_WIDTH-1 : 0] mem [DEPTH-1 : 0]; + reg [ADDR_WIDTH-1 : 0] wr_ptr; + reg [ADDR_WIDTH-1 : 0] rd_ptr; + reg [DEPTH-1 : 0] mem_used; + + wire [ADDR_WIDTH-1 : 0] next_wr_ptr; + wire [ADDR_WIDTH-1 : 0] next_rd_ptr; + wire [ADDR_WIDTH-1 : 0] incremented_wr_ptr; + wire [ADDR_WIDTH-1 : 0] incremented_rd_ptr; + + wire [ADDR_WIDTH-1 : 0] mem_rd_ptr; + + wire read; + wire write; + + reg empty; + reg next_empty; + reg full; + reg next_full; + + wire [PKT_SIGNALS_WIDTH-1 : 0] in_packet_signals; + wire [PKT_SIGNALS_WIDTH-1 : 0] out_packet_signals; + wire [PAYLOAD_WIDTH-1 : 0] in_payload; + reg [PAYLOAD_WIDTH-1 : 0] internal_out_payload; + reg [PAYLOAD_WIDTH-1 : 0] out_payload; + + reg internal_out_valid; + wire internal_out_ready; + + reg [ADDR_WIDTH : 0] fifo_fill_level; + reg [ADDR_WIDTH : 0] fill_level; + + reg [ADDR_WIDTH-1 : 0] sop_ptr = 0; + wire [ADDR_WIDTH-1 : 0] curr_sop_ptr; + reg [23:0] almost_full_threshold; + reg [23:0] almost_empty_threshold; + reg [23:0] cut_through_threshold; + reg [15:0] pkt_cnt; + reg drop_on_error_en; + reg error_in_pkt; + reg pkt_has_started; + reg sop_has_left_fifo; + reg fifo_too_small_r; + reg pkt_cnt_eq_zero; + reg pkt_cnt_eq_one; + + wire wait_for_threshold; + reg pkt_mode; + wire wait_for_pkt; + wire ok_to_forward; + wire in_pkt_eop_arrive; + wire out_pkt_leave; + wire in_pkt_start; + wire in_pkt_error; + wire drop_on_error; + wire fifo_too_small; + wire out_pkt_sop_leave; + wire [31:0] max_fifo_size; + reg fifo_fill_level_lt_cut_through_threshold; + + // -------------------------------------------------- + // Define Payload + // + // Icky part where we decide which signals form the + // payload to the FIFO with generate blocks. + // -------------------------------------------------- + generate + if (EMPTY_WIDTH > 0) begin : gen_blk1 + assign in_packet_signals = {in_startofpacket, in_endofpacket, in_empty}; + assign {out_startofpacket, out_endofpacket, out_empty} = out_packet_signals; + end + else begin : gen_blk1_else + assign out_empty = in_error; + assign in_packet_signals = {in_startofpacket, in_endofpacket}; + assign {out_startofpacket, out_endofpacket} = out_packet_signals; + end + endgenerate + + generate + if (USE_PACKETS) begin : gen_blk2 + if (ERROR_WIDTH > 0) begin : gen_blk3 + if (CHANNEL_WIDTH > 0) begin : gen_blk4 + assign in_payload = {in_packet_signals, in_data, in_error, in_channel}; + assign {out_packet_signals, out_data, out_error, out_channel} = out_payload; + end + else begin : gen_blk4_else + assign out_channel = in_channel; + assign in_payload = {in_packet_signals, in_data, in_error}; + assign {out_packet_signals, out_data, out_error} = out_payload; + end + end + else begin : gen_blk3_else + assign out_error = in_error; + if (CHANNEL_WIDTH > 0) begin : gen_blk5 + assign in_payload = {in_packet_signals, in_data, in_channel}; + assign {out_packet_signals, out_data, out_channel} = out_payload; + end + else begin : gen_blk5_else + assign out_channel = in_channel; + assign in_payload = {in_packet_signals, in_data}; + assign {out_packet_signals, out_data} = out_payload; + end + end + end + else begin : gen_blk2_else + assign out_packet_signals = 0; + if (ERROR_WIDTH > 0) begin : gen_blk6 + if (CHANNEL_WIDTH > 0) begin : gen_blk7 + assign in_payload = {in_data, in_error, in_channel}; + assign {out_data, out_error, out_channel} = out_payload; + end + else begin : gen_blk7_else + assign out_channel = in_channel; + assign in_payload = {in_data, in_error}; + assign {out_data, out_error} = out_payload; + end + end + else begin : gen_blk6_else + assign out_error = in_error; + if (CHANNEL_WIDTH > 0) begin : gen_blk8 + assign in_payload = {in_data, in_channel}; + assign {out_data, out_channel} = out_payload; + end + else begin : gen_blk8_else + assign out_channel = in_channel; + assign in_payload = in_data; + assign out_data = out_payload; + end + end + end + endgenerate + + // -------------------------------------------------- + // Memory-based FIFO storage + // + // To allow a ready latency of 0, the read index is + // obtained from the next read pointer and memory + // outputs are unregistered. + // + // If the empty latency is 1, we infer bypass logic + // around the memory so writes propagate to the + // outputs on the next cycle. + // + // Do not change the way this is coded: Quartus needs + // a perfect match to the template, and any attempt to + // refactor the two always blocks into one will break + // memory inference. + // -------------------------------------------------- + generate if (USE_MEMORY_BLOCKS == 1) begin : gen_blk9 + + if (EMPTY_LATENCY == 1) begin : gen_blk10 + + always @(posedge clk) begin + if (in_valid && in_ready) + mem[wr_ptr] = in_payload; + + internal_out_payload = mem[mem_rd_ptr]; + end + + end else begin : gen_blk10_else + + always @(posedge clk) begin + if (in_valid && in_ready) + mem[wr_ptr] <= in_payload; + + internal_out_payload <= mem[mem_rd_ptr]; + end + + end + + assign mem_rd_ptr = next_rd_ptr; + + end else begin : gen_blk9_else + + // -------------------------------------------------- + // Register-based FIFO storage + // + // Uses a shift register as the storage element. Each + // shift register slot has a bit which indicates if + // the slot is occupied (credit to Sam H for the idea). + // The occupancy bits are contiguous and start from the + // lsb, so 0000, 0001, 0011, 0111, 1111 for a 4-deep + // FIFO. + // + // Each slot is enabled during a read or when it + // is unoccupied. New data is always written to every + // going-to-be-empty slot (we keep track of which ones + // are actually useful with the occupancy bits). On a + // read we shift occupied slots. + // + // The exception is the last slot, which always gets + // new data when it is unoccupied. + // -------------------------------------------------- + for (i = 0; i < DEPTH-1; i = i + 1) begin : shift_reg + always @(posedge clk or posedge reset) begin + if (reset) begin + mem[i] <= 0; + end + else if (read || !mem_used[i]) begin + if (!mem_used[i+1]) + mem[i] <= in_payload; + else + mem[i] <= mem[i+1]; + end + end + end + + always @(posedge clk, posedge reset) begin + if (reset) begin + mem[DEPTH-1] <= 0; + end + else begin + if (DEPTH == 1) begin + if (write) + mem[DEPTH-1] <= in_payload; + end + else if (!mem_used[DEPTH-1]) + mem[DEPTH-1] <= in_payload; + end + end + + end + endgenerate + + assign read = internal_out_ready && internal_out_valid && ok_to_forward; + assign write = in_ready && in_valid; + + // -------------------------------------------------- + // Pointer Management + // -------------------------------------------------- + generate if (USE_MEMORY_BLOCKS == 1) begin : gen_blk11 + + assign incremented_wr_ptr = wr_ptr + 1'b1; + assign incremented_rd_ptr = rd_ptr + 1'b1; + assign next_wr_ptr = drop_on_error ? curr_sop_ptr : write ? incremented_wr_ptr : wr_ptr; + assign next_rd_ptr = (read) ? incremented_rd_ptr : rd_ptr; + + always @(posedge clk or posedge reset) begin + if (reset) begin + wr_ptr <= 0; + rd_ptr <= 0; + end + else begin + wr_ptr <= next_wr_ptr; + rd_ptr <= next_rd_ptr; + end + end + + end else begin : gen_blk11_else + + // -------------------------------------------------- + // Shift Register Occupancy Bits + // + // Consider a 4-deep FIFO with 2 entries: 0011 + // On a read and write, do not modify the bits. + // On a write, left-shift the bits to get 0111. + // On a read, right-shift the bits to get 0001. + // + // Also, on a write we set bit0 (the head), while + // clearing the tail on a read. + // -------------------------------------------------- + always @(posedge clk or posedge reset) begin + if (reset) begin + mem_used[0] <= 0; + end + else begin + if (write ^ read) begin + if (write) + mem_used[0] <= 1; + else if (read) begin + if (DEPTH > 1) + mem_used[0] <= mem_used[1]; + else + mem_used[0] <= 0; + end + end + end + end + + if (DEPTH > 1) begin : gen_blk12 + always @(posedge clk or posedge reset) begin + if (reset) begin + mem_used[DEPTH-1] <= 0; + end + else begin + if (write ^ read) begin + mem_used[DEPTH-1] <= 0; + if (write) + mem_used[DEPTH-1] <= mem_used[DEPTH-2]; + end + end + end + end + + for (i = 1; i < DEPTH-1; i = i + 1) begin : storage_logic + always @(posedge clk, posedge reset) begin + if (reset) begin + mem_used[i] <= 0; + end + else begin + if (write ^ read) begin + if (write) + mem_used[i] <= mem_used[i-1]; + else if (read) + mem_used[i] <= mem_used[i+1]; + end + end + end + end + + end + endgenerate + + + // -------------------------------------------------- + // Memory FIFO Status Management + // + // Generates the full and empty signals from the + // pointers. The FIFO is full when the next write + // pointer will be equal to the read pointer after + // a write. Reading from a FIFO clears full. + // + // The FIFO is empty when the next read pointer will + // be equal to the write pointer after a read. Writing + // to a FIFO clears empty. + // + // A simultaneous read and write must not change any of + // the empty or full flags unless there is a drop on error event. + // -------------------------------------------------- + generate if (USE_MEMORY_BLOCKS == 1) begin : gen_blk13 + + always @* begin + next_full = full; + next_empty = empty; + + if (read && !write) begin + next_full = 1'b0; + + if (incremented_rd_ptr == wr_ptr) + next_empty = 1'b1; + end + + if (write && !read) begin + if (!drop_on_error) + next_empty = 1'b0; + else if (curr_sop_ptr == rd_ptr) // drop on error and only 1 pkt in fifo + next_empty = 1'b1; + + if (incremented_wr_ptr == rd_ptr && !drop_on_error) + next_full = 1'b1; + end + + if (write && read && drop_on_error) begin + if (curr_sop_ptr == next_rd_ptr) + next_empty = 1'b1; + end + end + + always @(posedge clk or posedge reset) begin + if (reset) begin + empty <= 1; + full <= 0; + end + else begin + empty <= next_empty; + full <= next_full; + end + end + + end else begin : gen_blk13_else + // -------------------------------------------------- + // Register FIFO Status Management + // + // Full when the tail occupancy bit is 1. Empty when + // the head occupancy bit is 0. + // -------------------------------------------------- + always @* begin + full = mem_used[DEPTH-1]; + empty = !mem_used[0]; + + // ------------------------------------------ + // For a single slot FIFO, reading clears the + // full status immediately. + // ------------------------------------------ + if (DEPTH == 1) + full = mem_used[0] && !read; + + internal_out_payload = mem[0]; + + // ------------------------------------------ + // Writes clear empty immediately for lookahead modes. + // Note that we use in_valid instead of write to avoid + // combinational loops (in lookahead mode, qualifying + // with in_ready is meaningless). + // + // In a 1-deep FIFO, a possible combinational loop runs + // from write -> out_valid -> out_ready -> write + // ------------------------------------------ + if (EMPTY_LATENCY == 0) begin + empty = !mem_used[0] && !in_valid; + + if (!mem_used[0] && in_valid) + internal_out_payload = in_payload; + end + end + + end + endgenerate + + // -------------------------------------------------- + // Avalon-ST Signals + // + // The in_ready signal is straightforward. + // + // To match memory latency when empty latency > 1, + // out_valid assertions must be delayed by one clock + // cycle. + // + // Note: out_valid deassertions must not be delayed or + // the FIFO will underflow. + // -------------------------------------------------- + assign in_ready = !full; + assign internal_out_ready = out_ready || !out_valid; + + generate if (EMPTY_LATENCY > 1) begin : gen_blk14 + always @(posedge clk or posedge reset) begin + if (reset) + internal_out_valid <= 0; + else begin + internal_out_valid <= !empty & ok_to_forward & ~drop_on_error; + + if (read) begin + if (incremented_rd_ptr == wr_ptr) + internal_out_valid <= 1'b0; + end + end + end + end else begin : gen_blk14_else + always @* begin + internal_out_valid = !empty & ok_to_forward; + end + end + endgenerate + + // -------------------------------------------------- + // Single Output Pipeline Stage + // + // This output pipeline stage is enabled if the FIFO's + // empty latency is set to 3 (default). It is disabled + // for all other allowed latencies. + // + // Reason: The memory outputs are unregistered, so we have to + // register the output or fmax will drop if combinatorial + // logic is present on the output datapath. + // + // Q: The Avalon-ST spec says that I have to register my outputs + // But isn't the memory counted as a register? + // A: The path from the address lookup to the memory output is + // slow. Registering the memory outputs is a good idea. + // + // The registers get packed into the memory by the fitter + // which means minimal resources are consumed (the result + // is a altsyncram with registered outputs, available on + // all modern Altera devices). + // + // This output stage acts as an extra slot in the FIFO, + // and complicates the fill level. + // -------------------------------------------------- + generate if (EMPTY_LATENCY == 3) begin : gen_blk15 + always @(posedge clk or posedge reset) begin + if (reset) begin + out_valid <= 0; + out_payload <= 0; + end + else begin + if (internal_out_ready) begin + out_valid <= internal_out_valid & ok_to_forward; + out_payload <= internal_out_payload; + end + end + end + end + else begin : gen_blk15_else + always @* begin + out_valid = internal_out_valid; + out_payload = internal_out_payload; + end + end + endgenerate + + // -------------------------------------------------- + // Fill Level + // + // The fill level is calculated from the next write + // and read pointers to avoid unnecessary latency + // and logic. + // + // However, if the store-and-forward mode of the FIFO + // is enabled, the fill level is an up-down counter + // for fmax optimization reasons. + // + // If the output pipeline is enabled, the fill level + // must account for it, or we'll always be off by one. + // This may, or may not be important depending on the + // application. + // + // For now, we'll always calculate the exact fill level + // at the cost of an extra adder when the output stage + // is enabled. + // -------------------------------------------------- + generate if (USE_FILL_LEVEL) begin : gen_blk16 + wire [31:0] depth32; + assign depth32 = DEPTH; + + if (USE_STORE_FORWARD) begin + + reg [ADDR_WIDTH : 0] curr_packet_len_less_one; + + // -------------------------------------------------- + // We only drop on endofpacket. As long as we don't add to the fill + // level on the dropped endofpacket cycle, we can simply subtract + // (packet length - 1) from the fill level for dropped packets. + // -------------------------------------------------- + always @(posedge clk or posedge reset) begin + if (reset) begin + curr_packet_len_less_one <= 0; + end else begin + if (write) begin + curr_packet_len_less_one <= curr_packet_len_less_one + 1'b1; + if (in_endofpacket) + curr_packet_len_less_one <= 0; + end + end + end + + always @(posedge clk or posedge reset) begin + if (reset) begin + fifo_fill_level <= 0; + end else if (drop_on_error) begin + fifo_fill_level <= fifo_fill_level - curr_packet_len_less_one; + if (read) + fifo_fill_level <= fifo_fill_level - curr_packet_len_less_one - 1'b1; + end else if (write && !read) begin + fifo_fill_level <= fifo_fill_level + 1'b1; + end else if (read && !write) begin + fifo_fill_level <= fifo_fill_level - 1'b1; + end + end + + end else begin + + always @(posedge clk or posedge reset) begin + if (reset) + fifo_fill_level <= 0; + else if (next_full & !drop_on_error) + fifo_fill_level <= depth32[ADDR_WIDTH:0]; + else begin + fifo_fill_level[ADDR_WIDTH] <= 1'b0; + fifo_fill_level[ADDR_WIDTH-1 : 0] <= next_wr_ptr - next_rd_ptr; + end + end + + end + + always @* begin + fill_level = fifo_fill_level; + + if (EMPTY_LATENCY == 3) + fill_level = fifo_fill_level + {{ADDR_WIDTH{1'b0}}, out_valid}; + end + end + else begin : gen_blk16_else + always @* begin + fill_level = 0; + end + end + endgenerate + + generate if (USE_ALMOST_FULL_IF) begin : gen_blk17 + assign almost_full_data = (fill_level >= almost_full_threshold); + end + else + assign almost_full_data = 0; + endgenerate + + generate if (USE_ALMOST_EMPTY_IF) begin : gen_blk18 + assign almost_empty_data = (fill_level <= almost_empty_threshold); + end + else + assign almost_empty_data = 0; + endgenerate + + // -------------------------------------------------- + // Avalon-MM Status & Control Connection Point + // + // Register map: + // + // | Addr | RW | 31 - 0 | + // | 0 | R | Fill level | + // + // The registering of this connection point means + // that there is a cycle of latency between + // reads/writes and the updating of the fill level. + // -------------------------------------------------- + generate if (USE_STORE_FORWARD) begin : gen_blk19 + assign max_fifo_size = FIFO_DEPTH - 1; + always @(posedge clk or posedge reset) begin + if (reset) begin + almost_full_threshold <= max_fifo_size[23 : 0]; + almost_empty_threshold <= 0; + cut_through_threshold <= 0; + drop_on_error_en <= 0; + csr_readdata <= 0; + pkt_mode <= 1'b1; + end + else begin + if (csr_read) begin + csr_readdata <= 32'b0; + if (csr_address == 5) + csr_readdata <= {31'b0, drop_on_error_en}; + else if (csr_address == 4) + csr_readdata <= {8'b0, cut_through_threshold}; + else if (csr_address == 3) + csr_readdata <= {8'b0, almost_empty_threshold}; + else if (csr_address == 2) + csr_readdata <= {8'b0, almost_full_threshold}; + else if (csr_address == 0) + csr_readdata <= {{(31 - ADDR_WIDTH){1'b0}}, fill_level}; + end + else if (csr_write) begin + if(csr_address == 3'b101) + drop_on_error_en <= csr_writedata[0]; + else if(csr_address == 3'b100) begin + cut_through_threshold <= csr_writedata[23:0]; + pkt_mode <= (csr_writedata[23:0] == 0); + end + else if(csr_address == 3'b011) + almost_empty_threshold <= csr_writedata[23:0]; + else if(csr_address == 3'b010) + almost_full_threshold <= csr_writedata[23:0]; + end + end + end + end + else if (USE_ALMOST_FULL_IF || USE_ALMOST_EMPTY_IF) begin : gen_blk19_else1 + assign max_fifo_size = FIFO_DEPTH - 1; + always @(posedge clk or posedge reset) begin + if (reset) begin + almost_full_threshold <= max_fifo_size[23 : 0]; + almost_empty_threshold <= 0; + csr_readdata <= 0; + end + else begin + if (csr_read) begin + csr_readdata <= 32'b0; + if (csr_address == 3) + csr_readdata <= {8'b0, almost_empty_threshold}; + else if (csr_address == 2) + csr_readdata <= {8'b0, almost_full_threshold}; + else if (csr_address == 0) + csr_readdata <= {{(31 - ADDR_WIDTH){1'b0}}, fill_level}; + end + else if (csr_write) begin + if(csr_address == 3'b011) + almost_empty_threshold <= csr_writedata[23:0]; + else if(csr_address == 3'b010) + almost_full_threshold <= csr_writedata[23:0]; + end + end + end + end + else begin : gen_blk19_else2 + always @(posedge clk or posedge reset) begin + if (reset) begin + csr_readdata <= 0; + end + else if (csr_read) begin + csr_readdata <= 0; + + if (csr_address == 0) + csr_readdata <= {{(31 - ADDR_WIDTH){1'b0}}, fill_level}; + end + end + end + endgenerate + + // -------------------------------------------------- + // Store and forward logic + // -------------------------------------------------- + // if the fifo gets full before the entire packet or the + // cut-threshold condition is met then start sending out + // data in order to avoid dead-lock situation + + generate if (USE_STORE_FORWARD) begin : gen_blk20 + assign wait_for_threshold = (fifo_fill_level_lt_cut_through_threshold) & wait_for_pkt ; + assign wait_for_pkt = pkt_cnt_eq_zero | (pkt_cnt_eq_one & out_pkt_leave); + assign ok_to_forward = (pkt_mode ? (~wait_for_pkt | ~pkt_has_started) : + ~wait_for_threshold) | fifo_too_small_r; + assign in_pkt_eop_arrive = in_valid & in_ready & in_endofpacket; + assign in_pkt_start = in_valid & in_ready & in_startofpacket; + assign in_pkt_error = in_valid & in_ready & |in_error; + assign out_pkt_sop_leave = out_valid & out_ready & out_startofpacket; + assign out_pkt_leave = out_valid & out_ready & out_endofpacket; + assign fifo_too_small = (pkt_mode ? wait_for_pkt : wait_for_threshold) & full & out_ready; + + // count packets coming and going into the fifo + always @(posedge clk or posedge reset) begin + if (reset) begin + pkt_cnt <= 0; + pkt_has_started <= 0; + sop_has_left_fifo <= 0; + fifo_too_small_r <= 0; + pkt_cnt_eq_zero <= 1'b1; + pkt_cnt_eq_one <= 1'b0; + fifo_fill_level_lt_cut_through_threshold <= 1'b1; + end + else begin + fifo_fill_level_lt_cut_through_threshold <= fifo_fill_level < cut_through_threshold; + fifo_too_small_r <= fifo_too_small; + + if( in_pkt_eop_arrive ) + sop_has_left_fifo <= 1'b0; + else if (out_pkt_sop_leave & pkt_cnt_eq_zero ) + sop_has_left_fifo <= 1'b1; + + if (in_pkt_eop_arrive & ~out_pkt_leave & ~drop_on_error ) begin + pkt_cnt <= pkt_cnt + 1'b1; + pkt_cnt_eq_zero <= 0; + if (pkt_cnt == 0) + pkt_cnt_eq_one <= 1'b1; + else + pkt_cnt_eq_one <= 1'b0; + end + else if((~in_pkt_eop_arrive | drop_on_error) & out_pkt_leave) begin + pkt_cnt <= pkt_cnt - 1'b1; + if (pkt_cnt == 1) + pkt_cnt_eq_zero <= 1'b1; + else + pkt_cnt_eq_zero <= 1'b0; + if (pkt_cnt == 2) + pkt_cnt_eq_one <= 1'b1; + else + pkt_cnt_eq_one <= 1'b0; + end + + if (in_pkt_start) + pkt_has_started <= 1'b1; + else if (in_pkt_eop_arrive) + pkt_has_started <= 1'b0; + end + end + + // drop on error logic + always @(posedge clk or posedge reset) begin + if (reset) begin + sop_ptr <= 0; + error_in_pkt <= 0; + end + else begin + // save the location of the SOP + if ( in_pkt_start ) + sop_ptr <= wr_ptr; + + // remember if error in pkt + // log error only if packet has already started + if (in_pkt_eop_arrive) + error_in_pkt <= 1'b0; + else if ( in_pkt_error & (pkt_has_started | in_pkt_start)) + error_in_pkt <= 1'b1; + end + end + + assign drop_on_error = drop_on_error_en & (error_in_pkt | in_pkt_error) & in_pkt_eop_arrive & + ~sop_has_left_fifo & ~(out_pkt_sop_leave & pkt_cnt_eq_zero); + + assign curr_sop_ptr = (write && in_startofpacket && in_endofpacket) ? wr_ptr : sop_ptr; + + end + else begin : gen_blk20_else + assign ok_to_forward = 1'b1; + assign drop_on_error = 1'b0; + if (ADDR_WIDTH <= 1) + assign curr_sop_ptr = 1'b0; + else + assign curr_sop_ptr = {ADDR_WIDTH - 1 { 1'b0 }}; + end + endgenerate + + + // -------------------------------------------------- + // Calculates the log2ceil of the input value + // -------------------------------------------------- + function integer log2ceil; + input integer val; + reg[31:0] i; + + begin + i = 1; + log2ceil = 0; + + while (i < val) begin + log2ceil = log2ceil + 1; + i = i[30:0] << 1; + end + end + endfunction + +endmodule diff --git a/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv b/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv new file mode 100644 index 0000000..0ccebc0 --- /dev/null +++ b/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv @@ -0,0 +1,272 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// (C) 2001-2010 Altera Corporation. All rights reserved. +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/main/ip/merlin/altera_merlin_std_arbitrator/altera_merlin_std_arbitrator_core.sv#3 $ +// $Revision: #3 $ +// $Date: 2010/07/07 $ +// $Author: jyeap $ + +/* ----------------------------------------------------------------------- +Round-robin/fixed arbitration implementation. + +Q: how do you find the least-significant set-bit in an n-bit binary number, X? + +A: M = X & (~X + 1) + +Example: X = 101000100 + 101000100 & + 010111011 + 1 = + + 101000100 & + 010111100 = + ----------- + 000000100 + +The method can be generalized to find the first set-bit +at a bit index no lower than bit-index N, simply by adding +2**N rather than 1. + + +Q: how does this relate to round-robin arbitration? +A: +Let X be the concatenation of all request signals. +Let the number to be added to X (hereafter called the +top_priority) initialize to 1, and be assigned from the +concatenation of the previous saved-grant, left-rotated +by one position, each time arbitration occurs. The +concatenation of grants is then M. + +Problem: consider this case: + +top_priority = 010000 +request = 001001 +~request + top_priority = 000110 +next_grant = 000000 <- no one is granted! + +There was no "set bit at a bit index no lower than bit-index 4", so +the result was 0. + +We need to propagate the carry out from (~request + top_priority) to the LSB, so +that the sum becomes 000111, and next_grant is 000001. This operation could be +called a "circular add". + +A bit of experimentation on the circular add reveals a significant amount of +delay in exiting and re-entering the carry chain - this will vary with device +family. Quartus also reports a combinational loop warning. Finally, +Modelsim 6.3g has trouble with the expression, evaluating it to 'X'. But +Modelsim _doesn't_ report a combinational loop!) + +An alternate solution: concatenate the request vector with itself, and OR +corresponding bits from the top and bottom halves to determine next_grant. + +Example: + +top_priority = 010000 +{request, request} = 001001 001001 +{~request, ~request} + top_priority = 110111 000110 +result of & operation = 000001 000000 +next_grant = 000001 + +Notice that if request = 0, the sum operation will overflow, but we can ignore +this; the next_grant result is 0 (no one granted), as you might expect. +In the implementation, the last-granted value must be maintained as +a non-zero value - best probably simply not to update it when no requests +occur. + +----------------------------------------------------------------------- */ + +`timescale 1 ns / 1 ns + +module altera_merlin_arbitrator +#( + parameter NUM_REQUESTERS = 8, + // -------------------------------------- + // Implemented schemes + // "round-robin" + // "fixed-priority" + // "no-arb" + // -------------------------------------- + parameter SCHEME = "round-robin", + parameter PIPELINE = 0 +) +( + input clk, + input reset, + + // -------------------------------------- + // Requests + // -------------------------------------- + input [NUM_REQUESTERS-1:0] request, + + // -------------------------------------- + // Grants + // -------------------------------------- + output [NUM_REQUESTERS-1:0] grant, + + // -------------------------------------- + // Control Signals + // -------------------------------------- + input increment_top_priority, + input save_top_priority +); + + // -------------------------------------- + // Signals + // -------------------------------------- + wire [NUM_REQUESTERS-1:0] top_priority; + reg [NUM_REQUESTERS-1:0] top_priority_reg; + reg [NUM_REQUESTERS-1:0] last_grant; + wire [2*NUM_REQUESTERS-1:0] result; + + // -------------------------------------- + // Scheme Selection + // -------------------------------------- + generate + if (SCHEME == "round-robin" && NUM_REQUESTERS > 1) begin + assign top_priority = top_priority_reg; + end + else begin + // Fixed arbitration (or single-requester corner case) + assign top_priority = 1'b1; + end + endgenerate + + // -------------------------------------- + // Decision Logic + // -------------------------------------- + altera_merlin_arb_adder + #( + .WIDTH (2 * NUM_REQUESTERS) + ) + adder + ( + .a ({ ~request, ~request }), + .b ({{NUM_REQUESTERS{1'b0}}, top_priority}), + .sum (result) + ); + + + generate if (SCHEME == "no-arb") begin + + // -------------------------------------- + // No arbitration: just wire request directly to grant + // -------------------------------------- + assign grant = request; + + end else begin + // Do the math in double-vector domain + wire [2*NUM_REQUESTERS-1:0] grant_double_vector; + assign grant_double_vector = {request, request} & result; + + // -------------------------------------- + // Extract grant from the top and bottom halves + // of the double vector. + // -------------------------------------- + assign grant = + grant_double_vector[NUM_REQUESTERS - 1 : 0] | + grant_double_vector[2 * NUM_REQUESTERS - 1 : NUM_REQUESTERS]; + + end + endgenerate + + // -------------------------------------- + // Left-rotate the last grant vector to create top_priority. + // -------------------------------------- + always @(posedge clk or posedge reset) begin + if (reset) begin + top_priority_reg <= 1'b1; + end + else begin + if (PIPELINE) begin + if (increment_top_priority) begin + top_priority_reg <= (|request) ? {grant[NUM_REQUESTERS-2:0], + grant[NUM_REQUESTERS-1]} : top_priority_reg; + end + end else begin + if (increment_top_priority) begin + if (|request) + top_priority_reg <= { grant[NUM_REQUESTERS-2:0], + grant[NUM_REQUESTERS-1] }; + else + top_priority_reg <= { top_priority_reg[NUM_REQUESTERS-2:0], top_priority_reg[NUM_REQUESTERS-1] }; + end + else if (save_top_priority) begin + top_priority_reg <= grant; + end + end + end + end + +endmodule + +// ---------------------------------------------- +// Adder for the standard arbitrator +// ---------------------------------------------- +module altera_merlin_arb_adder +#( + parameter WIDTH = 8 +) +( + input [WIDTH-1:0] a, + input [WIDTH-1:0] b, + + output [WIDTH-1:0] sum +); + + wire [WIDTH:0] sum_lint; + // ---------------------------------------------- + // Benchmarks indicate that for small widths, the full + // adder has higher fmax because synthesis can merge + // it with the mux, allowing partial decisions to be + // made early. + // + // The magic number is 4 requesters, which means an + // 8 bit adder. + // ---------------------------------------------- + genvar i; + generate if (WIDTH <= 8) begin : full_adder + + wire cout[WIDTH-1:0]; + + assign sum[0] = (a[0] ^ b[0]); + assign cout[0] = (a[0] & b[0]); + + for (i = 1; i < WIDTH; i = i+1) begin : arb + + assign sum[i] = (a[i] ^ b[i]) ^ cout[i-1]; + assign cout[i] = (a[i] & b[i]) | (cout[i-1] & (a[i] ^ b[i])); + + end + + end else begin : carry_chain + + assign sum_lint = a + b; + assign sum = sum_lint[WIDTH-1:0]; + + end + endgenerate + +endmodule diff --git a/Top/niosII/synthesis/submodules/altera_merlin_burst_uncompressor.sv b/Top/niosII/synthesis/submodules/altera_merlin_burst_uncompressor.sv new file mode 100644 index 0000000..dfa5cac --- /dev/null +++ b/Top/niosII/synthesis/submodules/altera_merlin_burst_uncompressor.sv @@ -0,0 +1,296 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// (C) 2001-2012 Altera Corporation. All rights reserved. +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_slave_agent/altera_merlin_burst_uncompressor.sv#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------------ +// Merlin Burst Uncompressor +// +// Compressed read bursts -> uncompressed +// ------------------------------------------ + +`timescale 1 ns / 1 ns + +module altera_merlin_burst_uncompressor +#( + parameter ADDR_W = 16, + parameter BURSTWRAP_W = 3, + parameter BYTE_CNT_W = 4, + parameter PKT_SYMBOLS = 4, + parameter BURST_SIZE_W = 3 +) +( + input clk, + input reset, + + // sink ST signals + input sink_startofpacket, + input sink_endofpacket, + input sink_valid, + output sink_ready, + + // sink ST "data" + input [ADDR_W - 1: 0] sink_addr, + input [BURSTWRAP_W - 1 : 0] sink_burstwrap, + input [BYTE_CNT_W - 1 : 0] sink_byte_cnt, + input sink_is_compressed, + input [BURST_SIZE_W-1 : 0] sink_burstsize, + + // source ST signals + output source_startofpacket, + output source_endofpacket, + output source_valid, + input source_ready, + + // source ST "data" + output [ADDR_W - 1: 0] source_addr, + output [BURSTWRAP_W - 1 : 0] source_burstwrap, + output [BYTE_CNT_W - 1 : 0] source_byte_cnt, + + // Note: in the slave agent, the output should always be uncompressed. In + // other applications, it may be required to leave-compressed or not. How to + // control? Seems like a simple mux - pass-through if no uncompression is + // required. + output source_is_compressed, + output [BURST_SIZE_W-1 : 0] source_burstsize +); + +//---------------------------------------------------- +// AXSIZE decoding +// +// Turns the axsize value into the actual number of bytes +// being transferred. +// --------------------------------------------------- +function reg[63:0] bytes_in_transfer; + input [BURST_SIZE_W-1:0] axsize; + case (axsize) + 4'b0000: bytes_in_transfer = 64'b0000000000000000000000000000000000000000000000000000000000000001; + 4'b0001: bytes_in_transfer = 64'b0000000000000000000000000000000000000000000000000000000000000010; + 4'b0010: bytes_in_transfer = 64'b0000000000000000000000000000000000000000000000000000000000000100; + 4'b0011: bytes_in_transfer = 64'b0000000000000000000000000000000000000000000000000000000000001000; + 4'b0100: bytes_in_transfer = 64'b0000000000000000000000000000000000000000000000000000000000010000; + 4'b0101: bytes_in_transfer = 64'b0000000000000000000000000000000000000000000000000000000000100000; + 4'b0110: bytes_in_transfer = 64'b0000000000000000000000000000000000000000000000000000000001000000; + 4'b0111: bytes_in_transfer = 64'b0000000000000000000000000000000000000000000000000000000010000000; + 4'b1000: bytes_in_transfer = 64'b0000000000000000000000000000000000000000000000000000000100000000; + 4'b1001: bytes_in_transfer = 64'b0000000000000000000000000000000000000000000000000000001000000000; + default:bytes_in_transfer = 64'b0000000000000000000000000000000000000000000000000000000000000001; + endcase + +endfunction + + // num_symbols is PKT_SYMBOLS, appropriately sized. + wire [31:0] int_num_symbols = PKT_SYMBOLS; + wire [BYTE_CNT_W-1:0] num_symbols = int_num_symbols[BYTE_CNT_W-1:0]; + + // def: Burst Compression. In a merlin network, a compressed burst is one + // which is transmitted in a single beat. Example: read burst. In + // constrast, an uncompressed burst (example: write burst) is transmitted in + // one beat per writedata item. + // + // For compressed bursts which require response packets, burst + // uncompression is required. Concrete example: a read burst of size 8 + // occupies one response-fifo position. When that fifo position reaches the + // front of the FIFO, the slave starts providing the required 8 readdatavalid + // pulses. The 8 return response beats must be provided in a single packet, + // with incrementing address and decrementing byte_cnt fields. Upon receipt + // of the final readdata item of the burst, the response FIFO item is + // retired. + // Burst uncompression logic provides: + // a) 2-state FSM (idle, busy) + // reset to idle state + // transition to busy state for 2nd and subsequent rdv pulses + // - a single-cycle burst (aka non-burst read) causes no transition to + // busy state. + // b) response startofpacket/endofpacket logic. The response FIFO item + // will have sop asserted, and may have eop asserted. (In the case of + // multiple read bursts transmit in the command fabric in a single packet, + // the eop assertion will come in a later FIFO item.) To support packet + // conservation, and emit a well-formed packet on the response fabric, + // i) response fabric startofpacket is asserted only for the first resp. + // beat; + // ii) response fabric endofpacket is asserted only for the last resp. + // beat. + // c) response address field. The response address field contains an + // incrementing sequence, such that each readdata item is associated with + // its slave-map location. N.b. a) computing the address correctly requires + // knowledge of burstwrap behavior b) there may be no clients of the address + // field, which makes this field a good target for optimization. See + // burst_uncompress_address_counter below. + // d) response byte_cnt field. The response byte_cnt field contains a + // decrementing sequence, such that each beat of the response contains the + // count of bytes to follow. In the case of sub-bursts in a single packet, + // the byte_cnt field may decrement down to num_symbols, then back up to + // some value, multiple times in the packet. + + reg burst_uncompress_busy; + reg [BYTE_CNT_W:0] burst_uncompress_byte_counter; + wire [BYTE_CNT_W-1:0] burst_uncompress_byte_counter_lint; + wire first_packet_beat; + wire last_packet_beat; + + assign first_packet_beat = sink_valid & ~burst_uncompress_busy; + assign burst_uncompress_byte_counter_lint = burst_uncompress_byte_counter[BYTE_CNT_W-1:0]; + + // First cycle: burst_uncompress_byte_counter isn't ready yet, mux the input to + // the output. + assign source_byte_cnt = + first_packet_beat ? sink_byte_cnt : burst_uncompress_byte_counter_lint; + assign source_valid = sink_valid; + + // Last packet beat is set throughout receipt of an uncompressed read burst + // from the response FIFO - this forces all the burst uncompression machinery + // idle. + assign last_packet_beat = ~sink_is_compressed | + ( + burst_uncompress_busy ? + (sink_valid & (burst_uncompress_byte_counter_lint == num_symbols)) : + sink_valid & (sink_byte_cnt == num_symbols) + ); + + always @(posedge clk or posedge reset) begin + if (reset) begin + burst_uncompress_busy <= '0; + burst_uncompress_byte_counter <= '0; + end + else begin + if (source_valid & source_ready & sink_valid) begin + // No matter what the current state, last_packet_beat leads to + // idle. + if (last_packet_beat) begin + burst_uncompress_busy <= '0; + burst_uncompress_byte_counter <= '0; + end + else begin + if (burst_uncompress_busy) begin + burst_uncompress_byte_counter <= (burst_uncompress_byte_counter > 0) ? + (burst_uncompress_byte_counter_lint - num_symbols) : + (sink_byte_cnt - num_symbols); + end + else begin // not busy, at least one more beat to go + burst_uncompress_byte_counter <= sink_byte_cnt - num_symbols; + // To do: should busy go true for numsymbols-size compressed + // bursts? + burst_uncompress_busy <= 1'b1; + end + end + end + end + end + + reg [ADDR_W - 1 : 0 ] burst_uncompress_address_base; + reg [ADDR_W - 1 : 0] burst_uncompress_address_offset; + + wire [63:0] decoded_burstsize_wire; + wire [ADDR_W-1:0] decoded_burstsize; + + + localparam ADD_BURSTWRAP_W = (ADDR_W > BURSTWRAP_W) ? ADDR_W : BURSTWRAP_W; + wire [ADD_BURSTWRAP_W-1:0] addr_width_burstwrap; + // The input burstwrap value can be used as a mask against address values, + // but with one caveat: the address width may be (probably is) wider than + // the burstwrap width. The spec says: extend the msb of the burstwrap + // value out over the entire address width (but only if the address width + // actually is wider than the burstwrap width; otherwise it's a 0-width or + // negative range and concatenation multiplier). + generate + if (ADDR_W > BURSTWRAP_W) begin : addr_sign_extend + // Sign-extend, just wires: + assign addr_width_burstwrap[ADDR_W - 1 : BURSTWRAP_W] = + {(ADDR_W - BURSTWRAP_W) {sink_burstwrap[BURSTWRAP_W - 1]}}; + assign addr_width_burstwrap[BURSTWRAP_W-1:0] = sink_burstwrap [BURSTWRAP_W-1:0]; + end + else begin + assign addr_width_burstwrap[BURSTWRAP_W-1 : 0] = sink_burstwrap; + end + endgenerate + + always @(posedge clk or posedge reset) begin + if (reset) begin + burst_uncompress_address_base <= '0; + end + else if (first_packet_beat & source_ready) begin + burst_uncompress_address_base <= sink_addr & ~addr_width_burstwrap[ADDR_W-1:0]; + end + end + + assign decoded_burstsize_wire = bytes_in_transfer(sink_burstsize); //expand it to 64 bits + assign decoded_burstsize = decoded_burstsize_wire[ADDR_W-1:0]; //then take the width that is needed + + wire [ADDR_W : 0] p1_burst_uncompress_address_offset = + ( + (first_packet_beat ? + sink_addr : + burst_uncompress_address_offset) + decoded_burstsize + ) & + addr_width_burstwrap[ADDR_W-1:0]; + wire [ADDR_W-1:0] p1_burst_uncompress_address_offset_lint = p1_burst_uncompress_address_offset [ADDR_W-1:0]; + + always @(posedge clk or posedge reset) begin + if (reset) begin + burst_uncompress_address_offset <= '0; + end + else begin + if (source_ready & source_valid) begin + burst_uncompress_address_offset <= p1_burst_uncompress_address_offset_lint; + // if (first_packet_beat) begin + // burst_uncompress_address_offset <= + // (sink_addr + num_symbols) & addr_width_burstwrap; + // end + // else begin + // burst_uncompress_address_offset <= + // (burst_uncompress_address_offset + num_symbols) & addr_width_burstwrap; + // end + end + end + end + + // On the first packet beat, send the input address out unchanged, + // while values are computed/registered for 2nd and subsequent beats. + assign source_addr = first_packet_beat ? sink_addr : + burst_uncompress_address_base | burst_uncompress_address_offset; + assign source_burstwrap = sink_burstwrap; + assign source_burstsize = sink_burstsize; + + //------------------------------------------------------------------- + // A single (compressed) read burst will have sop/eop in the same beat. + // A sequence of read sub-bursts emitted by a burst adapter in response to a + // single read burst will have sop on the first sub-burst, eop on the last. + // Assert eop only upon (sink_endofpacket & last_packet_beat) to preserve + // packet conservation. + assign source_startofpacket = sink_startofpacket & ~burst_uncompress_busy; + assign source_endofpacket = sink_endofpacket & last_packet_beat; + assign sink_ready = source_valid & source_ready & last_packet_beat; + + // This is correct for the slave agent usage, but won't always be true in the + // width adapter. To do: add an "please uncompress" input, and use it to + // pass-through or modify, and set source_is_compressed accordingly. + assign source_is_compressed = 1'b0; +endmodule + diff --git a/Top/niosII/synthesis/submodules/altera_merlin_master_agent.sv b/Top/niosII/synthesis/submodules/altera_merlin_master_agent.sv new file mode 100644 index 0000000..4cbc92b --- /dev/null +++ b/Top/niosII/synthesis/submodules/altera_merlin_master_agent.sv @@ -0,0 +1,303 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_master_agent/altera_merlin_master_agent.sv#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// -------------------------------------- +// Merlin Master Agent +// +// Converts Avalon-MM transactions into +// Merlin network packets. +// -------------------------------------- + +`timescale 1 ns / 1 ns + +module altera_merlin_master_agent +#( + // ------------------- + // Packet Format Parameters + // ------------------- + parameter + PKT_QOS_H = 109, + PKT_QOS_L = 106, + PKT_DATA_SIDEBAND_H = 105, + PKT_DATA_SIDEBAND_L = 98, + PKT_ADDR_SIDEBAND_H = 97, + PKT_ADDR_SIDEBAND_L = 93, + PKT_CACHE_H = 92, + PKT_CACHE_L = 89, + PKT_THREAD_ID_H = 88, + PKT_THREAD_ID_L = 87, + PKT_BEGIN_BURST = 81, + PKT_PROTECTION_H = 80, + PKT_PROTECTION_L = 80, + PKT_BURSTWRAP_H = 79, + PKT_BURSTWRAP_L = 77, + PKT_BYTE_CNT_H = 76, + PKT_BYTE_CNT_L = 74, + PKT_ADDR_H = 73, + PKT_ADDR_L = 42, + PKT_BURST_SIZE_H = 86, + PKT_BURST_SIZE_L = 84, + PKT_BURST_TYPE_H = 94, + PKT_BURST_TYPE_L = 93, + PKT_TRANS_EXCLUSIVE = 83, + PKT_TRANS_LOCK = 82, + PKT_TRANS_COMPRESSED_READ = 41, + PKT_TRANS_POSTED = 40, + PKT_TRANS_WRITE = 39, + PKT_TRANS_READ = 38, + PKT_DATA_H = 37, + PKT_DATA_L = 6, + PKT_BYTEEN_H = 5, + PKT_BYTEEN_L = 2, + PKT_SRC_ID_H = 1, + PKT_SRC_ID_L = 1, + PKT_DEST_ID_H = 0, + PKT_DEST_ID_L = 0, + PKT_RESPONSE_STATUS_L = 110, + PKT_RESPONSE_STATUS_H = 111, + PKT_ORI_BURST_SIZE_L = 112, + PKT_ORI_BURST_SIZE_H = 114, + ST_DATA_W = 115, + ST_CHANNEL_W = 1, + + // ------------------- + // Agent Parameters + // ------------------- + AV_BURSTCOUNT_W = 3, + ID = 1, + SUPPRESS_0_BYTEEN_RSP = 1, + BURSTWRAP_VALUE = 4, + CACHE_VALUE = 0, + SECURE_ACCESS_BIT = 1, + USE_READRESPONSE = 0, + USE_WRITERESPONSE = 0, + + // ------------------- + // Derived Parameters + // ------------------- + PKT_BURSTWRAP_W = PKT_BURSTWRAP_H - PKT_BURSTWRAP_L + 1, + PKT_BYTE_CNT_W = PKT_BYTE_CNT_H - PKT_BYTE_CNT_L + 1, + PKT_PROTECTION_W = PKT_PROTECTION_H - PKT_PROTECTION_L + 1, + PKT_ADDR_W = PKT_ADDR_H - PKT_ADDR_L + 1, + PKT_DATA_W = PKT_DATA_H - PKT_DATA_L + 1, + PKT_BYTEEN_W = PKT_BYTEEN_H - PKT_BYTEEN_L + 1, + PKT_SRC_ID_W = PKT_SRC_ID_H - PKT_SRC_ID_L + 1, + PKT_DEST_ID_W = PKT_DEST_ID_H - PKT_DEST_ID_L + 1, + PKT_BURST_SIZE_W = PKT_BURST_SIZE_H - PKT_BURST_SIZE_L + 1 +) ( + // ------------------- + // Clock & Reset + // ------------------- + input clk, + input reset, + + // ------------------- + // Avalon-MM Anti-Master + // ------------------- + input [PKT_ADDR_W-1 : 0] av_address, + input av_write, + input av_read, + input [PKT_DATA_W-1 : 0] av_writedata, + output reg [PKT_DATA_W-1 : 0] av_readdata, + output reg av_waitrequest, + output reg av_readdatavalid, + input [PKT_BYTEEN_W-1 : 0] av_byteenable, + input [AV_BURSTCOUNT_W-1 : 0] av_burstcount, + input av_debugaccess, + input av_lock, + output reg [1 : 0] av_response, + output reg av_writeresponsevalid, + + // ------------------- + // Command Source + // ------------------- + output reg cp_valid, + output reg [ST_DATA_W-1 : 0] cp_data, + output wire cp_startofpacket, + output wire cp_endofpacket, + input cp_ready, + + // ------------------- + // Response Sink + // ------------------- + input rp_valid, + input [ST_DATA_W-1 : 0] rp_data, + input [ST_CHANNEL_W-1 : 0] rp_channel, + input rp_startofpacket, + input rp_endofpacket, + output reg rp_ready +); + // ------------------------------------------------------------ + // Utility Functions + // ------------------------------------------------------------ + function integer clogb2; + input [31 : 0] value; + begin + for (clogb2 = 0; value > 0; clogb2 = clogb2 + 1) + value = value >> 1; + clogb2 = clogb2 - 1; + end + endfunction // clogb2 + + localparam MAX_BURST = 1 << (AV_BURSTCOUNT_W - 1); + localparam NUMSYMBOLS = PKT_BYTEEN_W; + localparam BURSTING = (MAX_BURST > NUMSYMBOLS); + localparam BITS_TO_ZERO = clogb2(NUMSYMBOLS); + localparam BURST_SIZE = clogb2(NUMSYMBOLS); + + typedef enum bit [1 : 0] + { + FIXED = 2'b00, + INCR = 2'b01, + WRAP = 2'b10, + OTHER_WRAP = 2'b11 + } MerlinBurstType; + + // -------------------------------------- + // Potential optimization: compare in words to save bits? + // -------------------------------------- + wire is_burst; + assign is_burst = (BURSTING) & (av_burstcount > NUMSYMBOLS); + + wire [31 : 0] burstwrap_value_int = BURSTWRAP_VALUE; + wire [31 : 0] id_int = ID; + wire [PKT_BURST_SIZE_W-1 : 0] burstsize_sig = BURST_SIZE[PKT_BURST_SIZE_W-1 : 0]; + wire [1 : 0] bursttype_value = burstwrap_value_int[PKT_BURSTWRAP_W-1] ? INCR : WRAP; + + // -------------------------------------- + // Address alignment + // + // The packet format requires that addresses be aligned to + // the transaction size. + // -------------------------------------- + wire [PKT_ADDR_W-1 : 0] av_address_aligned; + generate + if (NUMSYMBOLS > 1) begin + assign av_address_aligned = + {av_address[PKT_ADDR_W-1 : BITS_TO_ZERO], {BITS_TO_ZERO {1'b0}}}; + end + else begin + assign av_address_aligned = av_address; + end + endgenerate + + // -------------------------------------- + // Command & Response Construction + // -------------------------------------- + always_comb begin + cp_data = '0; + + cp_data[PKT_PROTECTION_L] = av_debugaccess; + cp_data[PKT_PROTECTION_L+1] = SECURE_ACCESS_BIT[0]; // secure cache bit + cp_data[PKT_PROTECTION_L+2] = 1'b0; // instruction/data cache bit + cp_data[PKT_BURSTWRAP_H : PKT_BURSTWRAP_L] = burstwrap_value_int[PKT_BURSTWRAP_W-1 : 0]; + cp_data[PKT_BYTE_CNT_H : PKT_BYTE_CNT_L] = av_burstcount; + cp_data[PKT_ADDR_H : PKT_ADDR_L] = av_address_aligned; + cp_data[PKT_TRANS_EXCLUSIVE] = 1'b0; + cp_data[PKT_TRANS_LOCK] = av_lock; + cp_data[PKT_TRANS_COMPRESSED_READ] = av_read & is_burst; + cp_data[PKT_TRANS_READ] = av_read; + cp_data[PKT_TRANS_WRITE] = av_write; + cp_data[PKT_TRANS_POSTED] = av_write & !USE_WRITERESPONSE; + cp_data[PKT_DATA_H : PKT_DATA_L] = av_writedata; + cp_data[PKT_BYTEEN_H : PKT_BYTEEN_L] = av_byteenable; + cp_data[PKT_BURST_SIZE_H : PKT_BURST_SIZE_L] = burstsize_sig; + cp_data[PKT_ORI_BURST_SIZE_H : PKT_ORI_BURST_SIZE_L] = burstsize_sig; + cp_data[PKT_BURST_TYPE_H : PKT_BURST_TYPE_L] = bursttype_value; + cp_data[PKT_SRC_ID_H : PKT_SRC_ID_L] = id_int[PKT_SRC_ID_W-1 : 0]; + cp_data[PKT_THREAD_ID_H : PKT_THREAD_ID_L] = '0; + cp_data[PKT_CACHE_H : PKT_CACHE_L] = CACHE_VALUE[3 : 0]; + cp_data[PKT_QOS_H : PKT_QOS_L] = '0; + cp_data[PKT_ADDR_SIDEBAND_H : PKT_ADDR_SIDEBAND_L] = '0; + cp_data[PKT_DATA_SIDEBAND_H : PKT_DATA_SIDEBAND_L] = '0; + + av_readdata = rp_data[PKT_DATA_H : PKT_DATA_L]; + if (USE_WRITERESPONSE || USE_READRESPONSE) + av_response = rp_data[PKT_RESPONSE_STATUS_H : PKT_RESPONSE_STATUS_L]; + else + av_response = '0; + end + + // -------------------------------------- + // Command Control + // -------------------------------------- + reg hold_waitrequest; + + always @ (posedge clk, posedge reset) begin + if (reset) + hold_waitrequest <= 1'b1; + else + hold_waitrequest <= 1'b0; + end + + always_comb begin + cp_valid = 0; + + if ((av_write || av_read) && ~hold_waitrequest) + cp_valid = 1; + end + + generate if (BURSTING) begin + reg sop_enable; + + always @(posedge clk, posedge reset) begin + if (reset) begin + sop_enable <= 1'b1; + end + else begin + if (cp_valid && cp_ready) begin + sop_enable <= 1'b0; + if (cp_endofpacket) + sop_enable <= 1'b1; + end + end + end + + assign cp_startofpacket = sop_enable; + assign cp_endofpacket = (av_read) | (av_burstcount == NUMSYMBOLS); + + end + else begin + + assign cp_startofpacket = 1'b1; + assign cp_endofpacket = 1'b1; + + end + endgenerate + + // -------------------------------------- + // Backpressure & Readdatavalid + // -------------------------------------- + always_comb begin + rp_ready = 1; + av_readdatavalid = 0; + av_writeresponsevalid = 0; + av_waitrequest = hold_waitrequest | !cp_ready; + + if (USE_WRITERESPONSE && (rp_data[PKT_TRANS_WRITE] == 1)) + av_writeresponsevalid = rp_valid; + else + av_readdatavalid = rp_valid; + + if (SUPPRESS_0_BYTEEN_RSP) begin + if (rp_data[PKT_BYTEEN_H : PKT_BYTEEN_L] == 0) + av_readdatavalid = 0; + end + end + +endmodule diff --git a/Top/niosII/synthesis/submodules/altera_merlin_master_translator.sv b/Top/niosII/synthesis/submodules/altera_merlin_master_translator.sv new file mode 100644 index 0000000..9bc1226 --- /dev/null +++ b/Top/niosII/synthesis/submodules/altera_merlin_master_translator.sv @@ -0,0 +1,556 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_master_translator/altera_merlin_master_translator.sv#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// -------------------------------------- +// Merlin Master Translator +// +// Converts an Avalon-MM master interface into an +// Avalon-MM "universal" master interface. +// +// The universal interface is defined as the superset of ports +// and parameters that can represent any legal Avalon +// interface. +// -------------------------------------- + +`timescale 1 ns / 1 ns + +module altera_merlin_master_translator #( + parameter + // widths + AV_ADDRESS_W = 32, + AV_DATA_W = 32, + AV_BURSTCOUNT_W = 4, + AV_BYTEENABLE_W = 4, + + UAV_ADDRESS_W = 38, + UAV_BURSTCOUNT_W = 10, + + // optional ports + USE_BURSTCOUNT = 1, + USE_BEGINBURSTTRANSFER = 0, + USE_BEGINTRANSFER = 0, + USE_CHIPSELECT = 0, + USE_READ = 1, + USE_READDATAVALID = 1, + USE_WRITE = 1, + USE_WAITREQUEST = 1, + USE_WRITERESPONSE = 0, + USE_READRESPONSE = 0, + + AV_REGISTERINCOMINGSIGNALS = 0, + AV_SYMBOLS_PER_WORD = 4, + AV_ADDRESS_SYMBOLS = 0, + // must be enabled for a bursting master + AV_CONSTANT_BURST_BEHAVIOR = 1, + UAV_CONSTANT_BURST_BEHAVIOR = 0, + AV_BURSTCOUNT_SYMBOLS = 0, + AV_LINEWRAPBURSTS = 0 +)( + input wire clk, + input wire reset, + + // Universal Avalon Master + output reg uav_write, + output reg uav_read, + output reg [UAV_ADDRESS_W -1 : 0] uav_address, + output reg [UAV_BURSTCOUNT_W -1 : 0] uav_burstcount, + output wire [AV_BYTEENABLE_W -1 : 0] uav_byteenable, + output wire [AV_DATA_W -1 : 0] uav_writedata, + output wire uav_lock, + output wire uav_debugaccess, + output wire uav_clken, + + input wire [AV_DATA_W -1 : 0] uav_readdata, + input wire uav_readdatavalid, + input wire uav_waitrequest, + input wire [1 : 0] uav_response, + input wire uav_writeresponsevalid, + + // Avalon-MM Anti-master (slave) + input reg av_write, + input reg av_read, + input wire [AV_ADDRESS_W -1 : 0] av_address, + input wire [AV_BYTEENABLE_W -1 : 0] av_byteenable, + input wire [AV_BURSTCOUNT_W -1 : 0] av_burstcount, + input wire [AV_DATA_W -1 : 0] av_writedata, + input wire av_begintransfer, + input wire av_beginbursttransfer, + input wire av_lock, + input wire av_chipselect, + input wire av_debugaccess, + input wire av_clken, + + output wire [AV_DATA_W -1 : 0] av_readdata, + output wire av_readdatavalid, + output reg av_waitrequest, + output reg [1 : 0] av_response, + output reg av_writeresponsevalid +); + + localparam BITS_PER_WORD = clog2(AV_SYMBOLS_PER_WORD); + localparam AV_MAX_SYMBOL_BURST = flog2(pow2(AV_BURSTCOUNT_W - 1) * (AV_BURSTCOUNT_SYMBOLS ? 1 : AV_SYMBOLS_PER_WORD)); + localparam AV_MAX_SYMBOL_BURST_MINUS_ONE = AV_MAX_SYMBOL_BURST ? AV_MAX_SYMBOL_BURST - 1 : 0; + localparam UAV_BURSTCOUNT_H_OR_31 = (UAV_BURSTCOUNT_W > 32) ? 31 : UAV_BURSTCOUNT_W - 1; + localparam UAV_ADDRESS_H_OR_31 = (UAV_ADDRESS_W > 32) ? 31 : UAV_ADDRESS_W - 1; + + localparam BITS_PER_WORD_BURSTCOUNT = (UAV_BURSTCOUNT_W == 1) ? 0 : BITS_PER_WORD; + localparam BITS_PER_WORD_ADDRESS = (UAV_ADDRESS_W == 1) ? 0 : BITS_PER_WORD; + + localparam ADDRESS_LOW = AV_ADDRESS_SYMBOLS ? 0 : BITS_PER_WORD_ADDRESS; + localparam BURSTCOUNT_LOW = AV_BURSTCOUNT_SYMBOLS ? 0 : BITS_PER_WORD_BURSTCOUNT; + + localparam ADDRESS_HIGH = (UAV_ADDRESS_W > AV_ADDRESS_W + ADDRESS_LOW) ? AV_ADDRESS_W : (UAV_ADDRESS_W - ADDRESS_LOW); + localparam BURSTCOUNT_HIGH = (UAV_BURSTCOUNT_W > AV_BURSTCOUNT_W + BURSTCOUNT_LOW) ? AV_BURSTCOUNT_W : (UAV_BURSTCOUNT_W - BURSTCOUNT_LOW); + + function integer flog2; + input [31:0] depth; + integer i; + begin + i = depth; + if ( i <= 0 ) flog2 = 0; + else begin + for (flog2 = -1; i > 0; flog2 = flog2 + 1) + i = i >> 1; + end + end + endfunction // flog2 + + // ------------------------------------------------------------ + // Calculates the ceil(log2()) of the input val. + // + // Limited to a positive 32-bit input value. + // ------------------------------------------------------------ + function integer clog2; + input[31:0] val; + reg[31:0] i; + + begin + i = 1; + clog2 = 0; + + while (i < val) begin + clog2 = clog2 + 1; + i = i[30:0] << 1; + end + end + endfunction + + function integer pow2; + input [31:0] toShift; + begin + pow2 = 1; + pow2 = pow2 << toShift; + end + endfunction // pow2 + + // ------------------------------------------------- + // Assign some constants to appropriately-sized signals to + // avoid synthesis warnings. This also helps some simulators + // with their inferred sensitivity lists. + // + // The symbols per word calculation here rounds non-power of two + // symbols to the next highest power of two, which is what we want + // when calculating the decrementing byte count. + // ------------------------------------------------- + wire [31 : 0] symbols_per_word_int = 2**(clog2(AV_SYMBOLS_PER_WORD[UAV_BURSTCOUNT_H_OR_31 : 0])); + wire [UAV_BURSTCOUNT_H_OR_31 : 0] symbols_per_word = symbols_per_word_int[UAV_BURSTCOUNT_H_OR_31 : 0]; + + reg internal_beginbursttransfer; + reg internal_begintransfer; + reg [UAV_ADDRESS_W -1 : 0] uav_address_pre; + reg [UAV_BURSTCOUNT_W -1 : 0] uav_burstcount_pre; + + reg uav_read_pre; + reg uav_write_pre; + reg read_accepted; + + // ------------------------------------------------- + // Pass through signals that we don't touch + // ------------------------------------------------- + assign uav_writedata = av_writedata; + assign uav_byteenable = av_byteenable; + assign uav_lock = av_lock; + assign uav_debugaccess = av_debugaccess; + assign uav_clken = av_clken; + + assign av_readdata = uav_readdata; + assign av_readdatavalid = uav_readdatavalid; + + // ------------------------------------------------- + // Response signals + // ------------------------------------------------- + always_comb begin + if (!USE_READRESPONSE && !USE_WRITERESPONSE) + av_response = '0; + else + av_response = uav_response; + + if (USE_WRITERESPONSE) begin + av_writeresponsevalid = uav_writeresponsevalid; + end else begin + av_writeresponsevalid = '0; + end + end + + // ------------------------------------------------- + // Convert byte and word addresses into byte addresses + // ------------------------------------------------- + always_comb begin + uav_address_pre = {UAV_ADDRESS_W{1'b0}}; + + if (AV_ADDRESS_SYMBOLS) + uav_address_pre[(ADDRESS_HIGH ? ADDRESS_HIGH - 1 : 0) : 0] = av_address[(ADDRESS_HIGH ? ADDRESS_HIGH - 1 : 0) : 0]; + else begin + uav_address_pre[ADDRESS_LOW + ADDRESS_HIGH - 1 : ADDRESS_LOW] = av_address[(ADDRESS_HIGH ? ADDRESS_HIGH - 1 : 0) : 0]; + end + end + + // ------------------------------------------------- + // Convert burstcount into symbol units + // ------------------------------------------------- + always_comb begin + uav_burstcount_pre = symbols_per_word; // default to a single transfer + + if (USE_BURSTCOUNT) begin + uav_burstcount_pre = {UAV_BURSTCOUNT_W{1'b0}}; + if (AV_BURSTCOUNT_SYMBOLS) + uav_burstcount_pre[(BURSTCOUNT_HIGH ? BURSTCOUNT_HIGH - 1 : 0) :0] = av_burstcount[(BURSTCOUNT_HIGH ? BURSTCOUNT_HIGH - 1 : 0) : 0]; + else begin + uav_burstcount_pre[UAV_BURSTCOUNT_W - 1 : BURSTCOUNT_LOW] = av_burstcount[(BURSTCOUNT_HIGH ? BURSTCOUNT_HIGH - 1 : 0) : 0]; + end + end + end + + // ------------------------------------------------- + // This is where we perform the per-transfer address and burstcount + // calculations that are required by downstream modules. + // ------------------------------------------------- + reg [UAV_ADDRESS_W -1 : 0] address_register; + wire [UAV_BURSTCOUNT_W -1 : 0] burstcount_register; + reg [UAV_BURSTCOUNT_W : 0] burstcount_register_lint; + + assign burstcount_register = burstcount_register_lint[UAV_BURSTCOUNT_W -1 : 0]; + + always_comb begin + uav_address = uav_address_pre; + uav_burstcount = uav_burstcount_pre; + + if (AV_CONSTANT_BURST_BEHAVIOR && !UAV_CONSTANT_BURST_BEHAVIOR && ~internal_beginbursttransfer) begin + uav_address = address_register; + uav_burstcount = burstcount_register; + end + end + + reg first_burst_stalled; + reg burst_stalled; + + wire [UAV_ADDRESS_W -1 : 0] combi_burst_addr_reg; + wire [UAV_ADDRESS_W -1 : 0] combi_addr_reg; + + generate + if (AV_LINEWRAPBURSTS && AV_MAX_SYMBOL_BURST != 0) begin + if (AV_MAX_SYMBOL_BURST > UAV_ADDRESS_W - 1) begin + assign combi_burst_addr_reg = { uav_address_pre[UAV_ADDRESS_W-1:0] + AV_SYMBOLS_PER_WORD[UAV_ADDRESS_W-1:0] }; + assign combi_addr_reg = { address_register[UAV_ADDRESS_W-1:0] + AV_SYMBOLS_PER_WORD[UAV_ADDRESS_W-1:0] }; + end + else begin + assign combi_burst_addr_reg = { uav_address_pre[UAV_ADDRESS_W - 1 : AV_MAX_SYMBOL_BURST], uav_address_pre[AV_MAX_SYMBOL_BURST_MINUS_ONE:0] + AV_SYMBOLS_PER_WORD[AV_MAX_SYMBOL_BURST_MINUS_ONE:0] }; + assign combi_addr_reg = { address_register[UAV_ADDRESS_W - 1 : AV_MAX_SYMBOL_BURST], address_register[AV_MAX_SYMBOL_BURST_MINUS_ONE:0] + AV_SYMBOLS_PER_WORD[AV_MAX_SYMBOL_BURST_MINUS_ONE:0] }; + end + end + else begin + assign combi_burst_addr_reg = uav_address_pre + AV_SYMBOLS_PER_WORD[UAV_ADDRESS_H_OR_31:0]; + assign combi_addr_reg = address_register + AV_SYMBOLS_PER_WORD[UAV_ADDRESS_H_OR_31:0]; + end + endgenerate + + always @(posedge clk, posedge reset) begin + if (reset) begin + address_register <= '0; + burstcount_register_lint <= '0; + end else begin + address_register <= address_register; + burstcount_register_lint <= burstcount_register_lint; + + if (internal_beginbursttransfer || first_burst_stalled) begin + if (av_waitrequest) begin + address_register <= uav_address_pre; + burstcount_register_lint[UAV_BURSTCOUNT_W - 1 : 0] <= uav_burstcount_pre; + end else begin + address_register <= combi_burst_addr_reg; + burstcount_register_lint <= uav_burstcount_pre - symbols_per_word; + end + end else if (internal_begintransfer || burst_stalled) begin + if (~av_waitrequest) begin + address_register <= combi_addr_reg; + burstcount_register_lint <= burstcount_register - symbols_per_word; + end + end + end + end + + always @(posedge clk, posedge reset) begin + if (reset) begin + first_burst_stalled <= 1'b0; + burst_stalled <= 1'b0; + end else begin + if (internal_beginbursttransfer || first_burst_stalled) begin + if (av_waitrequest) begin + first_burst_stalled <= 1'b1; + end else begin + first_burst_stalled <= 1'b0; + end + end else if (internal_begintransfer || burst_stalled) begin + if (~av_waitrequest) begin + burst_stalled <= 1'b0; + end else begin + burst_stalled <= 1'b1; + end + end + end + end + + // ------------------------------------------------- + // Waitrequest translation + // ------------------------------------------------- + always @(posedge clk, posedge reset) begin + if (reset) + read_accepted <= 1'b0; + else begin + read_accepted <= read_accepted; + if (read_accepted == 0) + read_accepted <= av_waitrequest ? uav_read_pre & ~uav_waitrequest : 1'b0; + else if (read_accepted == 1 && uav_readdatavalid == 1) // reset acceptance only when rdv arrives + read_accepted <= 1'b0; + end + + end + + reg write_accepted = 0; + generate if (AV_REGISTERINCOMINGSIGNALS) begin + always @(posedge clk, posedge reset) begin + if (reset) + write_accepted <= 1'b0; + else begin + write_accepted <= + ~av_waitrequest ? 1'b0 : + uav_write & ~uav_waitrequest? 1'b1 : + write_accepted; + end + end + end endgenerate + + always_comb begin + av_waitrequest = uav_waitrequest; + + if (USE_READDATAVALID == 0) begin + av_waitrequest = uav_read_pre ? ~uav_readdatavalid : uav_waitrequest; + end + + if (AV_REGISTERINCOMINGSIGNALS) begin + av_waitrequest = + uav_read_pre ? ~uav_readdatavalid : + uav_write_pre ? (internal_begintransfer | uav_waitrequest) & ~write_accepted : + 1'b1; + end + + if (USE_WAITREQUEST == 0) begin + av_waitrequest = 0; + end + end + + // ------------------------------------------------- + // Determine the output read and write signals from + // the read/write/chipselect input signals. + // ------------------------------------------------- + always_comb begin + uav_write = 1'b0; + uav_write_pre = 1'b0; + uav_read = 1'b0; + uav_read_pre = 1'b0; + + if (!USE_CHIPSELECT) begin + if (USE_READ) begin + uav_read_pre = av_read; + end + + if (USE_WRITE) begin + uav_write_pre = av_write; + end + end else begin + if (!USE_WRITE && USE_READ) begin + uav_write_pre = av_chipselect & ~av_read; + uav_read_pre = av_read; + end else if (!USE_READ && USE_WRITE) begin + uav_write_pre = av_write; + uav_read_pre = av_chipselect & ~av_write; + end else if (USE_READ && USE_WRITE) begin + uav_write_pre = av_write; + uav_read_pre = av_read; + end + end + + if (USE_READDATAVALID == 0) + uav_read = uav_read_pre & ~read_accepted; + else + uav_read = uav_read_pre; + + if (AV_REGISTERINCOMINGSIGNALS == 0) + uav_write = uav_write_pre; + else + uav_write = uav_write_pre & ~write_accepted; + end + + // ------------------------------------------------- + // Begintransfer assignment + // ------------------------------------------------- + reg end_begintransfer; + + always_comb begin + if (USE_BEGINTRANSFER) begin + internal_begintransfer = av_begintransfer; + end else begin + internal_begintransfer = ( uav_write | uav_read ) & ~end_begintransfer; + end + end + + always @(posedge clk or posedge reset) begin + if (reset) begin + end_begintransfer <= 1'b0; + end else begin + if (internal_begintransfer == 1 && uav_waitrequest) + end_begintransfer <= 1'b1; + else if (uav_waitrequest) + end_begintransfer <= end_begintransfer; + else + end_begintransfer <= 1'b0; + end + end + + // ------------------------------------------------- + // Beginbursttransfer assignment + // ------------------------------------------------- + reg end_beginbursttransfer; + wire last_burst_transfer_pre; + wire last_burst_transfer_reg; + wire last_burst_transfer; + + // compare values before the mux to shorten critical path; benchmark before changing + assign last_burst_transfer_pre = (uav_burstcount_pre == symbols_per_word); + assign last_burst_transfer_reg = (burstcount_register == symbols_per_word); + assign last_burst_transfer = (internal_beginbursttransfer) ? last_burst_transfer_pre : last_burst_transfer_reg; + + always_comb begin + if (USE_BEGINBURSTTRANSFER) begin + internal_beginbursttransfer = av_beginbursttransfer; + end else begin + internal_beginbursttransfer = uav_read ? internal_begintransfer : internal_begintransfer && ~end_beginbursttransfer; + end + end + + always @(posedge clk or posedge reset) begin + if (reset) begin + end_beginbursttransfer <= 1'b0; + end else begin + end_beginbursttransfer <= end_beginbursttransfer; + if (last_burst_transfer && internal_begintransfer || uav_read) begin + end_beginbursttransfer <= 1'b0; + end + else if (uav_write && internal_begintransfer) begin + end_beginbursttransfer <= 1'b1; + end + end + end + + // synthesis translate_off + + // ------------------------------------------------ + // check_1 : for waitrequest signal violation + // Ensure that when waitreqeust is asserted, the master is not allowed to change its controls + // Exception : begintransfer / beginbursttransfer + // : previously not in any transaction (idle) + // Note : Not checking clken which is not exactly part of Avalon controls/inputs + // : Not using system verilog assertions (seq/prop) since it is not supported if using Modelsim_SE + // ------------------------------------------------ + + reg av_waitrequest_r; + reg av_write_r, av_read_r, av_lock_r, av_chipselect_r, av_debugaccess_r; + reg [AV_ADDRESS_W-1:0] av_address_r; + reg [AV_BYTEENABLE_W-1:0] av_byteenable_r; + reg [AV_BURSTCOUNT_W-1:0] av_burstcount_r; + reg [AV_DATA_W-1:0] av_writedata_r; + + always @(posedge clk or posedge reset) begin + if (reset) begin + av_waitrequest_r <= '0; + av_write_r <= '0; + av_read_r <= '0; + av_lock_r <= '0; + av_chipselect_r <= '0; + av_debugaccess_r <= '0; + av_address_r <= '0; + av_byteenable_r <= '0; + av_burstcount_r <= '0; + av_writedata_r <= '0; + end else begin + av_waitrequest_r <= av_waitrequest; + av_write_r <= av_write; + av_read_r <= av_read; + av_lock_r <= av_lock; + av_chipselect_r <= av_chipselect; + av_debugaccess_r <= av_debugaccess; + av_address_r <= av_address; + av_byteenable_r <= av_byteenable; + av_burstcount_r <= av_burstcount; + av_writedata_r <= av_writedata; + + if ( + av_waitrequest_r && // When waitrequest is asserted + ( + (av_write != av_write_r) || // Checks that : Input controls/data does not change + (av_read != av_read_r) || + (av_lock != av_lock_r) || + (av_debugaccess != av_debugaccess_r) || + (av_address != av_address_r) || + (av_byteenable != av_byteenable_r) || + (av_burstcount != av_burstcount_r) + ) && + (av_write_r | av_read_r) && // Check only when : previously initiated a write/read + (!USE_CHIPSELECT | av_chipselect_r) // and chipselect was asserted (or unused) + ) begin + $display( "%t: %m: Error: Input controls/data changed while av_waitrequest is asserted.", $time()); + $display("av_address %x --> %x", av_address_r , av_address ); + $display("av_byteenable %x --> %x", av_byteenable_r , av_byteenable ); + $display("av_burstcount %x --> %x", av_burstcount_r , av_burstcount ); + $display("av_writedata %x --> %x", av_writedata_r , av_writedata ); + $display("av_write %x --> %x", av_write_r , av_write ); + $display("av_read %x --> %x", av_read_r , av_read ); + $display("av_lock %x --> %x", av_lock_r , av_lock ); + $display("av_chipselect %x --> %x", av_chipselect_r , av_chipselect ); + $display("av_debugaccess %x --> %x", av_debugaccess_r , av_debugaccess ); + end + end + + // end check_1 + + end + + // synthesis translate_on + + +endmodule diff --git a/Top/niosII/synthesis/submodules/altera_merlin_slave_agent.sv b/Top/niosII/synthesis/submodules/altera_merlin_slave_agent.sv new file mode 100644 index 0000000..48bb1b4 --- /dev/null +++ b/Top/niosII/synthesis/submodules/altera_merlin_slave_agent.sv @@ -0,0 +1,622 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// (C) 2001-2011 Altera Corporation. All rights reserved. +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent.sv#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +`timescale 1 ns / 1 ns + +module altera_merlin_slave_agent +#( + // Packet parameters + parameter PKT_BEGIN_BURST = 81, + parameter PKT_DATA_H = 31, + parameter PKT_DATA_L = 0, + parameter PKT_SYMBOL_W = 8, + parameter PKT_BYTEEN_H = 71, + parameter PKT_BYTEEN_L = 68, + parameter PKT_ADDR_H = 63, + parameter PKT_ADDR_L = 32, + parameter PKT_TRANS_LOCK = 87, + parameter PKT_TRANS_COMPRESSED_READ = 67, + parameter PKT_TRANS_POSTED = 66, + parameter PKT_TRANS_WRITE = 65, + parameter PKT_TRANS_READ = 64, + parameter PKT_SRC_ID_H = 74, + parameter PKT_SRC_ID_L = 72, + parameter PKT_DEST_ID_H = 77, + parameter PKT_DEST_ID_L = 75, + parameter PKT_BURSTWRAP_H = 85, + parameter PKT_BURSTWRAP_L = 82, + parameter PKT_BYTE_CNT_H = 81, + parameter PKT_BYTE_CNT_L = 78, + parameter PKT_PROTECTION_H = 86, + parameter PKT_PROTECTION_L = 86, + parameter PKT_RESPONSE_STATUS_H = 89, + parameter PKT_RESPONSE_STATUS_L = 88, + parameter PKT_BURST_SIZE_H = 92, + parameter PKT_BURST_SIZE_L = 90, + parameter PKT_ORI_BURST_SIZE_L = 93, + parameter PKT_ORI_BURST_SIZE_H = 95, + parameter ST_DATA_W = 96, + parameter ST_CHANNEL_W = 32, + + // Slave parameters + parameter ADDR_W = PKT_ADDR_H - PKT_ADDR_L + 1, + parameter AVS_DATA_W = PKT_DATA_H - PKT_DATA_L + 1, + parameter AVS_BURSTCOUNT_W = 4, + parameter PKT_SYMBOLS = AVS_DATA_W / PKT_SYMBOL_W, + + // Slave agent parameters + parameter PREVENT_FIFO_OVERFLOW = 0, + parameter SUPPRESS_0_BYTEEN_CMD = 1, + parameter USE_READRESPONSE = 0, + parameter USE_WRITERESPONSE = 0, + + // Derived slave parameters + parameter AVS_BE_W = PKT_BYTEEN_H - PKT_BYTEEN_L + 1, + parameter BURST_SIZE_W = 3, + + // Derived FIFO width + parameter FIFO_DATA_W = ST_DATA_W + 1, + + // ECC parameter + parameter ECC_ENABLE = 0 +) ( + input clk, + input reset, + + // Universal-Avalon anti-slave + output [ADDR_W-1:0] m0_address, + output [AVS_BURSTCOUNT_W-1:0] m0_burstcount, + output [AVS_BE_W-1:0] m0_byteenable, + output m0_read, + input [AVS_DATA_W-1:0] m0_readdata, + input m0_waitrequest, + output m0_write, + output [AVS_DATA_W-1:0] m0_writedata, + input m0_readdatavalid, + output m0_debugaccess, + output m0_lock, + input [1:0] m0_response, + input m0_writeresponsevalid, + + // Avalon-ST FIFO interfaces. + // Note: there's no need to include the "data" field here, at least for + // reads, since readdata is filled in from slave info. To keep life + // simple, have a data field, but fill it with 0s. + // Av-st response fifo source interface + output reg [FIFO_DATA_W-1:0] rf_source_data, + output rf_source_valid, + output rf_source_startofpacket, + output rf_source_endofpacket, + input rf_source_ready, + + // Av-st response fifo sink interface + input [FIFO_DATA_W-1:0] rf_sink_data, + input rf_sink_valid, + input rf_sink_startofpacket, + input rf_sink_endofpacket, + output rf_sink_ready, + + // Av-st readdata fifo src interface, data and response + // extra 2 bits for storing RESPONSE STATUS + output [AVS_DATA_W+1:0] rdata_fifo_src_data, + output rdata_fifo_src_valid, + input rdata_fifo_src_ready, + + // Av-st readdata fifo sink interface + input [AVS_DATA_W+1:0] rdata_fifo_sink_data, + input rdata_fifo_sink_valid, + output rdata_fifo_sink_ready, + input rdata_fifo_sink_error, + + // Av-st sink command packet interface + output cp_ready, + input cp_valid, + input [ST_DATA_W-1:0] cp_data, + input [ST_CHANNEL_W-1:0] cp_channel, + input cp_startofpacket, + input cp_endofpacket, + + // Av-st source response packet interface + input rp_ready, + output reg rp_valid, + output reg [ST_DATA_W-1:0] rp_data, + output rp_startofpacket, + output rp_endofpacket +); + + // -------------------------------------------------- + // Ceil(log2()) function log2ceil of 4 = 2 + // -------------------------------------------------- + function integer log2ceil; + input reg[63:0] val; + reg [63:0] i; + + begin + i = 1; + log2ceil = 0; + + while (i < val) begin + log2ceil = log2ceil + 1; + i = i << 1; + end + end + endfunction + + // ------------------------------------------------ + // Local Parameters + // ------------------------------------------------ + localparam DATA_W = PKT_DATA_H - PKT_DATA_L + 1; + localparam BE_W = PKT_BYTEEN_H - PKT_BYTEEN_L + 1; + localparam MID_W = PKT_SRC_ID_H - PKT_SRC_ID_L + 1; + localparam SID_W = PKT_DEST_ID_H - PKT_DEST_ID_L + 1; + localparam BYTE_CNT_W = PKT_BYTE_CNT_H - PKT_BYTE_CNT_L + 1; + localparam BURSTWRAP_W = PKT_BURSTWRAP_H - PKT_BURSTWRAP_L + 1; + localparam BURSTSIZE_W = PKT_BURST_SIZE_H - PKT_BURST_SIZE_L + 1; + localparam BITS_TO_MASK = log2ceil(PKT_SYMBOLS); + localparam MAX_BURST = 1 << (AVS_BURSTCOUNT_W - 1); + localparam BURSTING = (MAX_BURST > PKT_SYMBOLS); + + // ------------------------------------------------ + // Signals + // ------------------------------------------------ + wire [DATA_W-1:0] cmd_data; + wire [BE_W-1:0] cmd_byteen; + wire [ADDR_W-1:0] cmd_addr; + wire [MID_W-1:0] cmd_mid; + wire [SID_W-1:0] cmd_sid; + wire cmd_read; + wire cmd_write; + wire cmd_compressed; + wire cmd_posted; + wire [BYTE_CNT_W-1:0] cmd_byte_cnt; + wire [BURSTWRAP_W-1:0] cmd_burstwrap; + wire [BURSTSIZE_W-1:0] cmd_burstsize; + wire cmd_debugaccess; + + wire suppress_cmd; + wire byteen_asserted; + wire suppress_read; + wire suppress_write; + wire needs_response_synthesis; + wire generate_response; + + // Assign command fields + assign cmd_data = cp_data[PKT_DATA_H :PKT_DATA_L ]; + assign cmd_byteen = cp_data[PKT_BYTEEN_H:PKT_BYTEEN_L]; + assign cmd_addr = cp_data[PKT_ADDR_H :PKT_ADDR_L ]; + assign cmd_compressed = cp_data[PKT_TRANS_COMPRESSED_READ]; + assign cmd_posted = cp_data[PKT_TRANS_POSTED]; + assign cmd_write = cp_data[PKT_TRANS_WRITE]; + assign cmd_read = cp_data[PKT_TRANS_READ]; + assign cmd_mid = cp_data[PKT_SRC_ID_H :PKT_SRC_ID_L]; + assign cmd_sid = cp_data[PKT_DEST_ID_H:PKT_DEST_ID_L]; + assign cmd_byte_cnt = cp_data[PKT_BYTE_CNT_H:PKT_BYTE_CNT_L]; + assign cmd_burstwrap = cp_data[PKT_BURSTWRAP_H:PKT_BURSTWRAP_L]; + assign cmd_burstsize = cp_data[PKT_BURST_SIZE_H:PKT_BURST_SIZE_L]; + assign cmd_debugaccess = cp_data[PKT_PROTECTION_L]; + + // Local "ready_for_command" signal: deasserted when the agent is unable to accept + // another command, e.g. rdv FIFO is full, (local readdata storage is full && + // ~rp_ready), ... + // Say, this could depend on the type of command, for example, even if the + // rdv FIFO is full, a write request can be accepted. For later. + wire ready_for_command; + + wire local_lock = cp_valid & cp_data[PKT_TRANS_LOCK]; + wire local_write = cp_valid & cp_data[PKT_TRANS_WRITE]; + wire local_read = cp_valid & cp_data[PKT_TRANS_READ]; + wire local_compressed_read = cp_valid & cp_data[PKT_TRANS_COMPRESSED_READ]; + wire nonposted_write_endofpacket = ~cp_data[PKT_TRANS_POSTED] & local_write & cp_endofpacket; + + // num_symbols is PKT_SYMBOLS, appropriately sized. + wire [31:0] int_num_symbols = PKT_SYMBOLS; + wire [BYTE_CNT_W-1:0] num_symbols = int_num_symbols[BYTE_CNT_W-1:0]; + + generate + if (PREVENT_FIFO_OVERFLOW) begin : prevent_fifo_overflow_block + // --------------------------------------------------- + // Backpressure if the slave says to, or if FIFO overflow may occur. + // + // All commands are backpressured once the FIFO is full + // even if they don't need storage. This breaks a long + // combinatorial path from the master read/write through + // this logic and back to the master via the backpressure + // path. + // + // To avoid a loss of throughput the FIFO will be parameterized + // one slot deeper. The extra slot should never be used in normal + // operation, but should a slave misbehave and accept one more + // read than it should then backpressure will kick in. + // + // An example: assume a slave with MPRT = 2. It can accept a + // command sequence RRWW without backpressuring. If the FIFO is + // only 2 deep, we'd backpressure the writes leading to loss of + // throughput. If the FIFO is 3 deep, we'll only backpressure when + // RRR... which is an illegal condition anyway. + // --------------------------------------------------- + + assign ready_for_command = rf_source_ready; + assign cp_ready = (~m0_waitrequest | suppress_cmd) && ready_for_command; + + end else begin : no_prevent_fifo_overflow_block + + // Do not suppress the command or the slave will + // not be able to waitrequest + assign ready_for_command = 1'b1; + // Backpressure only if the slave says to. + assign cp_ready = ~m0_waitrequest | suppress_cmd; + + end + endgenerate + + generate if (SUPPRESS_0_BYTEEN_CMD && !BURSTING) begin : suppress_0_byteen_cmd_non_bursting + assign byteen_asserted = |cmd_byteen; + assign suppress_read = ~byteen_asserted; + assign suppress_write = ~byteen_asserted; + assign suppress_cmd = ~byteen_asserted; + end else if (SUPPRESS_0_BYTEEN_CMD && BURSTING) begin: suppress_0_byteen_cmd_bursting + assign byteen_asserted = |cmd_byteen; + assign suppress_read = ~byteen_asserted; + assign suppress_write = 1'b0; + assign suppress_cmd = ~byteen_asserted && cmd_read; + end else begin : no_suppress_0_byteen_cmd + assign suppress_read = 1'b0; + assign suppress_write = 1'b0; + assign suppress_cmd = 1'b0; + end + endgenerate + + // ------------------------------------------------------------------- + // Extract avalon signals from command packet. + // ------------------------------------------------------------------- + // Mask off the lower bits of address. + // The burst adapter before this component will break narrow sized packets + // into sub-bursts of length 1. However, the packet addresses are preserved, + // which means this component may see size-aligned addresses. + // + // Masking ensures that the addresses seen by an Avalon slave are aligned to + // the full data width instead of the size. + // + // Example: + // output from burst adapter (datawidth=4, size=2 bytes): + // subburst1 addr=0, subburst2 addr=2, subburst3 addr=4, subburst4 addr=6 + // expected output from slave agent: + // subburst1 addr=0, subburst2 addr=0, subburst3 addr=4, subburst4 addr=4 + generate + if (BITS_TO_MASK > 0) begin : mask_address + + assign m0_address = { cmd_addr[ADDR_W-1:BITS_TO_MASK], {BITS_TO_MASK{1'b0}} }; + + end else begin : no_mask_address + + assign m0_address = cmd_addr; + + end + endgenerate + + assign m0_byteenable = cmd_byteen; + assign m0_writedata = cmd_data; + + // Note: no Avalon-MM slave in existence accepts uncompressed read bursts - + // this sort of burst exists only in merlin fabric ST packets. What to do + // if we see such a burst? All beats in that burst need to be transmitted + // to the slave so we have enough space-time for byteenable expression. + // + // There can be multiple bursts in a packet, but only one beat per burst + // in cases. The exception is when we've decided not to insert a + // burst adapter for efficiency reasons, in which case this agent is also + // responsible for driving burstcount to 1 on each beat of an uncompressed + // read burst. + + assign m0_read = ready_for_command & !suppress_read & (local_compressed_read | local_read); + + generate + // AVS_BURSTCOUNT_W and BYTE_CNT_W may not be equal. Assign m0_burstcount + // from a sub-range, or 0-pad, as appropriate. + if (AVS_BURSTCOUNT_W > BYTE_CNT_W) begin : m0_burstcount_zero_pad + wire [AVS_BURSTCOUNT_W - BYTE_CNT_W - 1 : 0] zero_pad = {(AVS_BURSTCOUNT_W - BYTE_CNT_W) {1'b0}}; + assign m0_burstcount = (local_read & ~local_compressed_read) ? + {zero_pad, num_symbols} : + {zero_pad, cmd_byte_cnt}; + end + else begin : m0_burstcount_no_pad + assign m0_burstcount = (local_read & ~local_compressed_read) ? + num_symbols[AVS_BURSTCOUNT_W-1:0] : + cmd_byte_cnt[AVS_BURSTCOUNT_W-1:0]; + end + endgenerate + + assign m0_write = ready_for_command & local_write & !suppress_write; + assign m0_lock = ready_for_command & local_lock & (m0_read | m0_write); + assign m0_debugaccess = cmd_debugaccess; + + // ------------------------------------------------------------------- + // Indirection layer for response packet values. Some may always wire + // directly from the slave translator; others will no doubt emerge from + // various FIFOs. + // What to put in resp_data when a write occured? Answer: it does not + // matter, because only response status is needed for non-posted writes, + // and the packet already has a field for that. + // + // We use the rdata_fifo to store write responses as well. This allows us + // to handle backpressure on the response path, and allows write response + // merging. + assign rdata_fifo_src_valid = m0_readdatavalid | m0_writeresponsevalid; + assign rdata_fifo_src_data = {m0_response, m0_readdata}; + + // ------------------------------------------------------------------ + // Generate a token when read commands are suppressed. The token + // is stored in the response FIFO, and will be used to synthesize + // a read response. The same token is used for non-posted write + // response synthesis. + // + // Note: this token is not generated for suppressed uncompressed read cycles; + // the burst uncompression logic at the read side of the response FIFO + // generates the correct number of responses. + // + // When the slave can return the response, let it do its job. Don't + // synthesize a response in that case, unless we've suppressed the + // the last transfer in a write sub-burst. + // ------------------------------------------------------------------ + wire write_end_of_subburst; + assign needs_response_synthesis = ((local_read | local_compressed_read) & suppress_read) || + (!USE_WRITERESPONSE && nonposted_write_endofpacket) || + (USE_WRITERESPONSE && write_end_of_subburst && suppress_write); + + // Avalon-ST interfaces to external response FIFO. + // + // For efficiency, when synthesizing a write response we only store a non-posted write + // transaction at its endofpacket, even if it was split into multiple sub-bursts. + // + // When not synthesizing write responses, we store each sub-burst in the FIFO. + // Each sub-burst to the slave will return a response, which corresponds to one + // entry in the FIFO. We merge all the sub-burst responses on the final + // sub-burst and send it on the response channel. + + wire internal_cp_endofburst; + wire [31:0] minimum_bytecount_wire = PKT_SYMBOLS; // to solve qis warning + wire [AVS_BURSTCOUNT_W-1:0] minimum_bytecount; + + assign minimum_bytecount = minimum_bytecount_wire[AVS_BURSTCOUNT_W-1:0]; + assign internal_cp_endofburst = (cmd_byte_cnt == minimum_bytecount); + assign write_end_of_subburst = local_write & internal_cp_endofburst; + + assign rf_source_valid = (local_read | local_compressed_read | (nonposted_write_endofpacket && !USE_WRITERESPONSE) | (USE_WRITERESPONSE && internal_cp_endofburst && local_write)) + & ready_for_command & cp_ready; + assign rf_source_startofpacket = cp_startofpacket; + assign rf_source_endofpacket = cp_endofpacket; + always @* begin + // default: assign every command packet field to the response FIFO... + rf_source_data = {1'b0, cp_data}; + + // ... and override select fields as needed. + rf_source_data[FIFO_DATA_W-1] = needs_response_synthesis; + rf_source_data[PKT_DATA_H :PKT_DATA_L] = {DATA_W {1'b0}}; + rf_source_data[PKT_BYTEEN_H :PKT_BYTEEN_L] = cmd_byteen; + rf_source_data[PKT_ADDR_H :PKT_ADDR_L] = cmd_addr; + rf_source_data[PKT_TRANS_COMPRESSED_READ] = cmd_compressed; + rf_source_data[PKT_TRANS_POSTED] = cmd_posted; + rf_source_data[PKT_TRANS_WRITE] = cmd_write; + rf_source_data[PKT_TRANS_READ] = cmd_read; + rf_source_data[PKT_SRC_ID_H :PKT_SRC_ID_L] = cmd_mid; + rf_source_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = cmd_sid; + rf_source_data[PKT_BYTE_CNT_H:PKT_BYTE_CNT_L] = cmd_byte_cnt; + rf_source_data[PKT_BURSTWRAP_H:PKT_BURSTWRAP_L] = cmd_burstwrap; + rf_source_data[PKT_BURST_SIZE_H:PKT_BURST_SIZE_L] = cmd_burstsize; + rf_source_data[PKT_PROTECTION_H:PKT_PROTECTION_L] = '0; + rf_source_data[PKT_PROTECTION_L] = cmd_debugaccess; + end + + wire uncompressor_source_valid; + wire [BURSTSIZE_W-1:0] uncompressor_burstsize; + wire last_write_response; + + // last_write_response indicates the last response of the broken-up write burst (sub-bursts). + // At this time, the final merged response is sent, and rp_valid is only asserted + // once for the whole burst. + generate + if (USE_WRITERESPONSE) begin + assign last_write_response = rf_sink_data[PKT_TRANS_WRITE] & rf_sink_endofpacket; + always @* begin + if (rf_sink_data[PKT_TRANS_WRITE] == 1) + rp_valid = (rdata_fifo_sink_valid | generate_response) & last_write_response & !rf_sink_data[PKT_TRANS_POSTED]; + else + rp_valid = rdata_fifo_sink_valid | uncompressor_source_valid; + end + end else begin + assign last_write_response = 1'b0; + always @* begin + rp_valid = rdata_fifo_sink_valid | uncompressor_source_valid; + end + end + endgenerate + + // ------------------------------------------------------------------ + // Response merging + // ------------------------------------------------------------------ + reg [1:0] current_response; + reg [1:0] response_merged; + generate + if (USE_WRITERESPONSE) begin : response_merging_all + reg first_write_response; + reg reset_merged_output; + reg [1:0] previous_response_in; + reg [1:0] previous_response; + + always_ff @(posedge clk, posedge reset) begin + if (reset) begin + first_write_response <= 1'b1; + end + else begin // Merging work for write response, for read: previous_response_in = current_response + if (rf_sink_valid & (rdata_fifo_sink_valid | generate_response) & rf_sink_data[PKT_TRANS_WRITE]) begin + first_write_response <= 1'b0; + if (rf_sink_endofpacket) + first_write_response <= 1'b1; + end + end + end + + always_comb begin + current_response = generate_response ? 2'b00 : rdata_fifo_sink_data[AVS_DATA_W+1:AVS_DATA_W] | {2{rdata_fifo_sink_error}}; + reset_merged_output = first_write_response && (rdata_fifo_sink_valid || generate_response); + previous_response_in = reset_merged_output ? current_response : previous_response; + response_merged = current_response >= previous_response ? current_response: previous_response_in; + end + + always_ff @(posedge clk or posedge reset) begin + if (reset) begin + previous_response <= 2'b00; + end + else begin + if (rf_sink_valid & (rdata_fifo_sink_valid || generate_response)) begin + previous_response <= response_merged; + end + end + end + end else begin : response_merging_read_only + always @* begin + current_response = generate_response ? 2'b00: rdata_fifo_sink_data[AVS_DATA_W+1:AVS_DATA_W] | + {2{rdata_fifo_sink_error}}; + response_merged = current_response; + end + end + endgenerate + + assign generate_response = rf_sink_data[FIFO_DATA_W-1]; + + wire [BYTE_CNT_W-1:0] rf_sink_byte_cnt = rf_sink_data[PKT_BYTE_CNT_H:PKT_BYTE_CNT_L]; + wire rf_sink_compressed = rf_sink_data[PKT_TRANS_COMPRESSED_READ]; + wire [BURSTWRAP_W-1:0] rf_sink_burstwrap = rf_sink_data[PKT_BURSTWRAP_H:PKT_BURSTWRAP_L]; + wire [BURSTSIZE_W-1:0] rf_sink_burstsize = rf_sink_data[PKT_BURST_SIZE_H:PKT_BURST_SIZE_L]; + wire [ADDR_W-1:0] rf_sink_addr = rf_sink_data[PKT_ADDR_H:PKT_ADDR_L]; + // a non posted write response is always completed in 1 cycle. Modify the startofpacket signal to 1'b1 instead of taking whatever is in the rf_fifo + wire rf_sink_startofpacket_wire = rf_sink_data[PKT_TRANS_WRITE] ? 1'b1 : rf_sink_startofpacket; + + wire [BYTE_CNT_W-1:0] burst_byte_cnt; + wire [BURSTWRAP_W-1:0] rp_burstwrap; + wire [ADDR_W-1:0] rp_address; + wire rp_is_compressed; + wire ready_for_response; + + // ------------------------------------------------------------------ + // We're typically ready for a response if the network is ready. There + // is one exception: + // + // If the slave issues write responses, we only issue a merged response on + // the final sub-burst. As a result, we only care about response channel + // availability on the final burst when we send out the merged response. + // ------------------------------------------------------------------ + assign ready_for_response = (USE_WRITERESPONSE) ? + rp_ready || (rf_sink_data[PKT_TRANS_WRITE] && !last_write_response) || rf_sink_data[PKT_TRANS_POSTED]: + rp_ready; + + // ------------------------------------------------------------------ + // Backpressure the readdata fifo if we're supposed to synthesize a response. + // This may be a read response (for suppressed reads) or a write response + // (for non-posted writes). + // ------------------------------------------------------------------ + assign rdata_fifo_sink_ready = rdata_fifo_sink_valid & ready_for_response & ~(rf_sink_valid & generate_response); + + always @* begin + // By default, return all fields... + rp_data = rf_sink_data[ST_DATA_W - 1 : 0]; + + // ... and override specific fields. + rp_data[PKT_DATA_H :PKT_DATA_L] = rdata_fifo_sink_data[AVS_DATA_W-1:0]; + // Assignments directly from the response fifo. + rp_data[PKT_TRANS_POSTED] = rf_sink_data[PKT_TRANS_POSTED]; + rp_data[PKT_TRANS_WRITE] = rf_sink_data[PKT_TRANS_WRITE]; + rp_data[PKT_SRC_ID_H :PKT_SRC_ID_L] = rf_sink_data[PKT_DEST_ID_H : PKT_DEST_ID_L]; + rp_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = rf_sink_data[PKT_SRC_ID_H : PKT_SRC_ID_L]; + rp_data[PKT_BYTEEN_H :PKT_BYTEEN_L] = rf_sink_data[PKT_BYTEEN_H : PKT_BYTEEN_L]; + rp_data[PKT_PROTECTION_H:PKT_PROTECTION_L] = rf_sink_data[PKT_PROTECTION_H:PKT_PROTECTION_L]; + + // Burst uncompressor assignments + rp_data[PKT_ADDR_H :PKT_ADDR_L] = rp_address; + rp_data[PKT_BURSTWRAP_H:PKT_BURSTWRAP_L] = rp_burstwrap; + rp_data[PKT_BYTE_CNT_H:PKT_BYTE_CNT_L] = burst_byte_cnt; + rp_data[PKT_TRANS_READ] = rf_sink_data[PKT_TRANS_READ] | rf_sink_data[PKT_TRANS_COMPRESSED_READ]; + rp_data[PKT_TRANS_COMPRESSED_READ] = rp_is_compressed; + + rp_data[PKT_RESPONSE_STATUS_H:PKT_RESPONSE_STATUS_L] = response_merged; + rp_data[PKT_BURST_SIZE_H:PKT_BURST_SIZE_L] = uncompressor_burstsize; + // bounce the original size back to the master untouched + rp_data[PKT_ORI_BURST_SIZE_H:PKT_ORI_BURST_SIZE_L] = rf_sink_data[PKT_ORI_BURST_SIZE_H:PKT_ORI_BURST_SIZE_L]; + end + + // ------------------------------------------------------------------ + // Note: the burst uncompressor may be asked to generate responses for + // write packets; these are treated the same as single-cycle uncompressed + // reads. + // ------------------------------------------------------------------ + altera_merlin_burst_uncompressor #( + .ADDR_W (ADDR_W), + .BURSTWRAP_W (BURSTWRAP_W), + .BYTE_CNT_W (BYTE_CNT_W), + .PKT_SYMBOLS (PKT_SYMBOLS), + .BURST_SIZE_W (BURSTSIZE_W) + ) uncompressor ( + .clk (clk), + .reset (reset), + .sink_startofpacket (rf_sink_startofpacket_wire), + .sink_endofpacket (rf_sink_endofpacket), + .sink_valid (rf_sink_valid & (rdata_fifo_sink_valid | generate_response)), + .sink_ready (rf_sink_ready), + .sink_addr (rf_sink_addr), + .sink_burstwrap (rf_sink_burstwrap), + .sink_byte_cnt (rf_sink_byte_cnt), + .sink_is_compressed (rf_sink_compressed), + .sink_burstsize (rf_sink_burstsize), + + .source_startofpacket (rp_startofpacket), + .source_endofpacket (rp_endofpacket), + .source_valid (uncompressor_source_valid), + .source_ready (ready_for_response), + .source_addr (rp_address), + .source_burstwrap (rp_burstwrap), + .source_byte_cnt (burst_byte_cnt), + .source_is_compressed (rp_is_compressed), + .source_burstsize (uncompressor_burstsize) + ); + + //-------------------------------------- + // Assertion: In case slave support response. The slave needs return response in order + // Ex: non-posted write followed by a read: write response must complete before read data + //-------------------------------------- + // synthesis translate_off + ERROR_write_response_and_read_response_cannot_happen_same_time: + assert property ( @(posedge clk) + disable iff (reset) !(m0_writeresponsevalid && m0_readdatavalid) + ); + + // synthesis translate_on +endmodule + diff --git a/Top/niosII/synthesis/submodules/altera_merlin_slave_translator.sv b/Top/niosII/synthesis/submodules/altera_merlin_slave_translator.sv new file mode 100644 index 0000000..206eed5 --- /dev/null +++ b/Top/niosII/synthesis/submodules/altera_merlin_slave_translator.sv @@ -0,0 +1,482 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator.sv#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------- +// Merlin Slave Translator +// +// Translates Universal Avalon MM Slave +// to any Avalon MM Slave +// ------------------------------------- +// +//Notable Note: 0 AV_READLATENCY is not allowed and will be converted to a 1 cycle readlatency in all cases but one +//If you declare a slave with fixed read timing requirements, the readlatency of such a slave will be allowed to be zero +//The key feature here is that no same cycle turnaround data is processed through the fabric. + +//import avalon_utilities_pkg::*; + +`timescale 1 ns / 1 ns + +module altera_merlin_slave_translator #( + parameter + //Widths + AV_ADDRESS_W = 32, + AV_DATA_W = 32, + AV_BURSTCOUNT_W = 4, + AV_BYTEENABLE_W = 4, + UAV_BYTEENABLE_W = 4, + + //Read Latency + AV_READLATENCY = 1, + + //Timing + AV_READ_WAIT_CYCLES = 0, + AV_WRITE_WAIT_CYCLES = 0, + AV_SETUP_WAIT_CYCLES = 0, + AV_DATA_HOLD_CYCLES = 0, + + //Optional Port Declarations + USE_READDATAVALID = 1, + USE_WAITREQUEST = 1, + USE_READRESPONSE = 0, + USE_WRITERESPONSE = 0, + + //Variable Addressing + AV_SYMBOLS_PER_WORD = 4, + AV_ADDRESS_SYMBOLS = 0, + AV_BURSTCOUNT_SYMBOLS = 0, + BITS_PER_WORD = clog2_plusone(AV_SYMBOLS_PER_WORD - 1), + UAV_ADDRESS_W = 38, + UAV_BURSTCOUNT_W = 10, + UAV_DATA_W = 32, + + AV_CONSTANT_BURST_BEHAVIOR = 0, + UAV_CONSTANT_BURST_BEHAVIOR = 0, + CHIPSELECT_THROUGH_READLATENCY = 0, + + // Tightly-Coupled Options + USE_UAV_CLKEN = 0, + AV_REQUIRE_UNALIGNED_ADDRESSES = 0 +) ( + + // ------------------- + // Clock & Reset + // ------------------- + input wire clk, + input wire reset, + + // ------------------- + // Universal Avalon Slave + // ------------------- + + input wire [UAV_ADDRESS_W - 1 : 0] uav_address, + input wire [UAV_DATA_W - 1 : 0] uav_writedata, + input wire uav_write, + input wire uav_read, + input wire [UAV_BURSTCOUNT_W - 1 : 0] uav_burstcount, + input wire [UAV_BYTEENABLE_W - 1 : 0] uav_byteenable, + input wire uav_lock, + input wire uav_debugaccess, + input wire uav_clken, + + output logic uav_readdatavalid, + output logic uav_waitrequest, + output logic [UAV_DATA_W - 1 : 0] uav_readdata, + output logic [1:0] uav_response, + // input wire uav_writeresponserequest, + output logic uav_writeresponsevalid, + + // ------------------- + // Customizable Avalon Master + // ------------------- + output logic [AV_ADDRESS_W - 1 : 0] av_address, + output logic [AV_DATA_W - 1 : 0] av_writedata, + output logic av_write, + output logic av_read, + output logic [AV_BURSTCOUNT_W - 1 : 0] av_burstcount, + output logic [AV_BYTEENABLE_W - 1 : 0] av_byteenable, + output logic [AV_BYTEENABLE_W - 1 : 0] av_writebyteenable, + output logic av_begintransfer, + output wire av_chipselect, + output logic av_beginbursttransfer, + output logic av_lock, + output wire av_clken, + output wire av_debugaccess, + output wire av_outputenable, + + input logic [AV_DATA_W - 1 : 0] av_readdata, + input logic av_readdatavalid, + input logic av_waitrequest, + + input logic [1:0] av_response, + // output logic av_writeresponserequest, + input wire av_writeresponsevalid + +); + + function integer clog2_plusone; + input [31:0] Depth; + integer i; + begin + i = Depth; + for(clog2_plusone = 0; i > 0; clog2_plusone = clog2_plusone + 1) + i = i >> 1; + end + endfunction + + function integer max; + //returns the larger of two passed arguments + input [31:0] one; + input [31:0] two; + if(one > two) + max=one; + else + max=two; + endfunction // int + + localparam AV_READ_WAIT_INDEXED = (AV_SETUP_WAIT_CYCLES + AV_READ_WAIT_CYCLES); + localparam AV_WRITE_WAIT_INDEXED = (AV_SETUP_WAIT_CYCLES + AV_WRITE_WAIT_CYCLES); + localparam AV_DATA_HOLD_INDEXED = (AV_WRITE_WAIT_INDEXED + AV_DATA_HOLD_CYCLES); + localparam LOG2_OF_LATENCY_SUM = max(clog2_plusone(AV_READ_WAIT_INDEXED + 1),clog2_plusone(AV_DATA_HOLD_INDEXED + 1)); + localparam BURSTCOUNT_SHIFT_SELECTOR = AV_BURSTCOUNT_SYMBOLS ? 0 : BITS_PER_WORD; + localparam ADDRESS_SHIFT_SELECTOR = AV_ADDRESS_SYMBOLS ? 0 : BITS_PER_WORD; + localparam ADDRESS_HIGH = ( UAV_ADDRESS_W > AV_ADDRESS_W + ADDRESS_SHIFT_SELECTOR ) ? + AV_ADDRESS_W : + UAV_ADDRESS_W - ADDRESS_SHIFT_SELECTOR; + localparam BURSTCOUNT_HIGH = ( UAV_BURSTCOUNT_W > AV_BURSTCOUNT_W + BURSTCOUNT_SHIFT_SELECTOR ) ? + AV_BURSTCOUNT_W : + UAV_BURSTCOUNT_W - BURSTCOUNT_SHIFT_SELECTOR; + localparam BYTEENABLE_ADDRESS_BITS = ( clog2_plusone(UAV_BYTEENABLE_W) - 1 ) >= 1 ? clog2_plusone(UAV_BYTEENABLE_W) - 1 : 1; + + + // Calculate the symbols per word as the power of 2 extended symbols per word + wire [31 : 0] symbols_per_word_int = 2**(clog2_plusone(AV_SYMBOLS_PER_WORD[UAV_BURSTCOUNT_W : 0] - 1)); + wire [UAV_BURSTCOUNT_W-1 : 0] symbols_per_word = symbols_per_word_int[UAV_BURSTCOUNT_W-1 : 0]; + + // +-------------------------------- + // |Backwards Compatibility Signals + // +-------------------------------- + assign av_clken = (USE_UAV_CLKEN) ? uav_clken : 1'b1; + assign av_debugaccess = uav_debugaccess; + + // +------------------- + // |Passthru Signals + // +------------------- + + reg [1 : 0] av_response_delayed; + + always @(posedge clk, posedge reset) begin + if (reset) begin + av_response_delayed <= 2'b0; + end else begin + av_response_delayed <= av_response; + end + end + + always_comb + begin + if (!USE_READRESPONSE && !USE_WRITERESPONSE) begin + uav_response = '0; + end else begin + if (AV_READLATENCY != 0 || USE_READDATAVALID) begin + uav_response = av_response; + end else begin + uav_response = av_response_delayed; + end + end + end + // assign av_writeresponserequest = uav_writeresponserequest; + assign uav_writeresponsevalid = av_writeresponsevalid; + + //------------------------- + //Writedata and Byteenable + //------------------------- + + always@* begin + av_byteenable = '0; + av_byteenable = uav_byteenable[AV_BYTEENABLE_W - 1 : 0]; + end + + always@* begin + av_writedata = '0; + av_writedata = uav_writedata[AV_DATA_W - 1 : 0]; + end + + // +------------------- + // |Calculated Signals + // +------------------- + + logic [UAV_ADDRESS_W - 1 : 0 ] real_uav_address; + + function [BYTEENABLE_ADDRESS_BITS - 1 : 0 ] decode_byteenable; + input [UAV_BYTEENABLE_W - 1 : 0 ] byteenable; + + for(int i = 0 ; i < UAV_BYTEENABLE_W; i++ ) begin + if(byteenable[i] == 1) begin + return i; + end + end + + return '0; + + endfunction + + reg [AV_BURSTCOUNT_W - 1 : 0] burstcount_reg; + reg [AV_ADDRESS_W - 1 : 0] address_reg; + always@(posedge clk, posedge reset) begin + if(reset) begin + burstcount_reg <= '0; + address_reg <= '0; + end else begin + burstcount_reg <= burstcount_reg; + address_reg <= address_reg; + if(av_beginbursttransfer) begin + burstcount_reg <= uav_burstcount [ BURSTCOUNT_HIGH - 1 + BURSTCOUNT_SHIFT_SELECTOR : BURSTCOUNT_SHIFT_SELECTOR ]; + address_reg <= real_uav_address [ ADDRESS_HIGH - 1 + ADDRESS_SHIFT_SELECTOR : ADDRESS_SHIFT_SELECTOR ]; + end + end + end + + logic [BYTEENABLE_ADDRESS_BITS-1:0] temp_wire; + + always@* begin + if( AV_REQUIRE_UNALIGNED_ADDRESSES == 1) begin + temp_wire = decode_byteenable(uav_byteenable); + real_uav_address = { uav_address[UAV_ADDRESS_W - 1 : BYTEENABLE_ADDRESS_BITS ], temp_wire[BYTEENABLE_ADDRESS_BITS - 1 : 0 ] }; + end else begin + real_uav_address = uav_address; + end + + av_address = real_uav_address[ADDRESS_HIGH - 1 + ADDRESS_SHIFT_SELECTOR : ADDRESS_SHIFT_SELECTOR ]; + if( AV_CONSTANT_BURST_BEHAVIOR && !UAV_CONSTANT_BURST_BEHAVIOR && ~av_beginbursttransfer ) + av_address = address_reg; + end + + always@* begin + av_burstcount=uav_burstcount[BURSTCOUNT_HIGH - 1 + BURSTCOUNT_SHIFT_SELECTOR : BURSTCOUNT_SHIFT_SELECTOR ]; + if( AV_CONSTANT_BURST_BEHAVIOR && !UAV_CONSTANT_BURST_BEHAVIOR && ~av_beginbursttransfer ) + av_burstcount = burstcount_reg; + end + + always@* begin + av_lock = uav_lock; + end + + // ------------------- + // Writebyteenable Assignment + // ------------------- + always@* begin + av_writebyteenable = { (AV_BYTEENABLE_W){uav_write} } & uav_byteenable[AV_BYTEENABLE_W - 1 : 0]; + end + + // ------------------- + // Waitrequest Assignment + // ------------------- + + reg av_waitrequest_generated; + reg av_waitrequest_generated_read; + reg av_waitrequest_generated_write; + reg waitrequest_reset_override; + reg [ ( LOG2_OF_LATENCY_SUM ? LOG2_OF_LATENCY_SUM - 1 : 0 ) : 0 ] wait_latency_counter; + + always@(posedge reset, posedge clk) begin + if(reset) begin + wait_latency_counter <= '0; + waitrequest_reset_override <= 1'h1; + end else begin + waitrequest_reset_override <= 1'h0; + wait_latency_counter <= '0; + if( ~uav_waitrequest | waitrequest_reset_override ) + wait_latency_counter <= '0; + else if( uav_read | uav_write ) + wait_latency_counter <= wait_latency_counter + 1'h1; + end + end + + + always @* begin + + av_read = uav_read; + av_write = uav_write; + av_waitrequest_generated = 1'h1; + av_waitrequest_generated_read = 1'h1; + av_waitrequest_generated_write = 1'h1; + + if(LOG2_OF_LATENCY_SUM == 1) + av_waitrequest_generated = 0; + + if(LOG2_OF_LATENCY_SUM > 1 && !USE_WAITREQUEST) begin + av_read = wait_latency_counter >= AV_SETUP_WAIT_CYCLES && uav_read; + av_write = wait_latency_counter >= AV_SETUP_WAIT_CYCLES && uav_write && wait_latency_counter <= AV_WRITE_WAIT_INDEXED; + av_waitrequest_generated_read = wait_latency_counter != AV_READ_WAIT_INDEXED; + av_waitrequest_generated_write = wait_latency_counter != AV_DATA_HOLD_INDEXED; + + if(uav_write) + av_waitrequest_generated = av_waitrequest_generated_write; + else + av_waitrequest_generated = av_waitrequest_generated_read; + + end + + if(USE_WAITREQUEST) begin + uav_waitrequest = av_waitrequest; + end else begin + uav_waitrequest = av_waitrequest_generated | waitrequest_reset_override; + end + + end + + // -------------- + // Readdata Assignment + // -------------- + + reg[(AV_DATA_W ? AV_DATA_W -1 : 0 ): 0] av_readdata_pre; + + always@(posedge clk, posedge reset) begin + if(reset) + av_readdata_pre <= 'b0; + else + av_readdata_pre <= av_readdata; + end + + always@* begin + uav_readdata = {UAV_DATA_W{1'b0}}; + if( AV_READLATENCY != 0 || USE_READDATAVALID ) begin + uav_readdata[AV_DATA_W-1:0] = av_readdata; + end else begin + uav_readdata[AV_DATA_W-1:0] = av_readdata_pre; + end + end + + // ------------------- + // Readdatavalid Assigment + // ------------------- + reg[(AV_READLATENCY>0 ? AV_READLATENCY-1:0) :0] read_latency_shift_reg; + reg top_read_latency_shift_reg; + + always@* begin + uav_readdatavalid=top_read_latency_shift_reg; + if(USE_READDATAVALID) begin + uav_readdatavalid = av_readdatavalid; + end + end + + always@* begin + top_read_latency_shift_reg = uav_read & ~uav_waitrequest & ~waitrequest_reset_override; + if(AV_READLATENCY == 1 || AV_READLATENCY == 0 ) begin + top_read_latency_shift_reg=read_latency_shift_reg; + end + if (AV_READLATENCY > 1) begin + top_read_latency_shift_reg = read_latency_shift_reg[(AV_READLATENCY ? AV_READLATENCY-1 : 0)]; + end + end + + always@(posedge reset, posedge clk) begin + if (reset) begin + read_latency_shift_reg <= '0; + end else if (av_clken) begin + read_latency_shift_reg[0] <= uav_read && ~uav_waitrequest & ~waitrequest_reset_override; + for (int i=0; i+1 < AV_READLATENCY ; i+=1 ) begin + read_latency_shift_reg[i+1] <= read_latency_shift_reg[i]; + end + end + end + + // ------------ + // Chipselect and OutputEnable + // ------------ + reg av_chipselect_pre; + wire cs_extension; + reg av_outputenable_pre; + + assign av_chipselect = (uav_read | uav_write) ? 1'b1 : av_chipselect_pre; + assign cs_extension = ( (^ read_latency_shift_reg) & ~top_read_latency_shift_reg ) | ((| read_latency_shift_reg) & ~(^ read_latency_shift_reg)); + assign av_outputenable = uav_read ? 1'b1 : av_outputenable_pre; + + always@(posedge reset, posedge clk) begin + if(reset) + av_outputenable_pre <= 1'b0; + else if( AV_READLATENCY == 0 && AV_READ_WAIT_INDEXED != 0 ) + av_outputenable_pre <= 0; + else + av_outputenable_pre <= cs_extension | uav_read; + end + + always@(posedge reset, posedge clk) begin + if(reset) begin + av_chipselect_pre <= 1'b0; + end else begin + av_chipselect_pre <= 1'b0; + if(AV_READLATENCY != 0 && CHIPSELECT_THROUGH_READLATENCY == 1) begin + //The AV_READLATENCY term is only here to prevent chipselect from remaining asserted while read and write fall. + //There is no functional impact as 0 cycle transactions are treated as 1 cycle on the other side of the translator. + if(uav_read) begin + av_chipselect_pre <= 1'b1; + end else if(cs_extension == 1) begin + av_chipselect_pre <= 1'b1; + end + end + end + end + + // ------------------- + // Begintransfer Assigment + // ------------------- + reg end_begintransfer; + + always@* begin + av_begintransfer = ( uav_write | uav_read ) & ~end_begintransfer; + end + + always@ ( posedge clk or posedge reset ) begin + if(reset) begin + end_begintransfer <= 1'b0; + end else begin + if(av_begintransfer == 1 && uav_waitrequest && ~waitrequest_reset_override) + end_begintransfer <= 1'b1; + else if(uav_waitrequest) + end_begintransfer <= end_begintransfer; + else + end_begintransfer <= 1'b0; + end + end + + // ------------------- + // Beginbursttransfer Assigment + // ------------------- + reg end_beginbursttransfer; + reg in_transfer; + + always@* begin + av_beginbursttransfer = uav_read ? av_begintransfer : (av_begintransfer && ~end_beginbursttransfer && ~in_transfer); + end + + always@ ( posedge clk or posedge reset ) begin + if(reset) begin + end_beginbursttransfer <= 1'b0; + in_transfer <= 1'b0; + end else begin + end_beginbursttransfer <= uav_write & ( uav_burstcount != symbols_per_word ); + if(uav_write && uav_burstcount == symbols_per_word) + in_transfer <=1'b0; + else if(uav_write) + in_transfer <=1'b1; + end + end + +endmodule diff --git a/Top/niosII/synthesis/submodules/altera_reset_controller.sdc b/Top/niosII/synthesis/submodules/altera_reset_controller.sdc new file mode 100644 index 0000000..2217025 --- /dev/null +++ b/Top/niosII/synthesis/submodules/altera_reset_controller.sdc @@ -0,0 +1,30 @@ +# (C) 2001-2018 Intel Corporation. All rights reserved. +# Your use of Intel Corporation's design tools, logic functions and other +# software and tools, and its AMPP partner logic functions, and any output +# files from any of the foregoing (including device programming or simulation +# files), and any associated documentation or information are expressly subject +# to the terms and conditions of the Intel Program License Subscription +# Agreement, Intel FPGA IP License Agreement, or other applicable +# license agreement, including, without limitation, that your use is for the +# sole purpose of programming logic devices manufactured by Intel and sold by +# Intel or its authorized distributors. Please refer to the applicable +# agreement for further details. + + +# +--------------------------------------------------- +# | Cut the async clear paths +# +--------------------------------------------------- +set aclr_counter 0 +set clrn_counter 0 +set aclr_collection [get_pins -compatibility_mode -nocase -nowarn *|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain*|aclr] +set clrn_collection [get_pins -compatibility_mode -nocase -nowarn *|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain*|clrn] +set aclr_counter [get_collection_size $aclr_collection] +set clrn_counter [get_collection_size $clrn_collection] + +if {$aclr_counter > 0} { + set_false_path -to [get_pins -compatibility_mode -nocase *|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain*|aclr] +} + +if {$clrn_counter > 0} { + set_false_path -to [get_pins -compatibility_mode -nocase *|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain*|clrn] +} diff --git a/Top/niosII/synthesis/submodules/altera_reset_controller.v b/Top/niosII/synthesis/submodules/altera_reset_controller.v new file mode 100644 index 0000000..1e44e31 --- /dev/null +++ b/Top/niosII/synthesis/submodules/altera_reset_controller.v @@ -0,0 +1,319 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// (C) 2001-2013 Altera Corporation. All rights reserved. +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_reset_controller/altera_reset_controller.v#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// -------------------------------------- +// Reset controller +// +// Combines all the input resets and synchronizes +// the result to the clk. +// ACDS13.1 - Added reset request as part of reset sequencing +// -------------------------------------- + +`timescale 1 ns / 1 ns + +module altera_reset_controller +#( + parameter NUM_RESET_INPUTS = 6, + parameter USE_RESET_REQUEST_IN0 = 0, + parameter USE_RESET_REQUEST_IN1 = 0, + parameter USE_RESET_REQUEST_IN2 = 0, + parameter USE_RESET_REQUEST_IN3 = 0, + parameter USE_RESET_REQUEST_IN4 = 0, + parameter USE_RESET_REQUEST_IN5 = 0, + parameter USE_RESET_REQUEST_IN6 = 0, + parameter USE_RESET_REQUEST_IN7 = 0, + parameter USE_RESET_REQUEST_IN8 = 0, + parameter USE_RESET_REQUEST_IN9 = 0, + parameter USE_RESET_REQUEST_IN10 = 0, + parameter USE_RESET_REQUEST_IN11 = 0, + parameter USE_RESET_REQUEST_IN12 = 0, + parameter USE_RESET_REQUEST_IN13 = 0, + parameter USE_RESET_REQUEST_IN14 = 0, + parameter USE_RESET_REQUEST_IN15 = 0, + parameter OUTPUT_RESET_SYNC_EDGES = "deassert", + parameter SYNC_DEPTH = 2, + parameter RESET_REQUEST_PRESENT = 0, + parameter RESET_REQ_WAIT_TIME = 3, + parameter MIN_RST_ASSERTION_TIME = 11, + parameter RESET_REQ_EARLY_DSRT_TIME = 4, + parameter ADAPT_RESET_REQUEST = 0 +) +( + // -------------------------------------- + // We support up to 16 reset inputs, for now + // -------------------------------------- + input reset_in0, + input reset_in1, + input reset_in2, + input reset_in3, + input reset_in4, + input reset_in5, + input reset_in6, + input reset_in7, + input reset_in8, + input reset_in9, + input reset_in10, + input reset_in11, + input reset_in12, + input reset_in13, + input reset_in14, + input reset_in15, + input reset_req_in0, + input reset_req_in1, + input reset_req_in2, + input reset_req_in3, + input reset_req_in4, + input reset_req_in5, + input reset_req_in6, + input reset_req_in7, + input reset_req_in8, + input reset_req_in9, + input reset_req_in10, + input reset_req_in11, + input reset_req_in12, + input reset_req_in13, + input reset_req_in14, + input reset_req_in15, + + + input clk, + output reg reset_out, + output reg reset_req +); + + // Always use async reset synchronizer if reset_req is used + localparam ASYNC_RESET = (OUTPUT_RESET_SYNC_EDGES == "deassert"); + + // -------------------------------------- + // Local parameter to control the reset_req and reset_out timing when RESET_REQUEST_PRESENT==1 + // -------------------------------------- + localparam MIN_METASTABLE = 3; + localparam RSTREQ_ASRT_SYNC_TAP = MIN_METASTABLE + RESET_REQ_WAIT_TIME; + + localparam LARGER = RESET_REQ_WAIT_TIME > RESET_REQ_EARLY_DSRT_TIME ? RESET_REQ_WAIT_TIME : RESET_REQ_EARLY_DSRT_TIME; + + localparam ASSERTION_CHAIN_LENGTH = (MIN_METASTABLE > LARGER) ? + MIN_RST_ASSERTION_TIME + 1 : + ( + (MIN_RST_ASSERTION_TIME > LARGER)? + MIN_RST_ASSERTION_TIME + (LARGER - MIN_METASTABLE + 1) + 1 : + MIN_RST_ASSERTION_TIME + RESET_REQ_EARLY_DSRT_TIME + RESET_REQ_WAIT_TIME - MIN_METASTABLE + 2 + ); + + localparam RESET_REQ_DRST_TAP = RESET_REQ_EARLY_DSRT_TIME + 1; + // -------------------------------------- + + wire merged_reset; + wire merged_reset_req_in; + wire reset_out_pre; + wire reset_req_pre; + + // Registers and Interconnect + (*preserve*) reg [RSTREQ_ASRT_SYNC_TAP: 0] altera_reset_synchronizer_int_chain; + reg [ASSERTION_CHAIN_LENGTH-1: 0] r_sync_rst_chain; + reg r_sync_rst; + reg r_early_rst; + + // -------------------------------------- + // "Or" all the input resets together + // -------------------------------------- + assign merged_reset = ( + reset_in0 | + reset_in1 | + reset_in2 | + reset_in3 | + reset_in4 | + reset_in5 | + reset_in6 | + reset_in7 | + reset_in8 | + reset_in9 | + reset_in10 | + reset_in11 | + reset_in12 | + reset_in13 | + reset_in14 | + reset_in15 + ); + + assign merged_reset_req_in = ( + ( (USE_RESET_REQUEST_IN0 == 1) ? reset_req_in0 : 1'b0) | + ( (USE_RESET_REQUEST_IN1 == 1) ? reset_req_in1 : 1'b0) | + ( (USE_RESET_REQUEST_IN2 == 1) ? reset_req_in2 : 1'b0) | + ( (USE_RESET_REQUEST_IN3 == 1) ? reset_req_in3 : 1'b0) | + ( (USE_RESET_REQUEST_IN4 == 1) ? reset_req_in4 : 1'b0) | + ( (USE_RESET_REQUEST_IN5 == 1) ? reset_req_in5 : 1'b0) | + ( (USE_RESET_REQUEST_IN6 == 1) ? reset_req_in6 : 1'b0) | + ( (USE_RESET_REQUEST_IN7 == 1) ? reset_req_in7 : 1'b0) | + ( (USE_RESET_REQUEST_IN8 == 1) ? reset_req_in8 : 1'b0) | + ( (USE_RESET_REQUEST_IN9 == 1) ? reset_req_in9 : 1'b0) | + ( (USE_RESET_REQUEST_IN10 == 1) ? reset_req_in10 : 1'b0) | + ( (USE_RESET_REQUEST_IN11 == 1) ? reset_req_in11 : 1'b0) | + ( (USE_RESET_REQUEST_IN12 == 1) ? reset_req_in12 : 1'b0) | + ( (USE_RESET_REQUEST_IN13 == 1) ? reset_req_in13 : 1'b0) | + ( (USE_RESET_REQUEST_IN14 == 1) ? reset_req_in14 : 1'b0) | + ( (USE_RESET_REQUEST_IN15 == 1) ? reset_req_in15 : 1'b0) + ); + + + // -------------------------------------- + // And if required, synchronize it to the required clock domain, + // with the correct synchronization type + // -------------------------------------- + generate if (OUTPUT_RESET_SYNC_EDGES == "none" && (RESET_REQUEST_PRESENT==0)) begin + + assign reset_out_pre = merged_reset; + assign reset_req_pre = merged_reset_req_in; + + end else begin + + altera_reset_synchronizer + #( + .DEPTH (SYNC_DEPTH), + .ASYNC_RESET(RESET_REQUEST_PRESENT? 1'b1 : ASYNC_RESET) + ) + alt_rst_sync_uq1 + ( + .clk (clk), + .reset_in (merged_reset), + .reset_out (reset_out_pre) + ); + + altera_reset_synchronizer + #( + .DEPTH (SYNC_DEPTH), + .ASYNC_RESET(0) + ) + alt_rst_req_sync_uq1 + ( + .clk (clk), + .reset_in (merged_reset_req_in), + .reset_out (reset_req_pre) + ); + + end + endgenerate + + generate if ( ( (RESET_REQUEST_PRESENT == 0) && (ADAPT_RESET_REQUEST==0) )| + ( (ADAPT_RESET_REQUEST == 1) && (OUTPUT_RESET_SYNC_EDGES != "deassert") ) ) begin + always @* begin + reset_out = reset_out_pre; + reset_req = reset_req_pre; + end + end else if ( (RESET_REQUEST_PRESENT == 0) && (ADAPT_RESET_REQUEST==1) ) begin + + wire reset_out_pre2; + + altera_reset_synchronizer + #( + .DEPTH (SYNC_DEPTH+1), + .ASYNC_RESET(0) + ) + alt_rst_sync_uq2 + ( + .clk (clk), + .reset_in (reset_out_pre), + .reset_out (reset_out_pre2) + ); + + always @* begin + reset_out = reset_out_pre2; + reset_req = reset_req_pre; + end + + end + else begin + + // 3-FF Metastability Synchronizer + initial + begin + altera_reset_synchronizer_int_chain <= {RSTREQ_ASRT_SYNC_TAP{1'b1}}; + end + + always @(posedge clk) + begin + altera_reset_synchronizer_int_chain[RSTREQ_ASRT_SYNC_TAP:0] <= + {altera_reset_synchronizer_int_chain[RSTREQ_ASRT_SYNC_TAP-1:0], reset_out_pre}; + end + + // Synchronous reset pipe + initial + begin + r_sync_rst_chain <= {ASSERTION_CHAIN_LENGTH{1'b1}}; + end + + always @(posedge clk) + begin + if (altera_reset_synchronizer_int_chain[MIN_METASTABLE-1] == 1'b1) + begin + r_sync_rst_chain <= {ASSERTION_CHAIN_LENGTH{1'b1}}; + end + else + begin + r_sync_rst_chain <= {1'b0, r_sync_rst_chain[ASSERTION_CHAIN_LENGTH-1:1]}; + end + end + + // Standard synchronous reset output. From 0-1, the transition lags the early output. For 1->0, the transition + // matches the early input. + + always @(posedge clk) + begin + case ({altera_reset_synchronizer_int_chain[RSTREQ_ASRT_SYNC_TAP], r_sync_rst_chain[1], r_sync_rst}) + 3'b000: r_sync_rst <= 1'b0; // Not reset + 3'b001: r_sync_rst <= 1'b0; + 3'b010: r_sync_rst <= 1'b0; + 3'b011: r_sync_rst <= 1'b1; + 3'b100: r_sync_rst <= 1'b1; + 3'b101: r_sync_rst <= 1'b1; + 3'b110: r_sync_rst <= 1'b1; + 3'b111: r_sync_rst <= 1'b1; // In Reset + default: r_sync_rst <= 1'b1; + endcase + + case ({r_sync_rst_chain[1], r_sync_rst_chain[RESET_REQ_DRST_TAP] | reset_req_pre}) + 2'b00: r_early_rst <= 1'b0; // Not reset + 2'b01: r_early_rst <= 1'b1; // Coming out of reset + 2'b10: r_early_rst <= 1'b0; // Spurious reset - should not be possible via synchronous design. + 2'b11: r_early_rst <= 1'b1; // Held in reset + default: r_early_rst <= 1'b1; + endcase + end + + always @* begin + reset_out = r_sync_rst; + reset_req = r_early_rst; + end + + end + endgenerate + +endmodule diff --git a/Top/niosII/synthesis/submodules/altera_reset_synchronizer.v b/Top/niosII/synthesis/submodules/altera_reset_synchronizer.v new file mode 100644 index 0000000..5277a4d --- /dev/null +++ b/Top/niosII/synthesis/submodules/altera_reset_synchronizer.v @@ -0,0 +1,87 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_reset_controller/altera_reset_synchronizer.v#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ----------------------------------------------- +// Reset Synchronizer +// ----------------------------------------------- +`timescale 1 ns / 1 ns + +module altera_reset_synchronizer +#( + parameter ASYNC_RESET = 1, + parameter DEPTH = 2 +) +( + input reset_in /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=R101" */, + + input clk, + output reset_out +); + + // ----------------------------------------------- + // Synchronizer register chain. We cannot reuse the + // standard synchronizer in this implementation + // because our timing constraints are different. + // + // Instead of cutting the timing path to the d-input + // on the first flop we need to cut the aclr input. + // + // We omit the "preserve" attribute on the final + // output register, so that the synthesis tool can + // duplicate it where needed. + // ----------------------------------------------- + (*preserve*) reg [DEPTH-1:0] altera_reset_synchronizer_int_chain; + reg altera_reset_synchronizer_int_chain_out; + + generate if (ASYNC_RESET) begin + + // ----------------------------------------------- + // Assert asynchronously, deassert synchronously. + // ----------------------------------------------- + always @(posedge clk or posedge reset_in) begin + if (reset_in) begin + altera_reset_synchronizer_int_chain <= {DEPTH{1'b1}}; + altera_reset_synchronizer_int_chain_out <= 1'b1; + end + else begin + altera_reset_synchronizer_int_chain[DEPTH-2:0] <= altera_reset_synchronizer_int_chain[DEPTH-1:1]; + altera_reset_synchronizer_int_chain[DEPTH-1] <= 0; + altera_reset_synchronizer_int_chain_out <= altera_reset_synchronizer_int_chain[0]; + end + end + + assign reset_out = altera_reset_synchronizer_int_chain_out; + + end else begin + + // ----------------------------------------------- + // Assert synchronously, deassert synchronously. + // ----------------------------------------------- + always @(posedge clk) begin + altera_reset_synchronizer_int_chain[DEPTH-2:0] <= altera_reset_synchronizer_int_chain[DEPTH-1:1]; + altera_reset_synchronizer_int_chain[DEPTH-1] <= reset_in; + altera_reset_synchronizer_int_chain_out <= altera_reset_synchronizer_int_chain[0]; + end + + assign reset_out = altera_reset_synchronizer_int_chain_out; + + end + endgenerate + +endmodule + diff --git a/Top/niosII/synthesis/submodules/dec.sv b/Top/niosII/synthesis/submodules/dec.sv new file mode 100644 index 0000000..93e7541 --- /dev/null +++ b/Top/niosII/synthesis/submodules/dec.sv @@ -0,0 +1,132 @@ +module dec +#(m = 8) +( + //clock and reset + input logic clk, clrn, + //control slave + input logic ctl_wr, ctl_rd, + input logic ctl_addr, + input logic [31:0] ctl_wrdata, + output logic [31:0] ctl_rddata, + //memory slave + input logic ram_wr, + input logic [1:0] ram_addr, + input logic [31:0] ram_wrdata, + //external ports + input logic train, + output logic red, yellow, green +); + + logic run; + logic [1:0] divider; + + logic [m-1:0] divisor; + logic [1:0] contr; + logic [2:0] colors; + logic [m-1:0] cntdiv; + logic enacnt; + + //control slave logic + always_ff @ (posedge clk or negedge clrn) + begin + if (!clrn) + begin + run <= 0; + divider <= 0; + end + else + begin + if (ctl_wr) + begin + case (ctl_addr) + 1'b0: run <= ctl_wrdata[0]; + 1'b1: divider <= ctl_wrdata[1:0]; + endcase + end + end + end + + always_comb + begin + case (ctl_addr) + 1'b0: ctl_rddata = {31'b0,run}; + 1'b1: ctl_rddata = {30'b0,divider}; + default: ctl_rddata = 'bx; + endcase + end + + //semaphore logic + + always_ff @ (posedge clk or negedge clrn) + begin + if (!clrn) cntdiv<=0; + else + begin + if (train | ~run) cntdiv<=0; + else + begin + if (enacnt) cntdiv<=0; + else cntdiv<=cntdiv+1; + end + end + end + + always_comb + begin + enacnt=(cntdiv==divisor); + end + + always_ff @ (posedge clk or negedge clrn) + begin + if (!clrn) + begin + colors <= 3'b100; + end + else + begin + if (train | ~run) + begin + colors <= 3'b100; + end + else + begin + if (enacnt) + begin + case (colors) + 3'b100: colors <= 3'b010; + 3'b010: colors <= 3'b011; + 3'b011: colors <= 3'b001; + 3'b001: colors <= 3'b001; + default: colors <= 3'b100; + endcase + end + end + end + end + + always_comb + begin + case (colors) + 3'b100: contr = 2'b00; + 3'b010: contr = 2'b01; + 3'b011: contr = 2'b10; + 3'b001: contr = 2'b11; + default : contr = 2'b00; + endcase + end + + assign red = colors[2]; + assign yellow = colors[1]; + assign green = colors[0]; + + periodram b2v_inst3( + .clock(clk), + .data (ram_wrdata), + .wraddress (ram_addr), + .wren (ram_wr), + .rdaddress({divider,contr}), + .q(divisor) + ); + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_cpu.v b/Top/niosII/synthesis/submodules/niosII_cpu.v new file mode 100644 index 0000000..5c0d61e --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_cpu.v @@ -0,0 +1,67 @@ +// niosII_cpu.v + +// This file was auto-generated from altera_nios2_hw.tcl. If you edit it your changes +// will probably be lost. +// +// Generated using ACDS version 18.1 625 + +`timescale 1 ps / 1 ps +module niosII_cpu ( + input wire clk, // clk.clk + input wire reset_n, // reset.reset_n + input wire reset_req, // .reset_req + output wire [17:0] d_address, // data_master.address + output wire [3:0] d_byteenable, // .byteenable + output wire d_read, // .read + input wire [31:0] d_readdata, // .readdata + input wire d_waitrequest, // .waitrequest + output wire d_write, // .write + output wire [31:0] d_writedata, // .writedata + output wire debug_mem_slave_debugaccess_to_roms, // .debugaccess + output wire [17:0] i_address, // instruction_master.address + output wire i_read, // .read + input wire [31:0] i_readdata, // .readdata + input wire i_waitrequest, // .waitrequest + input wire [31:0] irq, // irq.irq + output wire debug_reset_request, // debug_reset_request.reset + input wire [8:0] debug_mem_slave_address, // debug_mem_slave.address + input wire [3:0] debug_mem_slave_byteenable, // .byteenable + input wire debug_mem_slave_debugaccess, // .debugaccess + input wire debug_mem_slave_read, // .read + output wire [31:0] debug_mem_slave_readdata, // .readdata + output wire debug_mem_slave_waitrequest, // .waitrequest + input wire debug_mem_slave_write, // .write + input wire [31:0] debug_mem_slave_writedata, // .writedata + output wire dummy_ci_port // custom_instruction_master.readra + ); + + niosII_cpu_cpu cpu ( + .clk (clk), // clk.clk + .reset_n (reset_n), // reset.reset_n + .reset_req (reset_req), // .reset_req + .d_address (d_address), // data_master.address + .d_byteenable (d_byteenable), // .byteenable + .d_read (d_read), // .read + .d_readdata (d_readdata), // .readdata + .d_waitrequest (d_waitrequest), // .waitrequest + .d_write (d_write), // .write + .d_writedata (d_writedata), // .writedata + .debug_mem_slave_debugaccess_to_roms (debug_mem_slave_debugaccess_to_roms), // .debugaccess + .i_address (i_address), // instruction_master.address + .i_read (i_read), // .read + .i_readdata (i_readdata), // .readdata + .i_waitrequest (i_waitrequest), // .waitrequest + .irq (irq), // irq.irq + .debug_reset_request (debug_reset_request), // debug_reset_request.reset + .debug_mem_slave_address (debug_mem_slave_address), // debug_mem_slave.address + .debug_mem_slave_byteenable (debug_mem_slave_byteenable), // .byteenable + .debug_mem_slave_debugaccess (debug_mem_slave_debugaccess), // .debugaccess + .debug_mem_slave_read (debug_mem_slave_read), // .read + .debug_mem_slave_readdata (debug_mem_slave_readdata), // .readdata + .debug_mem_slave_waitrequest (debug_mem_slave_waitrequest), // .waitrequest + .debug_mem_slave_write (debug_mem_slave_write), // .write + .debug_mem_slave_writedata (debug_mem_slave_writedata), // .writedata + .dummy_ci_port (dummy_ci_port) // custom_instruction_master.readra + ); + +endmodule diff --git a/Top/niosII/synthesis/submodules/niosII_cpu_cpu.sdc b/Top/niosII/synthesis/submodules/niosII_cpu_cpu.sdc new file mode 100644 index 0000000..ffa3eff --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_cpu_cpu.sdc @@ -0,0 +1,53 @@ +# Legal Notice: (C)2022 Altera Corporation. All rights reserved. Your +# use of Altera Corporation's design tools, logic functions and other +# software and tools, and its AMPP partner logic functions, and any +# output files any of the foregoing (including device programming or +# simulation files), and any associated documentation or information are +# expressly subject to the terms and conditions of the Altera Program +# License Subscription Agreement or other applicable license agreement, +# including, without limitation, that your use is for the sole purpose +# of programming logic devices manufactured by Altera and sold by Altera +# or its authorized distributors. Please refer to the applicable +# agreement for further details. + +#************************************************************** +# Timequest JTAG clock definition +# Uncommenting the following lines will define the JTAG +# clock in TimeQuest Timing Analyzer +#************************************************************** + +#create_clock -period 10MHz {altera_reserved_tck} +#set_clock_groups -asynchronous -group {altera_reserved_tck} + +#************************************************************** +# Set TCL Path Variables +#************************************************************** + +set niosII_cpu_cpu niosII_cpu_cpu:* +set niosII_cpu_cpu_oci niosII_cpu_cpu_nios2_oci:the_niosII_cpu_cpu_nios2_oci +set niosII_cpu_cpu_oci_break niosII_cpu_cpu_nios2_oci_break:the_niosII_cpu_cpu_nios2_oci_break +set niosII_cpu_cpu_ocimem niosII_cpu_cpu_nios2_ocimem:the_niosII_cpu_cpu_nios2_ocimem +set niosII_cpu_cpu_oci_debug niosII_cpu_cpu_nios2_oci_debug:the_niosII_cpu_cpu_nios2_oci_debug +set niosII_cpu_cpu_wrapper niosII_cpu_cpu_debug_slave_wrapper:the_niosII_cpu_cpu_debug_slave_wrapper +set niosII_cpu_cpu_jtag_tck niosII_cpu_cpu_debug_slave_tck:the_niosII_cpu_cpu_debug_slave_tck +set niosII_cpu_cpu_jtag_sysclk niosII_cpu_cpu_debug_slave_sysclk:the_niosII_cpu_cpu_debug_slave_sysclk +set niosII_cpu_cpu_oci_path [format "%s|%s" $niosII_cpu_cpu $niosII_cpu_cpu_oci] +set niosII_cpu_cpu_oci_break_path [format "%s|%s" $niosII_cpu_cpu_oci_path $niosII_cpu_cpu_oci_break] +set niosII_cpu_cpu_ocimem_path [format "%s|%s" $niosII_cpu_cpu_oci_path $niosII_cpu_cpu_ocimem] +set niosII_cpu_cpu_oci_debug_path [format "%s|%s" $niosII_cpu_cpu_oci_path $niosII_cpu_cpu_oci_debug] +set niosII_cpu_cpu_jtag_tck_path [format "%s|%s|%s" $niosII_cpu_cpu_oci_path $niosII_cpu_cpu_wrapper $niosII_cpu_cpu_jtag_tck] +set niosII_cpu_cpu_jtag_sysclk_path [format "%s|%s|%s" $niosII_cpu_cpu_oci_path $niosII_cpu_cpu_wrapper $niosII_cpu_cpu_jtag_sysclk] +set niosII_cpu_cpu_jtag_sr [format "%s|*sr" $niosII_cpu_cpu_jtag_tck_path] + +#************************************************************** +# Set False Paths +#************************************************************** + +set_false_path -from [get_keepers *$niosII_cpu_cpu_oci_break_path|break_readreg*] -to [get_keepers *$niosII_cpu_cpu_jtag_sr*] +set_false_path -from [get_keepers *$niosII_cpu_cpu_oci_debug_path|*resetlatch] -to [get_keepers *$niosII_cpu_cpu_jtag_sr[33]] +set_false_path -from [get_keepers *$niosII_cpu_cpu_oci_debug_path|monitor_ready] -to [get_keepers *$niosII_cpu_cpu_jtag_sr[0]] +set_false_path -from [get_keepers *$niosII_cpu_cpu_oci_debug_path|monitor_error] -to [get_keepers *$niosII_cpu_cpu_jtag_sr[34]] +set_false_path -from [get_keepers *$niosII_cpu_cpu_ocimem_path|*MonDReg*] -to [get_keepers *$niosII_cpu_cpu_jtag_sr*] +set_false_path -from *$niosII_cpu_cpu_jtag_sr* -to *$niosII_cpu_cpu_jtag_sysclk_path|*jdo* +set_false_path -from sld_hub:*|irf_reg* -to *$niosII_cpu_cpu_jtag_sysclk_path|ir* +set_false_path -from sld_hub:*|sld_shadow_jsm:shadow_jsm|state[1] -to *$niosII_cpu_cpu_oci_debug_path|monitor_go diff --git a/Top/niosII/synthesis/submodules/niosII_cpu_cpu.v b/Top/niosII/synthesis/submodules/niosII_cpu_cpu.v new file mode 100644 index 0000000..a9765e0 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_cpu_cpu.v @@ -0,0 +1,5658 @@ +//Legal Notice: (C)2022 Altera Corporation. All rights reserved. Your +//use of Altera Corporation's design tools, logic functions and other +//software and tools, and its AMPP partner logic functions, and any +//output files any of the foregoing (including device programming or +//simulation files), and any associated documentation or information are +//expressly subject to the terms and conditions of the Altera Program +//License Subscription Agreement or other applicable license agreement, +//including, without limitation, that your use is for the sole purpose +//of programming logic devices manufactured by Altera and sold by Altera +//or its authorized distributors. Please refer to the applicable +//agreement for further details. + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_register_bank_a_module ( + // inputs: + clock, + data, + rdaddress, + wraddress, + wren, + + // outputs: + q + ) +; + + parameter lpm_file = "UNUSED"; + + + output [ 31: 0] q; + input clock; + input [ 31: 0] data; + input [ 4: 0] rdaddress; + input [ 4: 0] wraddress; + input wren; + + +wire [ 31: 0] q; +wire [ 31: 0] ram_data; +wire [ 31: 0] ram_q; + assign q = ram_q; + assign ram_data = data; + altsyncram the_altsyncram + ( + .address_a (wraddress), + .address_b (rdaddress), + .clock0 (clock), + .data_a (ram_data), + .q_b (ram_q), + .wren_a (wren) + ); + + defparam the_altsyncram.address_reg_b = "CLOCK0", + the_altsyncram.init_file = lpm_file, + the_altsyncram.maximum_depth = 0, + the_altsyncram.numwords_a = 32, + the_altsyncram.numwords_b = 32, + the_altsyncram.operation_mode = "DUAL_PORT", + the_altsyncram.outdata_reg_b = "UNREGISTERED", + the_altsyncram.ram_block_type = "AUTO", + the_altsyncram.rdcontrol_reg_b = "CLOCK0", + the_altsyncram.read_during_write_mode_mixed_ports = "DONT_CARE", + the_altsyncram.width_a = 32, + the_altsyncram.width_b = 32, + the_altsyncram.widthad_a = 5, + the_altsyncram.widthad_b = 5; + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_register_bank_b_module ( + // inputs: + clock, + data, + rdaddress, + wraddress, + wren, + + // outputs: + q + ) +; + + parameter lpm_file = "UNUSED"; + + + output [ 31: 0] q; + input clock; + input [ 31: 0] data; + input [ 4: 0] rdaddress; + input [ 4: 0] wraddress; + input wren; + + +wire [ 31: 0] q; +wire [ 31: 0] ram_data; +wire [ 31: 0] ram_q; + assign q = ram_q; + assign ram_data = data; + altsyncram the_altsyncram + ( + .address_a (wraddress), + .address_b (rdaddress), + .clock0 (clock), + .data_a (ram_data), + .q_b (ram_q), + .wren_a (wren) + ); + + defparam the_altsyncram.address_reg_b = "CLOCK0", + the_altsyncram.init_file = lpm_file, + the_altsyncram.maximum_depth = 0, + the_altsyncram.numwords_a = 32, + the_altsyncram.numwords_b = 32, + the_altsyncram.operation_mode = "DUAL_PORT", + the_altsyncram.outdata_reg_b = "UNREGISTERED", + the_altsyncram.ram_block_type = "AUTO", + the_altsyncram.rdcontrol_reg_b = "CLOCK0", + the_altsyncram.read_during_write_mode_mixed_ports = "DONT_CARE", + the_altsyncram.width_a = 32, + the_altsyncram.width_b = 32, + the_altsyncram.widthad_a = 5, + the_altsyncram.widthad_b = 5; + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_debug ( + // inputs: + clk, + dbrk_break, + debugreq, + hbreak_enabled, + jdo, + jrst_n, + ocireg_ers, + ocireg_mrs, + reset, + st_ready_test_idle, + take_action_ocimem_a, + take_action_ocireg, + xbrk_break, + + // outputs: + debugack, + monitor_error, + monitor_go, + monitor_ready, + oci_hbreak_req, + resetlatch, + resetrequest + ) +; + + output debugack; + output monitor_error; + output monitor_go; + output monitor_ready; + output oci_hbreak_req; + output resetlatch; + output resetrequest; + input clk; + input dbrk_break; + input debugreq; + input hbreak_enabled; + input [ 37: 0] jdo; + input jrst_n; + input ocireg_ers; + input ocireg_mrs; + input reset; + input st_ready_test_idle; + input take_action_ocimem_a; + input take_action_ocireg; + input xbrk_break; + + +reg break_on_reset /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; +wire debugack; +reg jtag_break /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; +reg monitor_error /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=D101" */; +reg monitor_go /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=D101" */; +reg monitor_ready /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=D101" */; +wire oci_hbreak_req; +wire reset_sync; +reg resetlatch /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; +reg resetrequest /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; +wire unxcomplemented_resetxx0; + assign unxcomplemented_resetxx0 = jrst_n; + altera_std_synchronizer the_altera_std_synchronizer + ( + .clk (clk), + .din (reset), + .dout (reset_sync), + .reset_n (unxcomplemented_resetxx0) + ); + + defparam the_altera_std_synchronizer.depth = 2; + + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + begin + resetrequest <= 1'b0; + break_on_reset <= 1'b0; + jtag_break <= 1'b0; + end + else if (take_action_ocimem_a) + begin + resetrequest <= jdo[22]; + jtag_break <= jdo[21] ? 1 + : jdo[20] ? 0 + : jtag_break; + + break_on_reset <= jdo[19] ? 1 + : jdo[18] ? 0 + : break_on_reset; + + resetlatch <= jdo[24] ? 0 : resetlatch; + end + else if (reset_sync) + begin + jtag_break <= break_on_reset; + resetlatch <= 1; + end + else if (debugreq & ~debugack & break_on_reset) + jtag_break <= 1'b1; + end + + + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + begin + monitor_ready <= 1'b0; + monitor_error <= 1'b0; + monitor_go <= 1'b0; + end + else + begin + if (take_action_ocimem_a && jdo[25]) + monitor_ready <= 1'b0; + else if (take_action_ocireg && ocireg_mrs) + monitor_ready <= 1'b1; + if (take_action_ocimem_a && jdo[25]) + monitor_error <= 1'b0; + else if (take_action_ocireg && ocireg_ers) + monitor_error <= 1'b1; + if (take_action_ocimem_a && jdo[23]) + monitor_go <= 1'b1; + else if (st_ready_test_idle) + monitor_go <= 1'b0; + end + end + + + assign oci_hbreak_req = jtag_break | dbrk_break | xbrk_break | debugreq; + assign debugack = ~hbreak_enabled; + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_break ( + // inputs: + clk, + dbrk_break, + dbrk_goto0, + dbrk_goto1, + jdo, + jrst_n, + take_action_break_a, + take_action_break_b, + take_action_break_c, + take_no_action_break_a, + take_no_action_break_b, + take_no_action_break_c, + xbrk_goto0, + xbrk_goto1, + + // outputs: + break_readreg, + dbrk_hit0_latch, + dbrk_hit1_latch, + dbrk_hit2_latch, + dbrk_hit3_latch, + trigbrktype, + trigger_state_0, + trigger_state_1, + xbrk_ctrl0, + xbrk_ctrl1, + xbrk_ctrl2, + xbrk_ctrl3 + ) +; + + output [ 31: 0] break_readreg; + output dbrk_hit0_latch; + output dbrk_hit1_latch; + output dbrk_hit2_latch; + output dbrk_hit3_latch; + output trigbrktype; + output trigger_state_0; + output trigger_state_1; + output [ 7: 0] xbrk_ctrl0; + output [ 7: 0] xbrk_ctrl1; + output [ 7: 0] xbrk_ctrl2; + output [ 7: 0] xbrk_ctrl3; + input clk; + input dbrk_break; + input dbrk_goto0; + input dbrk_goto1; + input [ 37: 0] jdo; + input jrst_n; + input take_action_break_a; + input take_action_break_b; + input take_action_break_c; + input take_no_action_break_a; + input take_no_action_break_b; + input take_no_action_break_c; + input xbrk_goto0; + input xbrk_goto1; + + +wire [ 3: 0] break_a_wpr; +wire [ 1: 0] break_a_wpr_high_bits; +wire [ 1: 0] break_a_wpr_low_bits; +wire [ 1: 0] break_b_rr; +wire [ 1: 0] break_c_rr; +reg [ 31: 0] break_readreg /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; +wire dbrk0_high_value; +wire dbrk0_low_value; +wire dbrk1_high_value; +wire dbrk1_low_value; +wire dbrk2_high_value; +wire dbrk2_low_value; +wire dbrk3_high_value; +wire dbrk3_low_value; +wire dbrk_hit0_latch; +wire dbrk_hit1_latch; +wire dbrk_hit2_latch; +wire dbrk_hit3_latch; +wire take_action_any_break; +reg trigbrktype /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; +reg trigger_state; +wire trigger_state_0; +wire trigger_state_1; +wire [ 31: 0] xbrk0_value; +wire [ 31: 0] xbrk1_value; +wire [ 31: 0] xbrk2_value; +wire [ 31: 0] xbrk3_value; +reg [ 7: 0] xbrk_ctrl0 /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; +reg [ 7: 0] xbrk_ctrl1 /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; +reg [ 7: 0] xbrk_ctrl2 /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; +reg [ 7: 0] xbrk_ctrl3 /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; + assign break_a_wpr = jdo[35 : 32]; + assign break_a_wpr_high_bits = break_a_wpr[3 : 2]; + assign break_a_wpr_low_bits = break_a_wpr[1 : 0]; + assign break_b_rr = jdo[33 : 32]; + assign break_c_rr = jdo[33 : 32]; + assign take_action_any_break = take_action_break_a | take_action_break_b | take_action_break_c; + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + begin + xbrk_ctrl0 <= 0; + xbrk_ctrl1 <= 0; + xbrk_ctrl2 <= 0; + xbrk_ctrl3 <= 0; + trigbrktype <= 0; + end + else + begin + if (take_action_any_break) + trigbrktype <= 0; + else if (dbrk_break) + trigbrktype <= 1; + if (take_action_break_b) + begin + if ((break_b_rr == 2'b00) && (0 >= 1)) + begin + xbrk_ctrl0[0] <= jdo[27]; + xbrk_ctrl0[1] <= jdo[28]; + xbrk_ctrl0[2] <= jdo[29]; + xbrk_ctrl0[3] <= jdo[30]; + xbrk_ctrl0[4] <= jdo[21]; + xbrk_ctrl0[5] <= jdo[20]; + xbrk_ctrl0[6] <= jdo[19]; + xbrk_ctrl0[7] <= jdo[18]; + end + if ((break_b_rr == 2'b01) && (0 >= 2)) + begin + xbrk_ctrl1[0] <= jdo[27]; + xbrk_ctrl1[1] <= jdo[28]; + xbrk_ctrl1[2] <= jdo[29]; + xbrk_ctrl1[3] <= jdo[30]; + xbrk_ctrl1[4] <= jdo[21]; + xbrk_ctrl1[5] <= jdo[20]; + xbrk_ctrl1[6] <= jdo[19]; + xbrk_ctrl1[7] <= jdo[18]; + end + if ((break_b_rr == 2'b10) && (0 >= 3)) + begin + xbrk_ctrl2[0] <= jdo[27]; + xbrk_ctrl2[1] <= jdo[28]; + xbrk_ctrl2[2] <= jdo[29]; + xbrk_ctrl2[3] <= jdo[30]; + xbrk_ctrl2[4] <= jdo[21]; + xbrk_ctrl2[5] <= jdo[20]; + xbrk_ctrl2[6] <= jdo[19]; + xbrk_ctrl2[7] <= jdo[18]; + end + if ((break_b_rr == 2'b11) && (0 >= 4)) + begin + xbrk_ctrl3[0] <= jdo[27]; + xbrk_ctrl3[1] <= jdo[28]; + xbrk_ctrl3[2] <= jdo[29]; + xbrk_ctrl3[3] <= jdo[30]; + xbrk_ctrl3[4] <= jdo[21]; + xbrk_ctrl3[5] <= jdo[20]; + xbrk_ctrl3[6] <= jdo[19]; + xbrk_ctrl3[7] <= jdo[18]; + end + end + end + end + + + assign dbrk_hit0_latch = 1'b0; + assign dbrk0_low_value = 0; + assign dbrk0_high_value = 0; + assign dbrk_hit1_latch = 1'b0; + assign dbrk1_low_value = 0; + assign dbrk1_high_value = 0; + assign dbrk_hit2_latch = 1'b0; + assign dbrk2_low_value = 0; + assign dbrk2_high_value = 0; + assign dbrk_hit3_latch = 1'b0; + assign dbrk3_low_value = 0; + assign dbrk3_high_value = 0; + assign xbrk0_value = 32'b0; + assign xbrk1_value = 32'b0; + assign xbrk2_value = 32'b0; + assign xbrk3_value = 32'b0; + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + break_readreg <= 32'b0; + else if (take_action_any_break) + break_readreg <= jdo[31 : 0]; + else if (take_no_action_break_a) + case (break_a_wpr_high_bits) + + 2'd0: begin + case (break_a_wpr_low_bits) // synthesis full_case + + 2'd0: begin + break_readreg <= xbrk0_value; + end // 2'd0 + + 2'd1: begin + break_readreg <= xbrk1_value; + end // 2'd1 + + 2'd2: begin + break_readreg <= xbrk2_value; + end // 2'd2 + + 2'd3: begin + break_readreg <= xbrk3_value; + end // 2'd3 + + endcase // break_a_wpr_low_bits + end // 2'd0 + + 2'd1: begin + break_readreg <= 32'b0; + end // 2'd1 + + 2'd2: begin + case (break_a_wpr_low_bits) // synthesis full_case + + 2'd0: begin + break_readreg <= dbrk0_low_value; + end // 2'd0 + + 2'd1: begin + break_readreg <= dbrk1_low_value; + end // 2'd1 + + 2'd2: begin + break_readreg <= dbrk2_low_value; + end // 2'd2 + + 2'd3: begin + break_readreg <= dbrk3_low_value; + end // 2'd3 + + endcase // break_a_wpr_low_bits + end // 2'd2 + + 2'd3: begin + case (break_a_wpr_low_bits) // synthesis full_case + + 2'd0: begin + break_readreg <= dbrk0_high_value; + end // 2'd0 + + 2'd1: begin + break_readreg <= dbrk1_high_value; + end // 2'd1 + + 2'd2: begin + break_readreg <= dbrk2_high_value; + end // 2'd2 + + 2'd3: begin + break_readreg <= dbrk3_high_value; + end // 2'd3 + + endcase // break_a_wpr_low_bits + end // 2'd3 + + endcase // break_a_wpr_high_bits + else if (take_no_action_break_b) + break_readreg <= jdo[31 : 0]; + else if (take_no_action_break_c) + break_readreg <= jdo[31 : 0]; + end + + + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + trigger_state <= 0; + else if (trigger_state_1 & (xbrk_goto0 | dbrk_goto0)) + trigger_state <= 0; + else if (trigger_state_0 & (xbrk_goto1 | dbrk_goto1)) + trigger_state <= -1; + end + + + assign trigger_state_0 = ~trigger_state; + assign trigger_state_1 = trigger_state; + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_xbrk ( + // inputs: + D_valid, + E_valid, + F_pc, + clk, + reset_n, + trigger_state_0, + trigger_state_1, + xbrk_ctrl0, + xbrk_ctrl1, + xbrk_ctrl2, + xbrk_ctrl3, + + // outputs: + xbrk_break, + xbrk_goto0, + xbrk_goto1, + xbrk_traceoff, + xbrk_traceon, + xbrk_trigout + ) +; + + output xbrk_break; + output xbrk_goto0; + output xbrk_goto1; + output xbrk_traceoff; + output xbrk_traceon; + output xbrk_trigout; + input D_valid; + input E_valid; + input [ 15: 0] F_pc; + input clk; + input reset_n; + input trigger_state_0; + input trigger_state_1; + input [ 7: 0] xbrk_ctrl0; + input [ 7: 0] xbrk_ctrl1; + input [ 7: 0] xbrk_ctrl2; + input [ 7: 0] xbrk_ctrl3; + + +wire D_cpu_addr_en; +wire E_cpu_addr_en; +reg E_xbrk_goto0; +reg E_xbrk_goto1; +reg E_xbrk_traceoff; +reg E_xbrk_traceon; +reg E_xbrk_trigout; +wire [ 17: 0] cpu_i_address; +wire xbrk0_armed; +wire xbrk0_break_hit; +wire xbrk0_goto0_hit; +wire xbrk0_goto1_hit; +wire xbrk0_toff_hit; +wire xbrk0_ton_hit; +wire xbrk0_tout_hit; +wire xbrk1_armed; +wire xbrk1_break_hit; +wire xbrk1_goto0_hit; +wire xbrk1_goto1_hit; +wire xbrk1_toff_hit; +wire xbrk1_ton_hit; +wire xbrk1_tout_hit; +wire xbrk2_armed; +wire xbrk2_break_hit; +wire xbrk2_goto0_hit; +wire xbrk2_goto1_hit; +wire xbrk2_toff_hit; +wire xbrk2_ton_hit; +wire xbrk2_tout_hit; +wire xbrk3_armed; +wire xbrk3_break_hit; +wire xbrk3_goto0_hit; +wire xbrk3_goto1_hit; +wire xbrk3_toff_hit; +wire xbrk3_ton_hit; +wire xbrk3_tout_hit; +reg xbrk_break; +wire xbrk_break_hit; +wire xbrk_goto0; +wire xbrk_goto0_hit; +wire xbrk_goto1; +wire xbrk_goto1_hit; +wire xbrk_toff_hit; +wire xbrk_ton_hit; +wire xbrk_tout_hit; +wire xbrk_traceoff; +wire xbrk_traceon; +wire xbrk_trigout; + assign cpu_i_address = {F_pc, 2'b00}; + assign D_cpu_addr_en = D_valid; + assign E_cpu_addr_en = E_valid; + assign xbrk0_break_hit = 0; + assign xbrk0_ton_hit = 0; + assign xbrk0_toff_hit = 0; + assign xbrk0_tout_hit = 0; + assign xbrk0_goto0_hit = 0; + assign xbrk0_goto1_hit = 0; + assign xbrk1_break_hit = 0; + assign xbrk1_ton_hit = 0; + assign xbrk1_toff_hit = 0; + assign xbrk1_tout_hit = 0; + assign xbrk1_goto0_hit = 0; + assign xbrk1_goto1_hit = 0; + assign xbrk2_break_hit = 0; + assign xbrk2_ton_hit = 0; + assign xbrk2_toff_hit = 0; + assign xbrk2_tout_hit = 0; + assign xbrk2_goto0_hit = 0; + assign xbrk2_goto1_hit = 0; + assign xbrk3_break_hit = 0; + assign xbrk3_ton_hit = 0; + assign xbrk3_toff_hit = 0; + assign xbrk3_tout_hit = 0; + assign xbrk3_goto0_hit = 0; + assign xbrk3_goto1_hit = 0; + assign xbrk_break_hit = (xbrk0_break_hit) | (xbrk1_break_hit) | (xbrk2_break_hit) | (xbrk3_break_hit); + assign xbrk_ton_hit = (xbrk0_ton_hit) | (xbrk1_ton_hit) | (xbrk2_ton_hit) | (xbrk3_ton_hit); + assign xbrk_toff_hit = (xbrk0_toff_hit) | (xbrk1_toff_hit) | (xbrk2_toff_hit) | (xbrk3_toff_hit); + assign xbrk_tout_hit = (xbrk0_tout_hit) | (xbrk1_tout_hit) | (xbrk2_tout_hit) | (xbrk3_tout_hit); + assign xbrk_goto0_hit = (xbrk0_goto0_hit) | (xbrk1_goto0_hit) | (xbrk2_goto0_hit) | (xbrk3_goto0_hit); + assign xbrk_goto1_hit = (xbrk0_goto1_hit) | (xbrk1_goto1_hit) | (xbrk2_goto1_hit) | (xbrk3_goto1_hit); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + xbrk_break <= 0; + else if (E_cpu_addr_en) + xbrk_break <= xbrk_break_hit; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_xbrk_traceon <= 0; + else if (E_cpu_addr_en) + E_xbrk_traceon <= xbrk_ton_hit; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_xbrk_traceoff <= 0; + else if (E_cpu_addr_en) + E_xbrk_traceoff <= xbrk_toff_hit; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_xbrk_trigout <= 0; + else if (E_cpu_addr_en) + E_xbrk_trigout <= xbrk_tout_hit; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_xbrk_goto0 <= 0; + else if (E_cpu_addr_en) + E_xbrk_goto0 <= xbrk_goto0_hit; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_xbrk_goto1 <= 0; + else if (E_cpu_addr_en) + E_xbrk_goto1 <= xbrk_goto1_hit; + end + + + assign xbrk_traceon = 1'b0; + assign xbrk_traceoff = 1'b0; + assign xbrk_trigout = 1'b0; + assign xbrk_goto0 = 1'b0; + assign xbrk_goto1 = 1'b0; + assign xbrk0_armed = (xbrk_ctrl0[4] & trigger_state_0) || + (xbrk_ctrl0[5] & trigger_state_1); + + assign xbrk1_armed = (xbrk_ctrl1[4] & trigger_state_0) || + (xbrk_ctrl1[5] & trigger_state_1); + + assign xbrk2_armed = (xbrk_ctrl2[4] & trigger_state_0) || + (xbrk_ctrl2[5] & trigger_state_1); + + assign xbrk3_armed = (xbrk_ctrl3[4] & trigger_state_0) || + (xbrk_ctrl3[5] & trigger_state_1); + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_dbrk ( + // inputs: + E_st_data, + av_ld_data_aligned_filtered, + clk, + d_address, + d_read, + d_waitrequest, + d_write, + debugack, + reset_n, + + // outputs: + cpu_d_address, + cpu_d_read, + cpu_d_readdata, + cpu_d_wait, + cpu_d_write, + cpu_d_writedata, + dbrk_break, + dbrk_goto0, + dbrk_goto1, + dbrk_traceme, + dbrk_traceoff, + dbrk_traceon, + dbrk_trigout + ) +; + + output [ 17: 0] cpu_d_address; + output cpu_d_read; + output [ 31: 0] cpu_d_readdata; + output cpu_d_wait; + output cpu_d_write; + output [ 31: 0] cpu_d_writedata; + output dbrk_break; + output dbrk_goto0; + output dbrk_goto1; + output dbrk_traceme; + output dbrk_traceoff; + output dbrk_traceon; + output dbrk_trigout; + input [ 31: 0] E_st_data; + input [ 31: 0] av_ld_data_aligned_filtered; + input clk; + input [ 17: 0] d_address; + input d_read; + input d_waitrequest; + input d_write; + input debugack; + input reset_n; + + +wire [ 17: 0] cpu_d_address; +wire cpu_d_read; +wire [ 31: 0] cpu_d_readdata; +wire cpu_d_wait; +wire cpu_d_write; +wire [ 31: 0] cpu_d_writedata; +wire dbrk0_armed; +wire dbrk0_break_pulse; +wire dbrk0_goto0; +wire dbrk0_goto1; +wire dbrk0_traceme; +wire dbrk0_traceoff; +wire dbrk0_traceon; +wire dbrk0_trigout; +wire dbrk1_armed; +wire dbrk1_break_pulse; +wire dbrk1_goto0; +wire dbrk1_goto1; +wire dbrk1_traceme; +wire dbrk1_traceoff; +wire dbrk1_traceon; +wire dbrk1_trigout; +wire dbrk2_armed; +wire dbrk2_break_pulse; +wire dbrk2_goto0; +wire dbrk2_goto1; +wire dbrk2_traceme; +wire dbrk2_traceoff; +wire dbrk2_traceon; +wire dbrk2_trigout; +wire dbrk3_armed; +wire dbrk3_break_pulse; +wire dbrk3_goto0; +wire dbrk3_goto1; +wire dbrk3_traceme; +wire dbrk3_traceoff; +wire dbrk3_traceon; +wire dbrk3_trigout; +reg dbrk_break; +reg dbrk_break_pulse; +wire [ 31: 0] dbrk_data; +reg dbrk_goto0; +reg dbrk_goto1; +reg dbrk_traceme; +reg dbrk_traceoff; +reg dbrk_traceon; +reg dbrk_trigout; + assign cpu_d_address = d_address; + assign cpu_d_readdata = av_ld_data_aligned_filtered; + assign cpu_d_read = d_read; + assign cpu_d_writedata = E_st_data; + assign cpu_d_write = d_write; + assign cpu_d_wait = d_waitrequest; + assign dbrk_data = cpu_d_write ? cpu_d_writedata : cpu_d_readdata; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + dbrk_break <= 0; + else + dbrk_break <= dbrk_break ? ~debugack + : dbrk_break_pulse; + + end + + + assign dbrk0_armed = 1'b0; + assign dbrk0_trigout = 1'b0; + assign dbrk0_break_pulse = 1'b0; + assign dbrk0_traceoff = 1'b0; + assign dbrk0_traceon = 1'b0; + assign dbrk0_traceme = 1'b0; + assign dbrk0_goto0 = 1'b0; + assign dbrk0_goto1 = 1'b0; + assign dbrk1_armed = 1'b0; + assign dbrk1_trigout = 1'b0; + assign dbrk1_break_pulse = 1'b0; + assign dbrk1_traceoff = 1'b0; + assign dbrk1_traceon = 1'b0; + assign dbrk1_traceme = 1'b0; + assign dbrk1_goto0 = 1'b0; + assign dbrk1_goto1 = 1'b0; + assign dbrk2_armed = 1'b0; + assign dbrk2_trigout = 1'b0; + assign dbrk2_break_pulse = 1'b0; + assign dbrk2_traceoff = 1'b0; + assign dbrk2_traceon = 1'b0; + assign dbrk2_traceme = 1'b0; + assign dbrk2_goto0 = 1'b0; + assign dbrk2_goto1 = 1'b0; + assign dbrk3_armed = 1'b0; + assign dbrk3_trigout = 1'b0; + assign dbrk3_break_pulse = 1'b0; + assign dbrk3_traceoff = 1'b0; + assign dbrk3_traceon = 1'b0; + assign dbrk3_traceme = 1'b0; + assign dbrk3_goto0 = 1'b0; + assign dbrk3_goto1 = 1'b0; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + begin + dbrk_trigout <= 0; + dbrk_break_pulse <= 0; + dbrk_traceoff <= 0; + dbrk_traceon <= 0; + dbrk_traceme <= 0; + dbrk_goto0 <= 0; + dbrk_goto1 <= 0; + end + else + begin + dbrk_trigout <= dbrk0_trigout | dbrk1_trigout | dbrk2_trigout | dbrk3_trigout; + dbrk_break_pulse <= dbrk0_break_pulse | dbrk1_break_pulse | dbrk2_break_pulse | dbrk3_break_pulse; + dbrk_traceoff <= dbrk0_traceoff | dbrk1_traceoff | dbrk2_traceoff | dbrk3_traceoff; + dbrk_traceon <= dbrk0_traceon | dbrk1_traceon | dbrk2_traceon | dbrk3_traceon; + dbrk_traceme <= dbrk0_traceme | dbrk1_traceme | dbrk2_traceme | dbrk3_traceme; + dbrk_goto0 <= dbrk0_goto0 | dbrk1_goto0 | dbrk2_goto0 | dbrk3_goto0; + dbrk_goto1 <= dbrk0_goto1 | dbrk1_goto1 | dbrk2_goto1 | dbrk3_goto1; + end + end + + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_itrace ( + // inputs: + clk, + dbrk_traceoff, + dbrk_traceon, + jdo, + jrst_n, + take_action_tracectrl, + xbrk_traceoff, + xbrk_traceon, + xbrk_wrap_traceoff, + + // outputs: + itm, + trc_ctrl, + trc_on + ) +; + + output [ 35: 0] itm; + output [ 15: 0] trc_ctrl; + output trc_on; + input clk; + input dbrk_traceoff; + input dbrk_traceon; + input [ 15: 0] jdo; + input jrst_n; + input take_action_tracectrl; + input xbrk_traceoff; + input xbrk_traceon; + input xbrk_wrap_traceoff; + + +wire advanced_exc_occured; +wire curr_pid; +wire [ 1: 0] dct_code; +wire dct_is_taken; +wire [ 31: 0] eic_addr; +wire [ 31: 0] exc_addr; +wire instr_retired; +wire is_cond_dct; +wire is_dct; +wire is_exception_no_break; +wire is_external_interrupt; +wire is_fast_tlb_miss_exception; +wire is_idct; +wire [ 35: 0] itm; +wire not_in_debug_mode; +wire record_dct_outcome_in_sync; +wire record_itrace; +wire [ 31: 0] retired_pcb; +wire [ 1: 0] sync_code; +wire [ 6: 0] sync_interval; +wire [ 6: 0] sync_timer; +wire [ 6: 0] sync_timer_next; +wire sync_timer_reached_zero; +wire [ 15: 0] trc_ctrl; +reg [ 10: 0] trc_ctrl_reg /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +wire trc_on; + assign is_cond_dct = 1'b0; + assign is_dct = 1'b0; + assign dct_is_taken = 1'b0; + assign is_idct = 1'b0; + assign retired_pcb = 32'b0; + assign not_in_debug_mode = 1'b0; + assign instr_retired = 1'b0; + assign advanced_exc_occured = 1'b0; + assign is_exception_no_break = 1'b0; + assign is_external_interrupt = 1'b0; + assign is_fast_tlb_miss_exception = 1'b0; + assign curr_pid = 1'b0; + assign exc_addr = 32'b0; + assign eic_addr = 32'b0; + assign sync_code = trc_ctrl[3 : 2]; + assign sync_interval = { sync_code[1] & sync_code[0], 1'b0, sync_code[1] & ~sync_code[0], 1'b0, ~sync_code[1] & sync_code[0], 2'b00 }; + assign sync_timer_reached_zero = sync_timer == 0; + assign record_dct_outcome_in_sync = dct_is_taken & sync_timer_reached_zero; + assign sync_timer_next = sync_timer_reached_zero ? sync_timer : (sync_timer - 1); + assign record_itrace = trc_on & trc_ctrl[4]; + assign dct_code = {is_cond_dct, dct_is_taken}; + assign itm = 36'd0; + assign sync_timer = 7'd1; + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + begin + trc_ctrl_reg[0] <= 1'b0; + trc_ctrl_reg[1] <= 1'b0; + trc_ctrl_reg[3 : 2] <= 2'b00; + trc_ctrl_reg[4] <= 1'b0; + trc_ctrl_reg[7 : 5] <= 3'b000; + trc_ctrl_reg[8] <= 0; + trc_ctrl_reg[9] <= 1'b0; + trc_ctrl_reg[10] <= 1'b0; + end + else if (take_action_tracectrl) + begin + trc_ctrl_reg[0] <= jdo[5]; + trc_ctrl_reg[1] <= jdo[6]; + trc_ctrl_reg[3 : 2] <= jdo[8 : 7]; + trc_ctrl_reg[4] <= jdo[9]; + trc_ctrl_reg[9] <= jdo[14]; + trc_ctrl_reg[10] <= jdo[2]; + trc_ctrl_reg[7 : 5] <= 3'b000; + trc_ctrl_reg[8] <= 1'b0; + end + else if (xbrk_wrap_traceoff) + begin + trc_ctrl_reg[1] <= 0; + trc_ctrl_reg[0] <= 0; + end + else if (dbrk_traceoff | xbrk_traceoff) + trc_ctrl_reg[1] <= 0; + else if (trc_ctrl_reg[0] & + (dbrk_traceon | xbrk_traceon)) + trc_ctrl_reg[1] <= 1; + end + + + assign trc_ctrl = 0; + assign trc_on = trc_ctrl[1] & (trc_ctrl[9] | not_in_debug_mode); + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_td_mode ( + // inputs: + ctrl, + + // outputs: + td_mode + ) +; + + output [ 3: 0] td_mode; + input [ 8: 0] ctrl; + + +wire [ 2: 0] ctrl_bits_for_mux; +reg [ 3: 0] td_mode; + assign ctrl_bits_for_mux = ctrl[7 : 5]; + always @(ctrl_bits_for_mux) + begin + case (ctrl_bits_for_mux) + + 3'b000: begin + td_mode = 4'b0000; + end // 3'b000 + + 3'b001: begin + td_mode = 4'b1000; + end // 3'b001 + + 3'b010: begin + td_mode = 4'b0100; + end // 3'b010 + + 3'b011: begin + td_mode = 4'b1100; + end // 3'b011 + + 3'b100: begin + td_mode = 4'b0010; + end // 3'b100 + + 3'b101: begin + td_mode = 4'b1010; + end // 3'b101 + + 3'b110: begin + td_mode = 4'b0101; + end // 3'b110 + + 3'b111: begin + td_mode = 4'b1111; + end // 3'b111 + + endcase // ctrl_bits_for_mux + end + + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_dtrace ( + // inputs: + clk, + cpu_d_address, + cpu_d_read, + cpu_d_readdata, + cpu_d_wait, + cpu_d_write, + cpu_d_writedata, + jrst_n, + trc_ctrl, + + // outputs: + atm, + dtm + ) +; + + output [ 35: 0] atm; + output [ 35: 0] dtm; + input clk; + input [ 17: 0] cpu_d_address; + input cpu_d_read; + input [ 31: 0] cpu_d_readdata; + input cpu_d_wait; + input cpu_d_write; + input [ 31: 0] cpu_d_writedata; + input jrst_n; + input [ 15: 0] trc_ctrl; + + +reg [ 35: 0] atm /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=R101" */; +wire [ 31: 0] cpu_d_address_0_padded; +wire [ 31: 0] cpu_d_readdata_0_padded; +wire [ 31: 0] cpu_d_writedata_0_padded; +reg [ 35: 0] dtm /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=R101" */; +wire dummy_tie_off; +wire record_load_addr; +wire record_load_data; +wire record_store_addr; +wire record_store_data; +wire [ 3: 0] td_mode_trc_ctrl; + assign cpu_d_writedata_0_padded = cpu_d_writedata | 32'b0; + assign cpu_d_readdata_0_padded = cpu_d_readdata | 32'b0; + assign cpu_d_address_0_padded = cpu_d_address | 32'b0; + //niosII_cpu_cpu_nios2_oci_trc_ctrl_td_mode, which is an e_instance + niosII_cpu_cpu_nios2_oci_td_mode niosII_cpu_cpu_nios2_oci_trc_ctrl_td_mode + ( + .ctrl (trc_ctrl[8 : 0]), + .td_mode (td_mode_trc_ctrl) + ); + + assign {record_load_addr, record_store_addr, + record_load_data, record_store_data} = td_mode_trc_ctrl; + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + begin + atm <= 0; + dtm <= 0; + end + else + begin + atm <= 0; + dtm <= 0; + end + end + + + assign dummy_tie_off = cpu_d_wait|cpu_d_read|cpu_d_write; + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_compute_input_tm_cnt ( + // inputs: + atm_valid, + dtm_valid, + itm_valid, + + // outputs: + compute_input_tm_cnt + ) +; + + output [ 1: 0] compute_input_tm_cnt; + input atm_valid; + input dtm_valid; + input itm_valid; + + +reg [ 1: 0] compute_input_tm_cnt; +wire [ 2: 0] switch_for_mux; + assign switch_for_mux = {itm_valid, atm_valid, dtm_valid}; + always @(switch_for_mux) + begin + case (switch_for_mux) + + 3'b000: begin + compute_input_tm_cnt = 0; + end // 3'b000 + + 3'b001: begin + compute_input_tm_cnt = 1; + end // 3'b001 + + 3'b010: begin + compute_input_tm_cnt = 1; + end // 3'b010 + + 3'b011: begin + compute_input_tm_cnt = 2; + end // 3'b011 + + 3'b100: begin + compute_input_tm_cnt = 1; + end // 3'b100 + + 3'b101: begin + compute_input_tm_cnt = 2; + end // 3'b101 + + 3'b110: begin + compute_input_tm_cnt = 2; + end // 3'b110 + + 3'b111: begin + compute_input_tm_cnt = 3; + end // 3'b111 + + endcase // switch_for_mux + end + + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_fifo_wrptr_inc ( + // inputs: + ge2_free, + ge3_free, + input_tm_cnt, + + // outputs: + fifo_wrptr_inc + ) +; + + output [ 3: 0] fifo_wrptr_inc; + input ge2_free; + input ge3_free; + input [ 1: 0] input_tm_cnt; + + +reg [ 3: 0] fifo_wrptr_inc; + always @(ge2_free or ge3_free or input_tm_cnt) + begin + if (ge3_free & (input_tm_cnt == 3)) + fifo_wrptr_inc = 3; + else if (ge2_free & (input_tm_cnt >= 2)) + fifo_wrptr_inc = 2; + else if (input_tm_cnt >= 1) + fifo_wrptr_inc = 1; + else + fifo_wrptr_inc = 0; + end + + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_fifo_cnt_inc ( + // inputs: + empty, + ge2_free, + ge3_free, + input_tm_cnt, + + // outputs: + fifo_cnt_inc + ) +; + + output [ 4: 0] fifo_cnt_inc; + input empty; + input ge2_free; + input ge3_free; + input [ 1: 0] input_tm_cnt; + + +reg [ 4: 0] fifo_cnt_inc; + always @(empty or ge2_free or ge3_free or input_tm_cnt) + begin + if (empty) + fifo_cnt_inc = input_tm_cnt[1 : 0]; + else if (ge3_free & (input_tm_cnt == 3)) + fifo_cnt_inc = 2; + else if (ge2_free & (input_tm_cnt >= 2)) + fifo_cnt_inc = 1; + else if (input_tm_cnt >= 1) + fifo_cnt_inc = 0; + else + fifo_cnt_inc = {5{1'b1}}; + end + + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_fifo ( + // inputs: + atm, + clk, + dbrk_traceme, + dbrk_traceoff, + dbrk_traceon, + dtm, + itm, + jrst_n, + reset_n, + trc_on, + + // outputs: + tw + ) +; + + output [ 35: 0] tw; + input [ 35: 0] atm; + input clk; + input dbrk_traceme; + input dbrk_traceoff; + input dbrk_traceon; + input [ 35: 0] dtm; + input [ 35: 0] itm; + input jrst_n; + input reset_n; + input trc_on; + + +wire atm_valid; +wire [ 1: 0] compute_input_tm_cnt; +wire dtm_valid; +wire empty; +reg [ 35: 0] fifo_0; +wire fifo_0_enable; +wire [ 35: 0] fifo_0_mux; +reg [ 35: 0] fifo_1; +reg [ 35: 0] fifo_10; +wire fifo_10_enable; +wire [ 35: 0] fifo_10_mux; +reg [ 35: 0] fifo_11; +wire fifo_11_enable; +wire [ 35: 0] fifo_11_mux; +reg [ 35: 0] fifo_12; +wire fifo_12_enable; +wire [ 35: 0] fifo_12_mux; +reg [ 35: 0] fifo_13; +wire fifo_13_enable; +wire [ 35: 0] fifo_13_mux; +reg [ 35: 0] fifo_14; +wire fifo_14_enable; +wire [ 35: 0] fifo_14_mux; +reg [ 35: 0] fifo_15; +wire fifo_15_enable; +wire [ 35: 0] fifo_15_mux; +wire fifo_1_enable; +wire [ 35: 0] fifo_1_mux; +reg [ 35: 0] fifo_2; +wire fifo_2_enable; +wire [ 35: 0] fifo_2_mux; +reg [ 35: 0] fifo_3; +wire fifo_3_enable; +wire [ 35: 0] fifo_3_mux; +reg [ 35: 0] fifo_4; +wire fifo_4_enable; +wire [ 35: 0] fifo_4_mux; +reg [ 35: 0] fifo_5; +wire fifo_5_enable; +wire [ 35: 0] fifo_5_mux; +reg [ 35: 0] fifo_6; +wire fifo_6_enable; +wire [ 35: 0] fifo_6_mux; +reg [ 35: 0] fifo_7; +wire fifo_7_enable; +wire [ 35: 0] fifo_7_mux; +reg [ 35: 0] fifo_8; +wire fifo_8_enable; +wire [ 35: 0] fifo_8_mux; +reg [ 35: 0] fifo_9; +wire fifo_9_enable; +wire [ 35: 0] fifo_9_mux; +reg [ 4: 0] fifo_cnt /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=R101" */; +wire [ 4: 0] fifo_cnt_inc; +wire [ 35: 0] fifo_head; +reg [ 3: 0] fifo_rdptr /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=R101" */; +wire [ 35: 0] fifo_read_mux; +reg [ 3: 0] fifo_wrptr /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=R101" */; +wire [ 3: 0] fifo_wrptr_inc; +wire [ 3: 0] fifo_wrptr_plus1; +wire [ 3: 0] fifo_wrptr_plus2; +wire ge2_free; +wire ge3_free; +wire input_ge1; +wire input_ge2; +wire input_ge3; +wire [ 1: 0] input_tm_cnt; +wire itm_valid; +reg overflow_pending /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=R101" */; +wire [ 35: 0] overflow_pending_atm; +wire [ 35: 0] overflow_pending_dtm; +wire trc_this; +wire [ 35: 0] tw; + assign trc_this = trc_on | (dbrk_traceon & ~dbrk_traceoff) | dbrk_traceme; + assign itm_valid = |itm[35 : 32]; + assign atm_valid = |atm[35 : 32] & trc_this; + assign dtm_valid = |dtm[35 : 32] & trc_this; + assign ge2_free = ~fifo_cnt[4]; + assign ge3_free = ge2_free & ~&fifo_cnt[3 : 0]; + assign empty = ~|fifo_cnt; + assign fifo_wrptr_plus1 = fifo_wrptr + 1; + assign fifo_wrptr_plus2 = fifo_wrptr + 2; + niosII_cpu_cpu_nios2_oci_compute_input_tm_cnt the_niosII_cpu_cpu_nios2_oci_compute_input_tm_cnt + ( + .atm_valid (atm_valid), + .compute_input_tm_cnt (compute_input_tm_cnt), + .dtm_valid (dtm_valid), + .itm_valid (itm_valid) + ); + + assign input_tm_cnt = compute_input_tm_cnt; + niosII_cpu_cpu_nios2_oci_fifo_wrptr_inc the_niosII_cpu_cpu_nios2_oci_fifo_wrptr_inc + ( + .fifo_wrptr_inc (fifo_wrptr_inc), + .ge2_free (ge2_free), + .ge3_free (ge3_free), + .input_tm_cnt (input_tm_cnt) + ); + + niosII_cpu_cpu_nios2_oci_fifo_cnt_inc the_niosII_cpu_cpu_nios2_oci_fifo_cnt_inc + ( + .empty (empty), + .fifo_cnt_inc (fifo_cnt_inc), + .ge2_free (ge2_free), + .ge3_free (ge3_free), + .input_tm_cnt (input_tm_cnt) + ); + + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + begin + fifo_rdptr <= 0; + fifo_wrptr <= 0; + fifo_cnt <= 0; + overflow_pending <= 1; + end + else + begin + fifo_wrptr <= fifo_wrptr + fifo_wrptr_inc; + fifo_cnt <= fifo_cnt + fifo_cnt_inc; + if (~empty) + fifo_rdptr <= fifo_rdptr + 1; + if (~trc_this || (~ge2_free & input_ge2) || (~ge3_free & input_ge3)) + overflow_pending <= 1; + else if (atm_valid | dtm_valid) + overflow_pending <= 0; + end + end + + + assign fifo_head = fifo_read_mux; + assign tw = itm; + assign fifo_0_enable = ((fifo_wrptr == 4'd0) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd0) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd0) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_0 <= 0; + else if (fifo_0_enable) + fifo_0 <= fifo_0_mux; + end + + + assign fifo_0_mux = (((fifo_wrptr == 4'd0) && itm_valid))? itm : + (((fifo_wrptr == 4'd0) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd0) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd0) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd0) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd0) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_1_enable = ((fifo_wrptr == 4'd1) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd1) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd1) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_1 <= 0; + else if (fifo_1_enable) + fifo_1 <= fifo_1_mux; + end + + + assign fifo_1_mux = (((fifo_wrptr == 4'd1) && itm_valid))? itm : + (((fifo_wrptr == 4'd1) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd1) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd1) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd1) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd1) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_2_enable = ((fifo_wrptr == 4'd2) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd2) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd2) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_2 <= 0; + else if (fifo_2_enable) + fifo_2 <= fifo_2_mux; + end + + + assign fifo_2_mux = (((fifo_wrptr == 4'd2) && itm_valid))? itm : + (((fifo_wrptr == 4'd2) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd2) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd2) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd2) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd2) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_3_enable = ((fifo_wrptr == 4'd3) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd3) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd3) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_3 <= 0; + else if (fifo_3_enable) + fifo_3 <= fifo_3_mux; + end + + + assign fifo_3_mux = (((fifo_wrptr == 4'd3) && itm_valid))? itm : + (((fifo_wrptr == 4'd3) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd3) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd3) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd3) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd3) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_4_enable = ((fifo_wrptr == 4'd4) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd4) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd4) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_4 <= 0; + else if (fifo_4_enable) + fifo_4 <= fifo_4_mux; + end + + + assign fifo_4_mux = (((fifo_wrptr == 4'd4) && itm_valid))? itm : + (((fifo_wrptr == 4'd4) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd4) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd4) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd4) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd4) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_5_enable = ((fifo_wrptr == 4'd5) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd5) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd5) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_5 <= 0; + else if (fifo_5_enable) + fifo_5 <= fifo_5_mux; + end + + + assign fifo_5_mux = (((fifo_wrptr == 4'd5) && itm_valid))? itm : + (((fifo_wrptr == 4'd5) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd5) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd5) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd5) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd5) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_6_enable = ((fifo_wrptr == 4'd6) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd6) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd6) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_6 <= 0; + else if (fifo_6_enable) + fifo_6 <= fifo_6_mux; + end + + + assign fifo_6_mux = (((fifo_wrptr == 4'd6) && itm_valid))? itm : + (((fifo_wrptr == 4'd6) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd6) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd6) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd6) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd6) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_7_enable = ((fifo_wrptr == 4'd7) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd7) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd7) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_7 <= 0; + else if (fifo_7_enable) + fifo_7 <= fifo_7_mux; + end + + + assign fifo_7_mux = (((fifo_wrptr == 4'd7) && itm_valid))? itm : + (((fifo_wrptr == 4'd7) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd7) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd7) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd7) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd7) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_8_enable = ((fifo_wrptr == 4'd8) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd8) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd8) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_8 <= 0; + else if (fifo_8_enable) + fifo_8 <= fifo_8_mux; + end + + + assign fifo_8_mux = (((fifo_wrptr == 4'd8) && itm_valid))? itm : + (((fifo_wrptr == 4'd8) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd8) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd8) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd8) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd8) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_9_enable = ((fifo_wrptr == 4'd9) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd9) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd9) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_9 <= 0; + else if (fifo_9_enable) + fifo_9 <= fifo_9_mux; + end + + + assign fifo_9_mux = (((fifo_wrptr == 4'd9) && itm_valid))? itm : + (((fifo_wrptr == 4'd9) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd9) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd9) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd9) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd9) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_10_enable = ((fifo_wrptr == 4'd10) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd10) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd10) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_10 <= 0; + else if (fifo_10_enable) + fifo_10 <= fifo_10_mux; + end + + + assign fifo_10_mux = (((fifo_wrptr == 4'd10) && itm_valid))? itm : + (((fifo_wrptr == 4'd10) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd10) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd10) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd10) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd10) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_11_enable = ((fifo_wrptr == 4'd11) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd11) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd11) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_11 <= 0; + else if (fifo_11_enable) + fifo_11 <= fifo_11_mux; + end + + + assign fifo_11_mux = (((fifo_wrptr == 4'd11) && itm_valid))? itm : + (((fifo_wrptr == 4'd11) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd11) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd11) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd11) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd11) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_12_enable = ((fifo_wrptr == 4'd12) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd12) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd12) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_12 <= 0; + else if (fifo_12_enable) + fifo_12 <= fifo_12_mux; + end + + + assign fifo_12_mux = (((fifo_wrptr == 4'd12) && itm_valid))? itm : + (((fifo_wrptr == 4'd12) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd12) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd12) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd12) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd12) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_13_enable = ((fifo_wrptr == 4'd13) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd13) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd13) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_13 <= 0; + else if (fifo_13_enable) + fifo_13 <= fifo_13_mux; + end + + + assign fifo_13_mux = (((fifo_wrptr == 4'd13) && itm_valid))? itm : + (((fifo_wrptr == 4'd13) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd13) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd13) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd13) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd13) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_14_enable = ((fifo_wrptr == 4'd14) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd14) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd14) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_14 <= 0; + else if (fifo_14_enable) + fifo_14 <= fifo_14_mux; + end + + + assign fifo_14_mux = (((fifo_wrptr == 4'd14) && itm_valid))? itm : + (((fifo_wrptr == 4'd14) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd14) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd14) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd14) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd14) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign fifo_15_enable = ((fifo_wrptr == 4'd15) && input_ge1) || (ge2_free && (fifo_wrptr_plus1== 4'd15) && input_ge2) ||(ge3_free && (fifo_wrptr_plus2== 4'd15) && input_ge3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + fifo_15 <= 0; + else if (fifo_15_enable) + fifo_15 <= fifo_15_mux; + end + + + assign fifo_15_mux = (((fifo_wrptr == 4'd15) && itm_valid))? itm : + (((fifo_wrptr == 4'd15) && atm_valid))? overflow_pending_atm : + (((fifo_wrptr == 4'd15) && dtm_valid))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd15) && (ge2_free & itm_valid & atm_valid)))? overflow_pending_atm : + (((fifo_wrptr_plus1 == 4'd15) && (ge2_free & itm_valid & dtm_valid)))? overflow_pending_dtm : + (((fifo_wrptr_plus1 == 4'd15) && (ge2_free & atm_valid & dtm_valid)))? overflow_pending_dtm : + overflow_pending_dtm; + + assign input_ge1 = |input_tm_cnt; + assign input_ge2 = input_tm_cnt[1]; + assign input_ge3 = &input_tm_cnt; + assign overflow_pending_atm = {overflow_pending, atm[34 : 0]}; + assign overflow_pending_dtm = {overflow_pending, dtm[34 : 0]}; + assign fifo_read_mux = (fifo_rdptr == 4'd0)? fifo_0 : + (fifo_rdptr == 4'd1)? fifo_1 : + (fifo_rdptr == 4'd2)? fifo_2 : + (fifo_rdptr == 4'd3)? fifo_3 : + (fifo_rdptr == 4'd4)? fifo_4 : + (fifo_rdptr == 4'd5)? fifo_5 : + (fifo_rdptr == 4'd6)? fifo_6 : + (fifo_rdptr == 4'd7)? fifo_7 : + (fifo_rdptr == 4'd8)? fifo_8 : + (fifo_rdptr == 4'd9)? fifo_9 : + (fifo_rdptr == 4'd10)? fifo_10 : + (fifo_rdptr == 4'd11)? fifo_11 : + (fifo_rdptr == 4'd12)? fifo_12 : + (fifo_rdptr == 4'd13)? fifo_13 : + (fifo_rdptr == 4'd14)? fifo_14 : + fifo_15; + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_pib ( + // outputs: + tr_data + ) +; + + output [ 35: 0] tr_data; + + +wire [ 35: 0] tr_data; + assign tr_data = 0; + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci_im ( + // inputs: + clk, + jrst_n, + trc_ctrl, + tw, + + // outputs: + tracemem_on, + tracemem_trcdata, + tracemem_tw, + trc_im_addr, + trc_wrap, + xbrk_wrap_traceoff + ) +; + + output tracemem_on; + output [ 35: 0] tracemem_trcdata; + output tracemem_tw; + output [ 6: 0] trc_im_addr; + output trc_wrap; + output xbrk_wrap_traceoff; + input clk; + input jrst_n; + input [ 15: 0] trc_ctrl; + input [ 35: 0] tw; + + +wire tracemem_on; +wire [ 35: 0] tracemem_trcdata; +wire tracemem_tw; +reg [ 6: 0] trc_im_addr /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +wire [ 35: 0] trc_im_data; +wire trc_on_chip; +reg trc_wrap /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +wire tw_valid; +wire xbrk_wrap_traceoff; + assign trc_im_data = tw; + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + begin + trc_im_addr <= 0; + trc_wrap <= 0; + end + else + begin + trc_im_addr <= 0; + trc_wrap <= 0; + end + end + + + assign trc_on_chip = ~trc_ctrl[8]; + assign tw_valid = |trc_im_data[35 : 32]; + assign xbrk_wrap_traceoff = trc_ctrl[10] & trc_wrap; + assign tracemem_trcdata = 0; + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_performance_monitors +; + + + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_avalon_reg ( + // inputs: + address, + clk, + debugaccess, + monitor_error, + monitor_go, + monitor_ready, + reset_n, + write, + writedata, + + // outputs: + oci_ienable, + oci_reg_readdata, + oci_single_step_mode, + ocireg_ers, + ocireg_mrs, + take_action_ocireg + ) +; + + output [ 31: 0] oci_ienable; + output [ 31: 0] oci_reg_readdata; + output oci_single_step_mode; + output ocireg_ers; + output ocireg_mrs; + output take_action_ocireg; + input [ 8: 0] address; + input clk; + input debugaccess; + input monitor_error; + input monitor_go; + input monitor_ready; + input reset_n; + input write; + input [ 31: 0] writedata; + + +reg [ 31: 0] oci_ienable; +wire oci_reg_00_addressed; +wire oci_reg_01_addressed; +wire [ 31: 0] oci_reg_readdata; +reg oci_single_step_mode; +wire ocireg_ers; +wire ocireg_mrs; +wire ocireg_sstep; +wire take_action_oci_intr_mask_reg; +wire take_action_ocireg; +wire write_strobe; + assign oci_reg_00_addressed = address == 9'h100; + assign oci_reg_01_addressed = address == 9'h101; + assign write_strobe = write & debugaccess; + assign take_action_ocireg = write_strobe & oci_reg_00_addressed; + assign take_action_oci_intr_mask_reg = write_strobe & oci_reg_01_addressed; + assign ocireg_ers = writedata[1]; + assign ocireg_mrs = writedata[0]; + assign ocireg_sstep = writedata[3]; + assign oci_reg_readdata = oci_reg_00_addressed ? {28'b0, oci_single_step_mode, monitor_go, + monitor_ready, monitor_error} : + oci_reg_01_addressed ? oci_ienable : + 32'b0; + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + oci_single_step_mode <= 1'b0; + else if (take_action_ocireg) + oci_single_step_mode <= ocireg_sstep; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + oci_ienable <= 32'b00000000000000000000000000000011; + else if (take_action_oci_intr_mask_reg) + oci_ienable <= writedata | ~(32'b00000000000000000000000000000011); + end + + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_ociram_sp_ram_module ( + // inputs: + address, + byteenable, + clock, + data, + reset_req, + wren, + + // outputs: + q + ) +; + + parameter lpm_file = "UNUSED"; + + + output [ 31: 0] q; + input [ 7: 0] address; + input [ 3: 0] byteenable; + input clock; + input [ 31: 0] data; + input reset_req; + input wren; + + +wire clocken; +wire [ 31: 0] q; +wire [ 31: 0] ram_q; + assign q = ram_q; + assign clocken = ~reset_req; + altsyncram the_altsyncram + ( + .address_a (address), + .byteena_a (byteenable), + .clock0 (clock), + .clocken0 (clocken), + .data_a (data), + .q_a (ram_q), + .wren_a (wren) + ); + + defparam the_altsyncram.init_file = lpm_file, + the_altsyncram.maximum_depth = 0, + the_altsyncram.numwords_a = 256, + the_altsyncram.operation_mode = "SINGLE_PORT", + the_altsyncram.outdata_reg_a = "UNREGISTERED", + the_altsyncram.ram_block_type = "AUTO", + the_altsyncram.read_during_write_mode_port_a = "DONT_CARE", + the_altsyncram.width_a = 32, + the_altsyncram.width_byteena_a = 4, + the_altsyncram.widthad_a = 8; + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_ocimem ( + // inputs: + address, + byteenable, + clk, + debugaccess, + jdo, + jrst_n, + read, + reset_req, + take_action_ocimem_a, + take_action_ocimem_b, + take_no_action_ocimem_a, + write, + writedata, + + // outputs: + MonDReg, + ociram_readdata, + waitrequest + ) +; + + output [ 31: 0] MonDReg; + output [ 31: 0] ociram_readdata; + output waitrequest; + input [ 8: 0] address; + input [ 3: 0] byteenable; + input clk; + input debugaccess; + input [ 37: 0] jdo; + input jrst_n; + input read; + input reset_req; + input take_action_ocimem_a; + input take_action_ocimem_b; + input take_no_action_ocimem_a; + input write; + input [ 31: 0] writedata; + + +reg [ 10: 0] MonAReg /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +wire [ 8: 0] MonARegAddrInc; +wire MonARegAddrIncAccessingRAM; +reg [ 31: 0] MonDReg /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +reg avalon_ociram_readdata_ready /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +wire avalon_ram_wr; +wire [ 31: 0] cfgrom_readdata; +reg jtag_ram_access /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +reg jtag_ram_rd /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +reg jtag_ram_rd_d1 /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +reg jtag_ram_wr /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +reg jtag_rd /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +reg jtag_rd_d1 /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +wire [ 7: 0] ociram_addr; +wire [ 3: 0] ociram_byteenable; +wire [ 31: 0] ociram_readdata; +wire ociram_reset_req; +wire [ 31: 0] ociram_wr_data; +wire ociram_wr_en; +reg waitrequest /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + begin + jtag_rd <= 1'b0; + jtag_rd_d1 <= 1'b0; + jtag_ram_wr <= 1'b0; + jtag_ram_rd <= 1'b0; + jtag_ram_rd_d1 <= 1'b0; + jtag_ram_access <= 1'b0; + MonAReg <= 0; + MonDReg <= 0; + waitrequest <= 1'b1; + avalon_ociram_readdata_ready <= 1'b0; + end + else + begin + if (take_no_action_ocimem_a) + begin + MonAReg[10 : 2] <= MonARegAddrInc; + jtag_rd <= 1'b1; + jtag_ram_rd <= MonARegAddrIncAccessingRAM; + jtag_ram_access <= MonARegAddrIncAccessingRAM; + end + else if (take_action_ocimem_a) + begin + MonAReg[10 : 2] <= { jdo[17], + jdo[33 : 26] }; + + jtag_rd <= 1'b1; + jtag_ram_rd <= ~jdo[17]; + jtag_ram_access <= ~jdo[17]; + end + else if (take_action_ocimem_b) + begin + MonAReg[10 : 2] <= MonARegAddrInc; + MonDReg <= jdo[34 : 3]; + jtag_ram_wr <= MonARegAddrIncAccessingRAM; + jtag_ram_access <= MonARegAddrIncAccessingRAM; + end + else + begin + jtag_rd <= 0; + jtag_ram_wr <= 0; + jtag_ram_rd <= 0; + jtag_ram_access <= 0; + if (jtag_rd_d1) + MonDReg <= jtag_ram_rd_d1 ? ociram_readdata : cfgrom_readdata; + end + jtag_rd_d1 <= jtag_rd; + jtag_ram_rd_d1 <= jtag_ram_rd; + if (~waitrequest) + begin + waitrequest <= 1'b1; + avalon_ociram_readdata_ready <= 1'b0; + end + else if (write) + waitrequest <= ~address[8] & jtag_ram_access; + else if (read) + begin + avalon_ociram_readdata_ready <= ~(~address[8] & jtag_ram_access); + waitrequest <= ~avalon_ociram_readdata_ready; + end + else + begin + waitrequest <= 1'b1; + avalon_ociram_readdata_ready <= 1'b0; + end + end + end + + + assign MonARegAddrInc = MonAReg[10 : 2]+1; + assign MonARegAddrIncAccessingRAM = ~MonARegAddrInc[8]; + assign avalon_ram_wr = write & ~address[8] & debugaccess; + assign ociram_addr = jtag_ram_access ? MonAReg[9 : 2] : address[7 : 0]; + assign ociram_wr_data = jtag_ram_access ? MonDReg[31 : 0] : writedata; + assign ociram_byteenable = jtag_ram_access ? 4'b1111 : byteenable; + assign ociram_wr_en = jtag_ram_access ? jtag_ram_wr : avalon_ram_wr; + assign ociram_reset_req = reset_req & ~jtag_ram_access; +//niosII_cpu_cpu_ociram_sp_ram, which is an nios_sp_ram +niosII_cpu_cpu_ociram_sp_ram_module niosII_cpu_cpu_ociram_sp_ram + ( + .address (ociram_addr), + .byteenable (ociram_byteenable), + .clock (clk), + .data (ociram_wr_data), + .q (ociram_readdata), + .reset_req (ociram_reset_req), + .wren (ociram_wr_en) + ); + +//synthesis translate_off +`ifdef NO_PLI +defparam niosII_cpu_cpu_ociram_sp_ram.lpm_file = "niosII_cpu_cpu_ociram_default_contents.dat"; +`else +defparam niosII_cpu_cpu_ociram_sp_ram.lpm_file = "niosII_cpu_cpu_ociram_default_contents.hex"; +`endif +//synthesis translate_on + assign cfgrom_readdata = (MonAReg[4 : 2] == 3'd0)? 32'h00000020 : + (MonAReg[4 : 2] == 3'd1)? 32'h00001212 : + (MonAReg[4 : 2] == 3'd2)? 32'h00040000 : + (MonAReg[4 : 2] == 3'd3)? 32'h00000100 : + (MonAReg[4 : 2] == 3'd4)? 32'h20000000 : + (MonAReg[4 : 2] == 3'd5)? 32'h00000000 : + (MonAReg[4 : 2] == 3'd6)? 32'h00000000 : + 32'h00000000; + + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_nios2_oci ( + // inputs: + D_valid, + E_st_data, + E_valid, + F_pc, + address_nxt, + av_ld_data_aligned_filtered, + byteenable_nxt, + clk, + d_address, + d_read, + d_waitrequest, + d_write, + debugaccess_nxt, + hbreak_enabled, + read_nxt, + reset, + reset_n, + reset_req, + write_nxt, + writedata_nxt, + + // outputs: + debug_mem_slave_debugaccess_to_roms, + oci_hbreak_req, + oci_ienable, + oci_single_step_mode, + readdata, + resetrequest, + waitrequest + ) +; + + output debug_mem_slave_debugaccess_to_roms; + output oci_hbreak_req; + output [ 31: 0] oci_ienable; + output oci_single_step_mode; + output [ 31: 0] readdata; + output resetrequest; + output waitrequest; + input D_valid; + input [ 31: 0] E_st_data; + input E_valid; + input [ 15: 0] F_pc; + input [ 8: 0] address_nxt; + input [ 31: 0] av_ld_data_aligned_filtered; + input [ 3: 0] byteenable_nxt; + input clk; + input [ 17: 0] d_address; + input d_read; + input d_waitrequest; + input d_write; + input debugaccess_nxt; + input hbreak_enabled; + input read_nxt; + input reset; + input reset_n; + input reset_req; + input write_nxt; + input [ 31: 0] writedata_nxt; + + +wire [ 31: 0] MonDReg; +reg [ 8: 0] address; +wire [ 35: 0] atm; +wire [ 31: 0] break_readreg; +reg [ 3: 0] byteenable; +wire [ 17: 0] cpu_d_address; +wire cpu_d_read; +wire [ 31: 0] cpu_d_readdata; +wire cpu_d_wait; +wire cpu_d_write; +wire [ 31: 0] cpu_d_writedata; +wire dbrk_break; +wire dbrk_goto0; +wire dbrk_goto1; +wire dbrk_hit0_latch; +wire dbrk_hit1_latch; +wire dbrk_hit2_latch; +wire dbrk_hit3_latch; +wire dbrk_traceme; +wire dbrk_traceoff; +wire dbrk_traceon; +wire dbrk_trigout; +wire debug_mem_slave_debugaccess_to_roms; +reg debugaccess; +wire debugack; +wire debugreq; +wire [ 35: 0] dtm; +wire dummy_sink; +wire [ 35: 0] itm; +wire [ 37: 0] jdo; +wire jrst_n; +wire monitor_error; +wire monitor_go; +wire monitor_ready; +wire oci_hbreak_req; +wire [ 31: 0] oci_ienable; +wire [ 31: 0] oci_reg_readdata; +wire oci_single_step_mode; +wire [ 31: 0] ociram_readdata; +wire ocireg_ers; +wire ocireg_mrs; +reg read; +reg [ 31: 0] readdata; +wire resetlatch; +wire resetrequest; +wire st_ready_test_idle; +wire take_action_break_a; +wire take_action_break_b; +wire take_action_break_c; +wire take_action_ocimem_a; +wire take_action_ocimem_b; +wire take_action_ocireg; +wire take_action_tracectrl; +wire take_no_action_break_a; +wire take_no_action_break_b; +wire take_no_action_break_c; +wire take_no_action_ocimem_a; +wire [ 35: 0] tr_data; +wire tracemem_on; +wire [ 35: 0] tracemem_trcdata; +wire tracemem_tw; +wire [ 15: 0] trc_ctrl; +wire [ 6: 0] trc_im_addr; +wire trc_on; +wire trc_wrap; +wire trigbrktype; +wire trigger_state_0; +wire trigger_state_1; +wire trigout; +wire [ 35: 0] tw; +wire waitrequest; +reg write; +reg [ 31: 0] writedata; +wire xbrk_break; +wire [ 7: 0] xbrk_ctrl0; +wire [ 7: 0] xbrk_ctrl1; +wire [ 7: 0] xbrk_ctrl2; +wire [ 7: 0] xbrk_ctrl3; +wire xbrk_goto0; +wire xbrk_goto1; +wire xbrk_traceoff; +wire xbrk_traceon; +wire xbrk_trigout; +wire xbrk_wrap_traceoff; + niosII_cpu_cpu_nios2_oci_debug the_niosII_cpu_cpu_nios2_oci_debug + ( + .clk (clk), + .dbrk_break (dbrk_break), + .debugack (debugack), + .debugreq (debugreq), + .hbreak_enabled (hbreak_enabled), + .jdo (jdo), + .jrst_n (jrst_n), + .monitor_error (monitor_error), + .monitor_go (monitor_go), + .monitor_ready (monitor_ready), + .oci_hbreak_req (oci_hbreak_req), + .ocireg_ers (ocireg_ers), + .ocireg_mrs (ocireg_mrs), + .reset (reset), + .resetlatch (resetlatch), + .resetrequest (resetrequest), + .st_ready_test_idle (st_ready_test_idle), + .take_action_ocimem_a (take_action_ocimem_a), + .take_action_ocireg (take_action_ocireg), + .xbrk_break (xbrk_break) + ); + + niosII_cpu_cpu_nios2_oci_break the_niosII_cpu_cpu_nios2_oci_break + ( + .break_readreg (break_readreg), + .clk (clk), + .dbrk_break (dbrk_break), + .dbrk_goto0 (dbrk_goto0), + .dbrk_goto1 (dbrk_goto1), + .dbrk_hit0_latch (dbrk_hit0_latch), + .dbrk_hit1_latch (dbrk_hit1_latch), + .dbrk_hit2_latch (dbrk_hit2_latch), + .dbrk_hit3_latch (dbrk_hit3_latch), + .jdo (jdo), + .jrst_n (jrst_n), + .take_action_break_a (take_action_break_a), + .take_action_break_b (take_action_break_b), + .take_action_break_c (take_action_break_c), + .take_no_action_break_a (take_no_action_break_a), + .take_no_action_break_b (take_no_action_break_b), + .take_no_action_break_c (take_no_action_break_c), + .trigbrktype (trigbrktype), + .trigger_state_0 (trigger_state_0), + .trigger_state_1 (trigger_state_1), + .xbrk_ctrl0 (xbrk_ctrl0), + .xbrk_ctrl1 (xbrk_ctrl1), + .xbrk_ctrl2 (xbrk_ctrl2), + .xbrk_ctrl3 (xbrk_ctrl3), + .xbrk_goto0 (xbrk_goto0), + .xbrk_goto1 (xbrk_goto1) + ); + + niosII_cpu_cpu_nios2_oci_xbrk the_niosII_cpu_cpu_nios2_oci_xbrk + ( + .D_valid (D_valid), + .E_valid (E_valid), + .F_pc (F_pc), + .clk (clk), + .reset_n (reset_n), + .trigger_state_0 (trigger_state_0), + .trigger_state_1 (trigger_state_1), + .xbrk_break (xbrk_break), + .xbrk_ctrl0 (xbrk_ctrl0), + .xbrk_ctrl1 (xbrk_ctrl1), + .xbrk_ctrl2 (xbrk_ctrl2), + .xbrk_ctrl3 (xbrk_ctrl3), + .xbrk_goto0 (xbrk_goto0), + .xbrk_goto1 (xbrk_goto1), + .xbrk_traceoff (xbrk_traceoff), + .xbrk_traceon (xbrk_traceon), + .xbrk_trigout (xbrk_trigout) + ); + + niosII_cpu_cpu_nios2_oci_dbrk the_niosII_cpu_cpu_nios2_oci_dbrk + ( + .E_st_data (E_st_data), + .av_ld_data_aligned_filtered (av_ld_data_aligned_filtered), + .clk (clk), + .cpu_d_address (cpu_d_address), + .cpu_d_read (cpu_d_read), + .cpu_d_readdata (cpu_d_readdata), + .cpu_d_wait (cpu_d_wait), + .cpu_d_write (cpu_d_write), + .cpu_d_writedata (cpu_d_writedata), + .d_address (d_address), + .d_read (d_read), + .d_waitrequest (d_waitrequest), + .d_write (d_write), + .dbrk_break (dbrk_break), + .dbrk_goto0 (dbrk_goto0), + .dbrk_goto1 (dbrk_goto1), + .dbrk_traceme (dbrk_traceme), + .dbrk_traceoff (dbrk_traceoff), + .dbrk_traceon (dbrk_traceon), + .dbrk_trigout (dbrk_trigout), + .debugack (debugack), + .reset_n (reset_n) + ); + + niosII_cpu_cpu_nios2_oci_itrace the_niosII_cpu_cpu_nios2_oci_itrace + ( + .clk (clk), + .dbrk_traceoff (dbrk_traceoff), + .dbrk_traceon (dbrk_traceon), + .itm (itm), + .jdo (jdo), + .jrst_n (jrst_n), + .take_action_tracectrl (take_action_tracectrl), + .trc_ctrl (trc_ctrl), + .trc_on (trc_on), + .xbrk_traceoff (xbrk_traceoff), + .xbrk_traceon (xbrk_traceon), + .xbrk_wrap_traceoff (xbrk_wrap_traceoff) + ); + + niosII_cpu_cpu_nios2_oci_dtrace the_niosII_cpu_cpu_nios2_oci_dtrace + ( + .atm (atm), + .clk (clk), + .cpu_d_address (cpu_d_address), + .cpu_d_read (cpu_d_read), + .cpu_d_readdata (cpu_d_readdata), + .cpu_d_wait (cpu_d_wait), + .cpu_d_write (cpu_d_write), + .cpu_d_writedata (cpu_d_writedata), + .dtm (dtm), + .jrst_n (jrst_n), + .trc_ctrl (trc_ctrl) + ); + + niosII_cpu_cpu_nios2_oci_fifo the_niosII_cpu_cpu_nios2_oci_fifo + ( + .atm (atm), + .clk (clk), + .dbrk_traceme (dbrk_traceme), + .dbrk_traceoff (dbrk_traceoff), + .dbrk_traceon (dbrk_traceon), + .dtm (dtm), + .itm (itm), + .jrst_n (jrst_n), + .reset_n (reset_n), + .trc_on (trc_on), + .tw (tw) + ); + + niosII_cpu_cpu_nios2_oci_pib the_niosII_cpu_cpu_nios2_oci_pib + ( + .tr_data (tr_data) + ); + + niosII_cpu_cpu_nios2_oci_im the_niosII_cpu_cpu_nios2_oci_im + ( + .clk (clk), + .jrst_n (jrst_n), + .tracemem_on (tracemem_on), + .tracemem_trcdata (tracemem_trcdata), + .tracemem_tw (tracemem_tw), + .trc_ctrl (trc_ctrl), + .trc_im_addr (trc_im_addr), + .trc_wrap (trc_wrap), + .tw (tw), + .xbrk_wrap_traceoff (xbrk_wrap_traceoff) + ); + + niosII_cpu_cpu_nios2_avalon_reg the_niosII_cpu_cpu_nios2_avalon_reg + ( + .address (address), + .clk (clk), + .debugaccess (debugaccess), + .monitor_error (monitor_error), + .monitor_go (monitor_go), + .monitor_ready (monitor_ready), + .oci_ienable (oci_ienable), + .oci_reg_readdata (oci_reg_readdata), + .oci_single_step_mode (oci_single_step_mode), + .ocireg_ers (ocireg_ers), + .ocireg_mrs (ocireg_mrs), + .reset_n (reset_n), + .take_action_ocireg (take_action_ocireg), + .write (write), + .writedata (writedata) + ); + + niosII_cpu_cpu_nios2_ocimem the_niosII_cpu_cpu_nios2_ocimem + ( + .MonDReg (MonDReg), + .address (address), + .byteenable (byteenable), + .clk (clk), + .debugaccess (debugaccess), + .jdo (jdo), + .jrst_n (jrst_n), + .ociram_readdata (ociram_readdata), + .read (read), + .reset_req (reset_req), + .take_action_ocimem_a (take_action_ocimem_a), + .take_action_ocimem_b (take_action_ocimem_b), + .take_no_action_ocimem_a (take_no_action_ocimem_a), + .waitrequest (waitrequest), + .write (write), + .writedata (writedata) + ); + + assign trigout = dbrk_trigout | xbrk_trigout; + assign debug_mem_slave_debugaccess_to_roms = debugack; + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + address <= 0; + else + address <= address_nxt; + end + + + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + byteenable <= 0; + else + byteenable <= byteenable_nxt; + end + + + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + writedata <= 0; + else + writedata <= writedata_nxt; + end + + + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + debugaccess <= 0; + else + debugaccess <= debugaccess_nxt; + end + + + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + read <= 0; + else + read <= read ? waitrequest : read_nxt; + end + + + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + write <= 0; + else + write <= write ? waitrequest : write_nxt; + end + + + always @(posedge clk or negedge jrst_n) + begin + if (jrst_n == 0) + readdata <= 0; + else + readdata <= address[8] ? oci_reg_readdata : ociram_readdata; + end + + + niosII_cpu_cpu_debug_slave_wrapper the_niosII_cpu_cpu_debug_slave_wrapper + ( + .MonDReg (MonDReg), + .break_readreg (break_readreg), + .clk (clk), + .dbrk_hit0_latch (dbrk_hit0_latch), + .dbrk_hit1_latch (dbrk_hit1_latch), + .dbrk_hit2_latch (dbrk_hit2_latch), + .dbrk_hit3_latch (dbrk_hit3_latch), + .debugack (debugack), + .jdo (jdo), + .jrst_n (jrst_n), + .monitor_error (monitor_error), + .monitor_ready (monitor_ready), + .reset_n (reset_n), + .resetlatch (resetlatch), + .st_ready_test_idle (st_ready_test_idle), + .take_action_break_a (take_action_break_a), + .take_action_break_b (take_action_break_b), + .take_action_break_c (take_action_break_c), + .take_action_ocimem_a (take_action_ocimem_a), + .take_action_ocimem_b (take_action_ocimem_b), + .take_action_tracectrl (take_action_tracectrl), + .take_no_action_break_a (take_no_action_break_a), + .take_no_action_break_b (take_no_action_break_b), + .take_no_action_break_c (take_no_action_break_c), + .take_no_action_ocimem_a (take_no_action_ocimem_a), + .tracemem_on (tracemem_on), + .tracemem_trcdata (tracemem_trcdata), + .tracemem_tw (tracemem_tw), + .trc_im_addr (trc_im_addr), + .trc_on (trc_on), + .trc_wrap (trc_wrap), + .trigbrktype (trigbrktype), + .trigger_state_1 (trigger_state_1) + ); + + //dummy sink, which is an e_mux + assign dummy_sink = tr_data | + trigout | + debugack; + + assign debugreq = 0; + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu ( + // inputs: + clk, + d_readdata, + d_waitrequest, + debug_mem_slave_address, + debug_mem_slave_byteenable, + debug_mem_slave_debugaccess, + debug_mem_slave_read, + debug_mem_slave_write, + debug_mem_slave_writedata, + i_readdata, + i_waitrequest, + irq, + reset_n, + reset_req, + + // outputs: + d_address, + d_byteenable, + d_read, + d_write, + d_writedata, + debug_mem_slave_debugaccess_to_roms, + debug_mem_slave_readdata, + debug_mem_slave_waitrequest, + debug_reset_request, + dummy_ci_port, + i_address, + i_read + ) +; + + output [ 17: 0] d_address; + output [ 3: 0] d_byteenable; + output d_read; + output d_write; + output [ 31: 0] d_writedata; + output debug_mem_slave_debugaccess_to_roms; + output [ 31: 0] debug_mem_slave_readdata; + output debug_mem_slave_waitrequest; + output debug_reset_request; + output dummy_ci_port; + output [ 17: 0] i_address; + output i_read; + input clk; + input [ 31: 0] d_readdata; + input d_waitrequest; + input [ 8: 0] debug_mem_slave_address; + input [ 3: 0] debug_mem_slave_byteenable; + input debug_mem_slave_debugaccess; + input debug_mem_slave_read; + input debug_mem_slave_write; + input [ 31: 0] debug_mem_slave_writedata; + input [ 31: 0] i_readdata; + input i_waitrequest; + input [ 31: 0] irq; + input reset_n; + input reset_req; + + +reg A_valid_from_M /* synthesis ALTERA_IP_DEBUG_VISIBLE = 1 */; +wire [ 1: 0] D_compare_op; +wire D_ctrl_alu_force_and; +wire D_ctrl_alu_force_xor; +wire D_ctrl_alu_signed_comparison; +wire D_ctrl_alu_subtract; +wire D_ctrl_b_is_dst; +wire D_ctrl_br; +wire D_ctrl_br_cmp; +wire D_ctrl_br_uncond; +wire D_ctrl_break; +wire D_ctrl_crst; +wire D_ctrl_custom; +wire D_ctrl_custom_multi; +wire D_ctrl_exception; +wire D_ctrl_force_src2_zero; +wire D_ctrl_hi_imm16; +wire D_ctrl_ignore_dst; +wire D_ctrl_implicit_dst_eretaddr; +wire D_ctrl_implicit_dst_retaddr; +wire D_ctrl_intr_inst; +wire D_ctrl_jmp_direct; +wire D_ctrl_jmp_indirect; +wire D_ctrl_ld; +wire D_ctrl_ld_ex; +wire D_ctrl_ld_io; +wire D_ctrl_ld_non_io; +wire D_ctrl_ld_signed; +wire D_ctrl_ld_st_ex; +wire D_ctrl_logic; +wire D_ctrl_mem16; +wire D_ctrl_mem32; +wire D_ctrl_mem8; +wire D_ctrl_rd_ctl_reg; +wire D_ctrl_retaddr; +wire D_ctrl_rot_right; +wire D_ctrl_set_src2_rem_imm; +wire D_ctrl_shift_logical; +wire D_ctrl_shift_right_arith; +wire D_ctrl_shift_rot; +wire D_ctrl_shift_rot_right; +wire D_ctrl_signed_imm12; +wire D_ctrl_src2_choose_imm; +wire D_ctrl_src_imm5_shift_rot; +wire D_ctrl_st; +wire D_ctrl_st_ex; +wire D_ctrl_uncond_cti_non_br; +wire D_ctrl_unsigned_lo_imm16; +wire D_ctrl_wrctl_inst; +wire [ 4: 0] D_dst_regnum; +wire [ 55: 0] D_inst; +wire D_is_opx_inst; +reg [ 31: 0] D_iw /* synthesis ALTERA_IP_DEBUG_VISIBLE = 1 */; +wire [ 4: 0] D_iw_a; +wire [ 4: 0] D_iw_b; +wire [ 4: 0] D_iw_c; +wire [ 4: 0] D_iw_control_regnum; +wire [ 7: 0] D_iw_custom_n; +wire D_iw_custom_readra; +wire D_iw_custom_readrb; +wire D_iw_custom_writerc; +wire [ 15: 0] D_iw_imm16; +wire [ 25: 0] D_iw_imm26; +wire [ 4: 0] D_iw_imm5; +wire [ 1: 0] D_iw_memsz; +wire [ 5: 0] D_iw_op; +wire [ 5: 0] D_iw_opx; +wire [ 15: 0] D_jmp_direct_target_waddr; +wire [ 1: 0] D_logic_op; +wire [ 1: 0] D_logic_op_raw; +wire D_mem16; +wire D_mem32; +wire D_mem8; +wire D_op_add; +wire D_op_addi; +wire D_op_and; +wire D_op_andhi; +wire D_op_andi; +wire D_op_beq; +wire D_op_bge; +wire D_op_bgeu; +wire D_op_blt; +wire D_op_bltu; +wire D_op_bne; +wire D_op_br; +wire D_op_break; +wire D_op_bret; +wire D_op_call; +wire D_op_callr; +wire D_op_cmpeq; +wire D_op_cmpeqi; +wire D_op_cmpge; +wire D_op_cmpgei; +wire D_op_cmpgeu; +wire D_op_cmpgeui; +wire D_op_cmplt; +wire D_op_cmplti; +wire D_op_cmpltu; +wire D_op_cmpltui; +wire D_op_cmpne; +wire D_op_cmpnei; +wire D_op_crst; +wire D_op_custom; +wire D_op_div; +wire D_op_divu; +wire D_op_eret; +wire D_op_flushd; +wire D_op_flushda; +wire D_op_flushi; +wire D_op_flushp; +wire D_op_hbreak; +wire D_op_initd; +wire D_op_initda; +wire D_op_initi; +wire D_op_intr; +wire D_op_jmp; +wire D_op_jmpi; +wire D_op_ldb; +wire D_op_ldbio; +wire D_op_ldbu; +wire D_op_ldbuio; +wire D_op_ldh; +wire D_op_ldhio; +wire D_op_ldhu; +wire D_op_ldhuio; +wire D_op_ldl; +wire D_op_ldw; +wire D_op_ldwio; +wire D_op_mul; +wire D_op_muli; +wire D_op_mulxss; +wire D_op_mulxsu; +wire D_op_mulxuu; +wire D_op_nextpc; +wire D_op_nor; +wire D_op_op_rsv02; +wire D_op_op_rsv09; +wire D_op_op_rsv10; +wire D_op_op_rsv17; +wire D_op_op_rsv18; +wire D_op_op_rsv25; +wire D_op_op_rsv26; +wire D_op_op_rsv33; +wire D_op_op_rsv34; +wire D_op_op_rsv41; +wire D_op_op_rsv42; +wire D_op_op_rsv49; +wire D_op_op_rsv57; +wire D_op_op_rsv61; +wire D_op_op_rsv62; +wire D_op_op_rsv63; +wire D_op_opx_rsv00; +wire D_op_opx_rsv10; +wire D_op_opx_rsv15; +wire D_op_opx_rsv17; +wire D_op_opx_rsv21; +wire D_op_opx_rsv25; +wire D_op_opx_rsv33; +wire D_op_opx_rsv34; +wire D_op_opx_rsv35; +wire D_op_opx_rsv42; +wire D_op_opx_rsv43; +wire D_op_opx_rsv44; +wire D_op_opx_rsv47; +wire D_op_opx_rsv50; +wire D_op_opx_rsv51; +wire D_op_opx_rsv55; +wire D_op_opx_rsv56; +wire D_op_opx_rsv60; +wire D_op_opx_rsv63; +wire D_op_or; +wire D_op_orhi; +wire D_op_ori; +wire D_op_rdctl; +wire D_op_rdprs; +wire D_op_ret; +wire D_op_rol; +wire D_op_roli; +wire D_op_ror; +wire D_op_sll; +wire D_op_slli; +wire D_op_sra; +wire D_op_srai; +wire D_op_srl; +wire D_op_srli; +wire D_op_stb; +wire D_op_stbio; +wire D_op_stc; +wire D_op_sth; +wire D_op_sthio; +wire D_op_stw; +wire D_op_stwio; +wire D_op_sub; +wire D_op_sync; +wire D_op_trap; +wire D_op_wrctl; +wire D_op_wrprs; +wire D_op_xor; +wire D_op_xorhi; +wire D_op_xori; +reg D_valid; +wire [ 71: 0] D_vinst; +wire D_wr_dst_reg; +wire [ 31: 0] E_alu_result; +reg E_alu_sub; +wire [ 32: 0] E_arith_result; +wire [ 31: 0] E_arith_src1; +wire [ 31: 0] E_arith_src2; +wire E_ci_multi_stall; +wire [ 31: 0] E_ci_result; +wire E_cmp_result; +wire [ 31: 0] E_control_rd_data; +wire E_eq; +reg E_invert_arith_src_msb; +wire E_ld_stall; +wire [ 31: 0] E_logic_result; +wire E_logic_result_is_0; +wire E_lt; +wire [ 17: 0] E_mem_baddr; +wire [ 3: 0] E_mem_byte_en; +reg E_new_inst; +wire E_rf_ecc_recoverable_valid; +wire E_rf_ecc_unrecoverable_valid; +wire E_rf_ecc_valid_any; +reg [ 4: 0] E_shift_rot_cnt; +wire [ 4: 0] E_shift_rot_cnt_nxt; +wire E_shift_rot_done; +wire E_shift_rot_fill_bit; +reg [ 31: 0] E_shift_rot_result; +wire [ 31: 0] E_shift_rot_result_nxt; +wire [ 4: 0] E_shift_rot_shfcnt; +wire E_shift_rot_stall; +reg [ 31: 0] E_src1; +reg [ 31: 0] E_src2; +wire [ 31: 0] E_st_data; +wire E_st_stall; +wire E_stall; +wire E_valid; +reg E_valid_from_R; +wire [ 71: 0] E_vinst; +wire E_wrctl_bstatus; +wire E_wrctl_estatus; +wire E_wrctl_ienable; +wire E_wrctl_status; +wire [ 31: 0] F_av_iw; +wire [ 4: 0] F_av_iw_a; +wire [ 4: 0] F_av_iw_b; +wire [ 4: 0] F_av_iw_c; +wire [ 4: 0] F_av_iw_control_regnum; +wire [ 7: 0] F_av_iw_custom_n; +wire F_av_iw_custom_readra; +wire F_av_iw_custom_readrb; +wire F_av_iw_custom_writerc; +wire [ 15: 0] F_av_iw_imm16; +wire [ 25: 0] F_av_iw_imm26; +wire [ 4: 0] F_av_iw_imm5; +wire [ 1: 0] F_av_iw_memsz; +wire [ 5: 0] F_av_iw_op; +wire [ 5: 0] F_av_iw_opx; +wire F_av_mem16; +wire F_av_mem32; +wire F_av_mem8; +wire [ 55: 0] F_inst; +wire F_is_opx_inst; +wire [ 31: 0] F_iw; +wire [ 4: 0] F_iw_a; +wire [ 4: 0] F_iw_b; +wire [ 4: 0] F_iw_c; +wire [ 4: 0] F_iw_control_regnum; +wire [ 7: 0] F_iw_custom_n; +wire F_iw_custom_readra; +wire F_iw_custom_readrb; +wire F_iw_custom_writerc; +wire [ 15: 0] F_iw_imm16; +wire [ 25: 0] F_iw_imm26; +wire [ 4: 0] F_iw_imm5; +wire [ 1: 0] F_iw_memsz; +wire [ 5: 0] F_iw_op; +wire [ 5: 0] F_iw_opx; +wire F_mem16; +wire F_mem32; +wire F_mem8; +wire F_op_add; +wire F_op_addi; +wire F_op_and; +wire F_op_andhi; +wire F_op_andi; +wire F_op_beq; +wire F_op_bge; +wire F_op_bgeu; +wire F_op_blt; +wire F_op_bltu; +wire F_op_bne; +wire F_op_br; +wire F_op_break; +wire F_op_bret; +wire F_op_call; +wire F_op_callr; +wire F_op_cmpeq; +wire F_op_cmpeqi; +wire F_op_cmpge; +wire F_op_cmpgei; +wire F_op_cmpgeu; +wire F_op_cmpgeui; +wire F_op_cmplt; +wire F_op_cmplti; +wire F_op_cmpltu; +wire F_op_cmpltui; +wire F_op_cmpne; +wire F_op_cmpnei; +wire F_op_crst; +wire F_op_custom; +wire F_op_div; +wire F_op_divu; +wire F_op_eret; +wire F_op_flushd; +wire F_op_flushda; +wire F_op_flushi; +wire F_op_flushp; +wire F_op_hbreak; +wire F_op_initd; +wire F_op_initda; +wire F_op_initi; +wire F_op_intr; +wire F_op_jmp; +wire F_op_jmpi; +wire F_op_ldb; +wire F_op_ldbio; +wire F_op_ldbu; +wire F_op_ldbuio; +wire F_op_ldh; +wire F_op_ldhio; +wire F_op_ldhu; +wire F_op_ldhuio; +wire F_op_ldl; +wire F_op_ldw; +wire F_op_ldwio; +wire F_op_mul; +wire F_op_muli; +wire F_op_mulxss; +wire F_op_mulxsu; +wire F_op_mulxuu; +wire F_op_nextpc; +wire F_op_nor; +wire F_op_op_rsv02; +wire F_op_op_rsv09; +wire F_op_op_rsv10; +wire F_op_op_rsv17; +wire F_op_op_rsv18; +wire F_op_op_rsv25; +wire F_op_op_rsv26; +wire F_op_op_rsv33; +wire F_op_op_rsv34; +wire F_op_op_rsv41; +wire F_op_op_rsv42; +wire F_op_op_rsv49; +wire F_op_op_rsv57; +wire F_op_op_rsv61; +wire F_op_op_rsv62; +wire F_op_op_rsv63; +wire F_op_opx_rsv00; +wire F_op_opx_rsv10; +wire F_op_opx_rsv15; +wire F_op_opx_rsv17; +wire F_op_opx_rsv21; +wire F_op_opx_rsv25; +wire F_op_opx_rsv33; +wire F_op_opx_rsv34; +wire F_op_opx_rsv35; +wire F_op_opx_rsv42; +wire F_op_opx_rsv43; +wire F_op_opx_rsv44; +wire F_op_opx_rsv47; +wire F_op_opx_rsv50; +wire F_op_opx_rsv51; +wire F_op_opx_rsv55; +wire F_op_opx_rsv56; +wire F_op_opx_rsv60; +wire F_op_opx_rsv63; +wire F_op_or; +wire F_op_orhi; +wire F_op_ori; +wire F_op_rdctl; +wire F_op_rdprs; +wire F_op_ret; +wire F_op_rol; +wire F_op_roli; +wire F_op_ror; +wire F_op_sll; +wire F_op_slli; +wire F_op_sra; +wire F_op_srai; +wire F_op_srl; +wire F_op_srli; +wire F_op_stb; +wire F_op_stbio; +wire F_op_stc; +wire F_op_sth; +wire F_op_sthio; +wire F_op_stw; +wire F_op_stwio; +wire F_op_sub; +wire F_op_sync; +wire F_op_trap; +wire F_op_wrctl; +wire F_op_wrprs; +wire F_op_xor; +wire F_op_xorhi; +wire F_op_xori; +reg [ 15: 0] F_pc /* synthesis ALTERA_IP_DEBUG_VISIBLE = 1 */; +wire F_pc_en; +wire [ 15: 0] F_pc_no_crst_nxt; +wire [ 15: 0] F_pc_nxt; +wire [ 15: 0] F_pc_plus_one; +wire [ 1: 0] F_pc_sel_nxt; +wire [ 17: 0] F_pcb; +wire [ 17: 0] F_pcb_nxt; +wire [ 17: 0] F_pcb_plus_four; +wire F_valid; +wire [ 71: 0] F_vinst; +reg [ 1: 0] R_compare_op; +reg R_ctrl_alu_force_and; +wire R_ctrl_alu_force_and_nxt; +reg R_ctrl_alu_force_xor; +wire R_ctrl_alu_force_xor_nxt; +reg R_ctrl_alu_signed_comparison; +wire R_ctrl_alu_signed_comparison_nxt; +reg R_ctrl_alu_subtract; +wire R_ctrl_alu_subtract_nxt; +reg R_ctrl_b_is_dst; +wire R_ctrl_b_is_dst_nxt; +reg R_ctrl_br; +reg R_ctrl_br_cmp; +wire R_ctrl_br_cmp_nxt; +wire R_ctrl_br_nxt; +reg R_ctrl_br_uncond; +wire R_ctrl_br_uncond_nxt; +reg R_ctrl_break; +wire R_ctrl_break_nxt; +reg R_ctrl_crst; +wire R_ctrl_crst_nxt; +reg R_ctrl_custom; +reg R_ctrl_custom_multi; +wire R_ctrl_custom_multi_nxt; +wire R_ctrl_custom_nxt; +reg R_ctrl_exception; +wire R_ctrl_exception_nxt; +reg R_ctrl_force_src2_zero; +wire R_ctrl_force_src2_zero_nxt; +reg R_ctrl_hi_imm16; +wire R_ctrl_hi_imm16_nxt; +reg R_ctrl_ignore_dst; +wire R_ctrl_ignore_dst_nxt; +reg R_ctrl_implicit_dst_eretaddr; +wire R_ctrl_implicit_dst_eretaddr_nxt; +reg R_ctrl_implicit_dst_retaddr; +wire R_ctrl_implicit_dst_retaddr_nxt; +reg R_ctrl_intr_inst; +wire R_ctrl_intr_inst_nxt; +reg R_ctrl_jmp_direct; +wire R_ctrl_jmp_direct_nxt; +reg R_ctrl_jmp_indirect; +wire R_ctrl_jmp_indirect_nxt; +reg R_ctrl_ld; +reg R_ctrl_ld_ex; +wire R_ctrl_ld_ex_nxt; +reg R_ctrl_ld_io; +wire R_ctrl_ld_io_nxt; +reg R_ctrl_ld_non_io; +wire R_ctrl_ld_non_io_nxt; +wire R_ctrl_ld_nxt; +reg R_ctrl_ld_signed; +wire R_ctrl_ld_signed_nxt; +reg R_ctrl_ld_st_ex; +wire R_ctrl_ld_st_ex_nxt; +reg R_ctrl_logic; +wire R_ctrl_logic_nxt; +reg R_ctrl_mem16; +wire R_ctrl_mem16_nxt; +reg R_ctrl_mem32; +wire R_ctrl_mem32_nxt; +reg R_ctrl_mem8; +wire R_ctrl_mem8_nxt; +reg R_ctrl_rd_ctl_reg; +wire R_ctrl_rd_ctl_reg_nxt; +reg R_ctrl_retaddr; +wire R_ctrl_retaddr_nxt; +reg R_ctrl_rot_right; +wire R_ctrl_rot_right_nxt; +reg R_ctrl_set_src2_rem_imm; +wire R_ctrl_set_src2_rem_imm_nxt; +reg R_ctrl_shift_logical; +wire R_ctrl_shift_logical_nxt; +reg R_ctrl_shift_right_arith; +wire R_ctrl_shift_right_arith_nxt; +reg R_ctrl_shift_rot; +wire R_ctrl_shift_rot_nxt; +reg R_ctrl_shift_rot_right; +wire R_ctrl_shift_rot_right_nxt; +reg R_ctrl_signed_imm12; +wire R_ctrl_signed_imm12_nxt; +reg R_ctrl_src2_choose_imm; +wire R_ctrl_src2_choose_imm_nxt; +reg R_ctrl_src_imm5_shift_rot; +wire R_ctrl_src_imm5_shift_rot_nxt; +reg R_ctrl_st; +reg R_ctrl_st_ex; +wire R_ctrl_st_ex_nxt; +wire R_ctrl_st_nxt; +reg R_ctrl_uncond_cti_non_br; +wire R_ctrl_uncond_cti_non_br_nxt; +reg R_ctrl_unsigned_lo_imm16; +wire R_ctrl_unsigned_lo_imm16_nxt; +reg R_ctrl_wrctl_inst; +wire R_ctrl_wrctl_inst_nxt; +reg [ 4: 0] R_dst_regnum /* synthesis ALTERA_IP_DEBUG_VISIBLE = 1 */; +wire R_en; +reg [ 1: 0] R_logic_op; +wire [ 31: 0] R_rf_a; +wire [ 31: 0] R_rf_a_q; +wire [ 31: 0] R_rf_b; +wire [ 31: 0] R_rf_b_q; +wire [ 31: 0] R_src1; +wire [ 31: 0] R_src2; +wire [ 15: 0] R_src2_hi; +wire [ 15: 0] R_src2_lo; +reg R_src2_use_imm; +wire [ 7: 0] R_stb_data; +wire [ 15: 0] R_sth_data; +wire [ 31: 0] R_stw_data; +reg R_valid; +wire [ 71: 0] R_vinst; +reg R_wr_dst_reg; +reg W1_rf_ecc_recoverable_valid; +reg [ 31: 0] W_alu_result; +wire W_br_taken; +reg W_bstatus_reg; +wire W_bstatus_reg_inst_nxt; +wire W_bstatus_reg_nxt; +reg [ 31: 0] W_cdsr_reg; +reg W_cmp_result; +reg [ 31: 0] W_control_rd_data; +wire [ 31: 0] W_cpuid_reg; +wire [ 4: 0] W_dst_regnum; +reg W_estatus_reg; +wire W_estatus_reg_inst_nxt; +wire W_estatus_reg_nxt; +reg [ 31: 0] W_ienable_reg; +wire [ 31: 0] W_ienable_reg_nxt; +reg [ 31: 0] W_ipending_reg; +wire [ 31: 0] W_ipending_reg_nxt; +wire [ 17: 0] W_mem_baddr; +reg W_rf_ecc_recoverable_valid; +reg W_rf_ecc_unrecoverable_valid; +wire W_rf_ecc_valid_any; +wire [ 31: 0] W_rf_wr_data; +wire W_rf_wren; +wire W_status_reg; +reg W_status_reg_pie; +wire W_status_reg_pie_inst_nxt; +wire W_status_reg_pie_nxt; +reg W_up_ex_mon_state; +reg W_valid /* synthesis ALTERA_IP_DEBUG_VISIBLE = 1 */; +wire W_valid_from_M; +wire [ 71: 0] W_vinst; +wire [ 31: 0] W_wr_data; +wire [ 31: 0] W_wr_data_non_zero; +wire av_fill_bit; +reg [ 1: 0] av_ld_align_cycle; +wire [ 1: 0] av_ld_align_cycle_nxt; +wire av_ld_align_one_more_cycle; +reg av_ld_aligning_data; +wire av_ld_aligning_data_nxt; +reg [ 7: 0] av_ld_byte0_data; +wire [ 7: 0] av_ld_byte0_data_nxt; +reg [ 7: 0] av_ld_byte1_data; +wire av_ld_byte1_data_en; +wire [ 7: 0] av_ld_byte1_data_nxt; +reg [ 7: 0] av_ld_byte2_data; +wire [ 7: 0] av_ld_byte2_data_nxt; +reg [ 7: 0] av_ld_byte3_data; +wire [ 7: 0] av_ld_byte3_data_nxt; +wire [ 31: 0] av_ld_data_aligned_filtered; +wire [ 31: 0] av_ld_data_aligned_unfiltered; +wire av_ld_done; +wire av_ld_extend; +wire av_ld_getting_data; +wire av_ld_rshift8; +reg av_ld_waiting_for_data; +wire av_ld_waiting_for_data_nxt; +wire av_sign_bit; +wire [ 17: 0] d_address; +reg [ 3: 0] d_byteenable; +reg d_read; +wire d_read_nxt; +reg d_write; +wire d_write_nxt; +reg [ 31: 0] d_writedata; +wire debug_mem_slave_clk; +wire debug_mem_slave_debugaccess_to_roms; +wire [ 31: 0] debug_mem_slave_readdata; +wire debug_mem_slave_reset; +wire debug_mem_slave_waitrequest; +wire debug_reset_request; +wire dummy_ci_port; +reg hbreak_enabled; +reg hbreak_pending; +wire hbreak_pending_nxt; +wire hbreak_req; +wire [ 17: 0] i_address; +reg i_read; +wire i_read_nxt; +wire [ 31: 0] iactive; +wire intr_req; +wire oci_hbreak_req; +wire [ 31: 0] oci_ienable; +wire oci_single_step_mode; +wire oci_tb_hbreak_req; +wire test_has_ended; +reg wait_for_one_post_bret_inst; + //the_niosII_cpu_cpu_test_bench, which is an e_instance + niosII_cpu_cpu_test_bench the_niosII_cpu_cpu_test_bench + ( + .D_iw (D_iw), + .D_iw_op (D_iw_op), + .D_iw_opx (D_iw_opx), + .D_valid (D_valid), + .E_valid (E_valid), + .F_pcb (F_pcb), + .F_valid (F_valid), + .R_ctrl_ld (R_ctrl_ld), + .R_ctrl_ld_non_io (R_ctrl_ld_non_io), + .R_dst_regnum (R_dst_regnum), + .R_wr_dst_reg (R_wr_dst_reg), + .W_valid (W_valid), + .W_vinst (W_vinst), + .W_wr_data (W_wr_data), + .av_ld_data_aligned_filtered (av_ld_data_aligned_filtered), + .av_ld_data_aligned_unfiltered (av_ld_data_aligned_unfiltered), + .clk (clk), + .d_address (d_address), + .d_byteenable (d_byteenable), + .d_read (d_read), + .d_write (d_write), + .i_address (i_address), + .i_read (i_read), + .i_readdata (i_readdata), + .i_waitrequest (i_waitrequest), + .reset_n (reset_n), + .test_has_ended (test_has_ended) + ); + + assign F_av_iw_a = F_av_iw[31 : 27]; + assign F_av_iw_b = F_av_iw[26 : 22]; + assign F_av_iw_c = F_av_iw[21 : 17]; + assign F_av_iw_custom_n = F_av_iw[13 : 6]; + assign F_av_iw_custom_readra = F_av_iw[16]; + assign F_av_iw_custom_readrb = F_av_iw[15]; + assign F_av_iw_custom_writerc = F_av_iw[14]; + assign F_av_iw_opx = F_av_iw[16 : 11]; + assign F_av_iw_op = F_av_iw[5 : 0]; + assign F_av_iw_imm5 = F_av_iw[10 : 6]; + assign F_av_iw_imm16 = F_av_iw[21 : 6]; + assign F_av_iw_imm26 = F_av_iw[31 : 6]; + assign F_av_iw_memsz = F_av_iw[4 : 3]; + assign F_av_iw_control_regnum = F_av_iw[10 : 6]; + assign F_av_mem8 = F_av_iw_memsz == 2'b00; + assign F_av_mem16 = F_av_iw_memsz == 2'b01; + assign F_av_mem32 = F_av_iw_memsz[1] == 1'b1; + assign F_iw_a = F_iw[31 : 27]; + assign F_iw_b = F_iw[26 : 22]; + assign F_iw_c = F_iw[21 : 17]; + assign F_iw_custom_n = F_iw[13 : 6]; + assign F_iw_custom_readra = F_iw[16]; + assign F_iw_custom_readrb = F_iw[15]; + assign F_iw_custom_writerc = F_iw[14]; + assign F_iw_opx = F_iw[16 : 11]; + assign F_iw_op = F_iw[5 : 0]; + assign F_iw_imm5 = F_iw[10 : 6]; + assign F_iw_imm16 = F_iw[21 : 6]; + assign F_iw_imm26 = F_iw[31 : 6]; + assign F_iw_memsz = F_iw[4 : 3]; + assign F_iw_control_regnum = F_iw[10 : 6]; + assign F_mem8 = F_iw_memsz == 2'b00; + assign F_mem16 = F_iw_memsz == 2'b01; + assign F_mem32 = F_iw_memsz[1] == 1'b1; + assign D_iw_a = D_iw[31 : 27]; + assign D_iw_b = D_iw[26 : 22]; + assign D_iw_c = D_iw[21 : 17]; + assign D_iw_custom_n = D_iw[13 : 6]; + assign D_iw_custom_readra = D_iw[16]; + assign D_iw_custom_readrb = D_iw[15]; + assign D_iw_custom_writerc = D_iw[14]; + assign D_iw_opx = D_iw[16 : 11]; + assign D_iw_op = D_iw[5 : 0]; + assign D_iw_imm5 = D_iw[10 : 6]; + assign D_iw_imm16 = D_iw[21 : 6]; + assign D_iw_imm26 = D_iw[31 : 6]; + assign D_iw_memsz = D_iw[4 : 3]; + assign D_iw_control_regnum = D_iw[10 : 6]; + assign D_mem8 = D_iw_memsz == 2'b00; + assign D_mem16 = D_iw_memsz == 2'b01; + assign D_mem32 = D_iw_memsz[1] == 1'b1; + assign F_op_call = F_iw_op == 0; + assign F_op_jmpi = F_iw_op == 1; + assign F_op_op_rsv02 = F_iw_op == 2; + assign F_op_ldbu = F_iw_op == 3; + assign F_op_addi = F_iw_op == 4; + assign F_op_stb = F_iw_op == 5; + assign F_op_br = F_iw_op == 6; + assign F_op_ldb = F_iw_op == 7; + assign F_op_cmpgei = F_iw_op == 8; + assign F_op_op_rsv09 = F_iw_op == 9; + assign F_op_op_rsv10 = F_iw_op == 10; + assign F_op_ldhu = F_iw_op == 11; + assign F_op_andi = F_iw_op == 12; + assign F_op_sth = F_iw_op == 13; + assign F_op_bge = F_iw_op == 14; + assign F_op_ldh = F_iw_op == 15; + assign F_op_cmplti = F_iw_op == 16; + assign F_op_op_rsv17 = F_iw_op == 17; + assign F_op_op_rsv18 = F_iw_op == 18; + assign F_op_initda = F_iw_op == 19; + assign F_op_ori = F_iw_op == 20; + assign F_op_stw = F_iw_op == 21; + assign F_op_blt = F_iw_op == 22; + assign F_op_ldw = F_iw_op == 23; + assign F_op_cmpnei = F_iw_op == 24; + assign F_op_op_rsv25 = F_iw_op == 25; + assign F_op_op_rsv26 = F_iw_op == 26; + assign F_op_flushda = F_iw_op == 27; + assign F_op_xori = F_iw_op == 28; + assign F_op_stc = F_iw_op == 29; + assign F_op_bne = F_iw_op == 30; + assign F_op_ldl = F_iw_op == 31; + assign F_op_cmpeqi = F_iw_op == 32; + assign F_op_op_rsv33 = F_iw_op == 33; + assign F_op_op_rsv34 = F_iw_op == 34; + assign F_op_ldbuio = F_iw_op == 35; + assign F_op_muli = F_iw_op == 36; + assign F_op_stbio = F_iw_op == 37; + assign F_op_beq = F_iw_op == 38; + assign F_op_ldbio = F_iw_op == 39; + assign F_op_cmpgeui = F_iw_op == 40; + assign F_op_op_rsv41 = F_iw_op == 41; + assign F_op_op_rsv42 = F_iw_op == 42; + assign F_op_ldhuio = F_iw_op == 43; + assign F_op_andhi = F_iw_op == 44; + assign F_op_sthio = F_iw_op == 45; + assign F_op_bgeu = F_iw_op == 46; + assign F_op_ldhio = F_iw_op == 47; + assign F_op_cmpltui = F_iw_op == 48; + assign F_op_op_rsv49 = F_iw_op == 49; + assign F_op_custom = F_iw_op == 50; + assign F_op_initd = F_iw_op == 51; + assign F_op_orhi = F_iw_op == 52; + assign F_op_stwio = F_iw_op == 53; + assign F_op_bltu = F_iw_op == 54; + assign F_op_ldwio = F_iw_op == 55; + assign F_op_rdprs = F_iw_op == 56; + assign F_op_op_rsv57 = F_iw_op == 57; + assign F_op_flushd = F_iw_op == 59; + assign F_op_xorhi = F_iw_op == 60; + assign F_op_op_rsv61 = F_iw_op == 61; + assign F_op_op_rsv62 = F_iw_op == 62; + assign F_op_op_rsv63 = F_iw_op == 63; + assign F_op_opx_rsv00 = (F_iw_opx == 0) & F_is_opx_inst; + assign F_op_eret = (F_iw_opx == 1) & F_is_opx_inst; + assign F_op_roli = (F_iw_opx == 2) & F_is_opx_inst; + assign F_op_rol = (F_iw_opx == 3) & F_is_opx_inst; + assign F_op_flushp = (F_iw_opx == 4) & F_is_opx_inst; + assign F_op_ret = (F_iw_opx == 5) & F_is_opx_inst; + assign F_op_nor = (F_iw_opx == 6) & F_is_opx_inst; + assign F_op_mulxuu = (F_iw_opx == 7) & F_is_opx_inst; + assign F_op_cmpge = (F_iw_opx == 8) & F_is_opx_inst; + assign F_op_bret = (F_iw_opx == 9) & F_is_opx_inst; + assign F_op_opx_rsv10 = (F_iw_opx == 10) & F_is_opx_inst; + assign F_op_ror = (F_iw_opx == 11) & F_is_opx_inst; + assign F_op_flushi = (F_iw_opx == 12) & F_is_opx_inst; + assign F_op_jmp = (F_iw_opx == 13) & F_is_opx_inst; + assign F_op_and = (F_iw_opx == 14) & F_is_opx_inst; + assign F_op_opx_rsv15 = (F_iw_opx == 15) & F_is_opx_inst; + assign F_op_cmplt = (F_iw_opx == 16) & F_is_opx_inst; + assign F_op_opx_rsv17 = (F_iw_opx == 17) & F_is_opx_inst; + assign F_op_slli = (F_iw_opx == 18) & F_is_opx_inst; + assign F_op_sll = (F_iw_opx == 19) & F_is_opx_inst; + assign F_op_wrprs = (F_iw_opx == 20) & F_is_opx_inst; + assign F_op_opx_rsv21 = (F_iw_opx == 21) & F_is_opx_inst; + assign F_op_or = (F_iw_opx == 22) & F_is_opx_inst; + assign F_op_mulxsu = (F_iw_opx == 23) & F_is_opx_inst; + assign F_op_cmpne = (F_iw_opx == 24) & F_is_opx_inst; + assign F_op_opx_rsv25 = (F_iw_opx == 25) & F_is_opx_inst; + assign F_op_srli = (F_iw_opx == 26) & F_is_opx_inst; + assign F_op_srl = (F_iw_opx == 27) & F_is_opx_inst; + assign F_op_nextpc = (F_iw_opx == 28) & F_is_opx_inst; + assign F_op_callr = (F_iw_opx == 29) & F_is_opx_inst; + assign F_op_xor = (F_iw_opx == 30) & F_is_opx_inst; + assign F_op_mulxss = (F_iw_opx == 31) & F_is_opx_inst; + assign F_op_cmpeq = (F_iw_opx == 32) & F_is_opx_inst; + assign F_op_opx_rsv33 = (F_iw_opx == 33) & F_is_opx_inst; + assign F_op_opx_rsv34 = (F_iw_opx == 34) & F_is_opx_inst; + assign F_op_opx_rsv35 = (F_iw_opx == 35) & F_is_opx_inst; + assign F_op_divu = (F_iw_opx == 36) & F_is_opx_inst; + assign F_op_div = (F_iw_opx == 37) & F_is_opx_inst; + assign F_op_rdctl = (F_iw_opx == 38) & F_is_opx_inst; + assign F_op_mul = (F_iw_opx == 39) & F_is_opx_inst; + assign F_op_cmpgeu = (F_iw_opx == 40) & F_is_opx_inst; + assign F_op_initi = (F_iw_opx == 41) & F_is_opx_inst; + assign F_op_opx_rsv42 = (F_iw_opx == 42) & F_is_opx_inst; + assign F_op_opx_rsv43 = (F_iw_opx == 43) & F_is_opx_inst; + assign F_op_opx_rsv44 = (F_iw_opx == 44) & F_is_opx_inst; + assign F_op_trap = (F_iw_opx == 45) & F_is_opx_inst; + assign F_op_wrctl = (F_iw_opx == 46) & F_is_opx_inst; + assign F_op_opx_rsv47 = (F_iw_opx == 47) & F_is_opx_inst; + assign F_op_cmpltu = (F_iw_opx == 48) & F_is_opx_inst; + assign F_op_add = (F_iw_opx == 49) & F_is_opx_inst; + assign F_op_opx_rsv50 = (F_iw_opx == 50) & F_is_opx_inst; + assign F_op_opx_rsv51 = (F_iw_opx == 51) & F_is_opx_inst; + assign F_op_break = (F_iw_opx == 52) & F_is_opx_inst; + assign F_op_hbreak = (F_iw_opx == 53) & F_is_opx_inst; + assign F_op_sync = (F_iw_opx == 54) & F_is_opx_inst; + assign F_op_opx_rsv55 = (F_iw_opx == 55) & F_is_opx_inst; + assign F_op_opx_rsv56 = (F_iw_opx == 56) & F_is_opx_inst; + assign F_op_sub = (F_iw_opx == 57) & F_is_opx_inst; + assign F_op_srai = (F_iw_opx == 58) & F_is_opx_inst; + assign F_op_sra = (F_iw_opx == 59) & F_is_opx_inst; + assign F_op_opx_rsv60 = (F_iw_opx == 60) & F_is_opx_inst; + assign F_op_intr = (F_iw_opx == 61) & F_is_opx_inst; + assign F_op_crst = (F_iw_opx == 62) & F_is_opx_inst; + assign F_op_opx_rsv63 = (F_iw_opx == 63) & F_is_opx_inst; + assign F_is_opx_inst = F_iw_op == 58; + assign D_op_call = D_iw_op == 0; + assign D_op_jmpi = D_iw_op == 1; + assign D_op_op_rsv02 = D_iw_op == 2; + assign D_op_ldbu = D_iw_op == 3; + assign D_op_addi = D_iw_op == 4; + assign D_op_stb = D_iw_op == 5; + assign D_op_br = D_iw_op == 6; + assign D_op_ldb = D_iw_op == 7; + assign D_op_cmpgei = D_iw_op == 8; + assign D_op_op_rsv09 = D_iw_op == 9; + assign D_op_op_rsv10 = D_iw_op == 10; + assign D_op_ldhu = D_iw_op == 11; + assign D_op_andi = D_iw_op == 12; + assign D_op_sth = D_iw_op == 13; + assign D_op_bge = D_iw_op == 14; + assign D_op_ldh = D_iw_op == 15; + assign D_op_cmplti = D_iw_op == 16; + assign D_op_op_rsv17 = D_iw_op == 17; + assign D_op_op_rsv18 = D_iw_op == 18; + assign D_op_initda = D_iw_op == 19; + assign D_op_ori = D_iw_op == 20; + assign D_op_stw = D_iw_op == 21; + assign D_op_blt = D_iw_op == 22; + assign D_op_ldw = D_iw_op == 23; + assign D_op_cmpnei = D_iw_op == 24; + assign D_op_op_rsv25 = D_iw_op == 25; + assign D_op_op_rsv26 = D_iw_op == 26; + assign D_op_flushda = D_iw_op == 27; + assign D_op_xori = D_iw_op == 28; + assign D_op_stc = D_iw_op == 29; + assign D_op_bne = D_iw_op == 30; + assign D_op_ldl = D_iw_op == 31; + assign D_op_cmpeqi = D_iw_op == 32; + assign D_op_op_rsv33 = D_iw_op == 33; + assign D_op_op_rsv34 = D_iw_op == 34; + assign D_op_ldbuio = D_iw_op == 35; + assign D_op_muli = D_iw_op == 36; + assign D_op_stbio = D_iw_op == 37; + assign D_op_beq = D_iw_op == 38; + assign D_op_ldbio = D_iw_op == 39; + assign D_op_cmpgeui = D_iw_op == 40; + assign D_op_op_rsv41 = D_iw_op == 41; + assign D_op_op_rsv42 = D_iw_op == 42; + assign D_op_ldhuio = D_iw_op == 43; + assign D_op_andhi = D_iw_op == 44; + assign D_op_sthio = D_iw_op == 45; + assign D_op_bgeu = D_iw_op == 46; + assign D_op_ldhio = D_iw_op == 47; + assign D_op_cmpltui = D_iw_op == 48; + assign D_op_op_rsv49 = D_iw_op == 49; + assign D_op_custom = D_iw_op == 50; + assign D_op_initd = D_iw_op == 51; + assign D_op_orhi = D_iw_op == 52; + assign D_op_stwio = D_iw_op == 53; + assign D_op_bltu = D_iw_op == 54; + assign D_op_ldwio = D_iw_op == 55; + assign D_op_rdprs = D_iw_op == 56; + assign D_op_op_rsv57 = D_iw_op == 57; + assign D_op_flushd = D_iw_op == 59; + assign D_op_xorhi = D_iw_op == 60; + assign D_op_op_rsv61 = D_iw_op == 61; + assign D_op_op_rsv62 = D_iw_op == 62; + assign D_op_op_rsv63 = D_iw_op == 63; + assign D_op_opx_rsv00 = (D_iw_opx == 0) & D_is_opx_inst; + assign D_op_eret = (D_iw_opx == 1) & D_is_opx_inst; + assign D_op_roli = (D_iw_opx == 2) & D_is_opx_inst; + assign D_op_rol = (D_iw_opx == 3) & D_is_opx_inst; + assign D_op_flushp = (D_iw_opx == 4) & D_is_opx_inst; + assign D_op_ret = (D_iw_opx == 5) & D_is_opx_inst; + assign D_op_nor = (D_iw_opx == 6) & D_is_opx_inst; + assign D_op_mulxuu = (D_iw_opx == 7) & D_is_opx_inst; + assign D_op_cmpge = (D_iw_opx == 8) & D_is_opx_inst; + assign D_op_bret = (D_iw_opx == 9) & D_is_opx_inst; + assign D_op_opx_rsv10 = (D_iw_opx == 10) & D_is_opx_inst; + assign D_op_ror = (D_iw_opx == 11) & D_is_opx_inst; + assign D_op_flushi = (D_iw_opx == 12) & D_is_opx_inst; + assign D_op_jmp = (D_iw_opx == 13) & D_is_opx_inst; + assign D_op_and = (D_iw_opx == 14) & D_is_opx_inst; + assign D_op_opx_rsv15 = (D_iw_opx == 15) & D_is_opx_inst; + assign D_op_cmplt = (D_iw_opx == 16) & D_is_opx_inst; + assign D_op_opx_rsv17 = (D_iw_opx == 17) & D_is_opx_inst; + assign D_op_slli = (D_iw_opx == 18) & D_is_opx_inst; + assign D_op_sll = (D_iw_opx == 19) & D_is_opx_inst; + assign D_op_wrprs = (D_iw_opx == 20) & D_is_opx_inst; + assign D_op_opx_rsv21 = (D_iw_opx == 21) & D_is_opx_inst; + assign D_op_or = (D_iw_opx == 22) & D_is_opx_inst; + assign D_op_mulxsu = (D_iw_opx == 23) & D_is_opx_inst; + assign D_op_cmpne = (D_iw_opx == 24) & D_is_opx_inst; + assign D_op_opx_rsv25 = (D_iw_opx == 25) & D_is_opx_inst; + assign D_op_srli = (D_iw_opx == 26) & D_is_opx_inst; + assign D_op_srl = (D_iw_opx == 27) & D_is_opx_inst; + assign D_op_nextpc = (D_iw_opx == 28) & D_is_opx_inst; + assign D_op_callr = (D_iw_opx == 29) & D_is_opx_inst; + assign D_op_xor = (D_iw_opx == 30) & D_is_opx_inst; + assign D_op_mulxss = (D_iw_opx == 31) & D_is_opx_inst; + assign D_op_cmpeq = (D_iw_opx == 32) & D_is_opx_inst; + assign D_op_opx_rsv33 = (D_iw_opx == 33) & D_is_opx_inst; + assign D_op_opx_rsv34 = (D_iw_opx == 34) & D_is_opx_inst; + assign D_op_opx_rsv35 = (D_iw_opx == 35) & D_is_opx_inst; + assign D_op_divu = (D_iw_opx == 36) & D_is_opx_inst; + assign D_op_div = (D_iw_opx == 37) & D_is_opx_inst; + assign D_op_rdctl = (D_iw_opx == 38) & D_is_opx_inst; + assign D_op_mul = (D_iw_opx == 39) & D_is_opx_inst; + assign D_op_cmpgeu = (D_iw_opx == 40) & D_is_opx_inst; + assign D_op_initi = (D_iw_opx == 41) & D_is_opx_inst; + assign D_op_opx_rsv42 = (D_iw_opx == 42) & D_is_opx_inst; + assign D_op_opx_rsv43 = (D_iw_opx == 43) & D_is_opx_inst; + assign D_op_opx_rsv44 = (D_iw_opx == 44) & D_is_opx_inst; + assign D_op_trap = (D_iw_opx == 45) & D_is_opx_inst; + assign D_op_wrctl = (D_iw_opx == 46) & D_is_opx_inst; + assign D_op_opx_rsv47 = (D_iw_opx == 47) & D_is_opx_inst; + assign D_op_cmpltu = (D_iw_opx == 48) & D_is_opx_inst; + assign D_op_add = (D_iw_opx == 49) & D_is_opx_inst; + assign D_op_opx_rsv50 = (D_iw_opx == 50) & D_is_opx_inst; + assign D_op_opx_rsv51 = (D_iw_opx == 51) & D_is_opx_inst; + assign D_op_break = (D_iw_opx == 52) & D_is_opx_inst; + assign D_op_hbreak = (D_iw_opx == 53) & D_is_opx_inst; + assign D_op_sync = (D_iw_opx == 54) & D_is_opx_inst; + assign D_op_opx_rsv55 = (D_iw_opx == 55) & D_is_opx_inst; + assign D_op_opx_rsv56 = (D_iw_opx == 56) & D_is_opx_inst; + assign D_op_sub = (D_iw_opx == 57) & D_is_opx_inst; + assign D_op_srai = (D_iw_opx == 58) & D_is_opx_inst; + assign D_op_sra = (D_iw_opx == 59) & D_is_opx_inst; + assign D_op_opx_rsv60 = (D_iw_opx == 60) & D_is_opx_inst; + assign D_op_intr = (D_iw_opx == 61) & D_is_opx_inst; + assign D_op_crst = (D_iw_opx == 62) & D_is_opx_inst; + assign D_op_opx_rsv63 = (D_iw_opx == 63) & D_is_opx_inst; + assign D_is_opx_inst = D_iw_op == 58; + assign R_en = 1'b1; + assign E_ci_result = 0; + //custom_instruction_master, which is an e_custom_instruction_master + assign dummy_ci_port = 1'b0; + assign E_ci_multi_stall = 1'b0; + assign iactive = irq[31 : 0] & 32'b00000000000000000000000000000011; + assign F_pc_sel_nxt = (R_ctrl_exception | W_rf_ecc_unrecoverable_valid) ? 2'b00 : + R_ctrl_break ? 2'b01 : + (W_br_taken | R_ctrl_uncond_cti_non_br) ? 2'b10 : + 2'b11; + + assign F_pc_no_crst_nxt = (F_pc_sel_nxt == 2'b00)? 8 : + (F_pc_sel_nxt == 2'b01)? 33288 : + (F_pc_sel_nxt == 2'b10)? E_arith_result[17 : 2] : + F_pc_plus_one; + + assign F_pc_nxt = F_pc_no_crst_nxt; + assign F_pcb_nxt = {F_pc_nxt, 2'b00}; + assign F_pc_en = W_valid | W_rf_ecc_unrecoverable_valid; + assign F_pc_plus_one = F_pc + 1; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + F_pc <= 0; + else if (F_pc_en) + F_pc <= F_pc_nxt; + end + + + assign F_pcb = {F_pc, 2'b00}; + assign F_pcb_plus_four = {F_pc_plus_one, 2'b00}; + assign F_valid = i_read & ~i_waitrequest; + assign i_read_nxt = W_valid | W_rf_ecc_unrecoverable_valid | (i_read & i_waitrequest); + assign i_address = {F_pc, 2'b00}; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + i_read <= 1'b1; + else + i_read <= i_read_nxt; + end + + + assign oci_tb_hbreak_req = oci_hbreak_req; + assign hbreak_req = (oci_tb_hbreak_req | hbreak_pending) & hbreak_enabled & ~(wait_for_one_post_bret_inst & ~W_valid); + assign hbreak_pending_nxt = hbreak_pending ? hbreak_enabled + : hbreak_req; + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + wait_for_one_post_bret_inst <= 1'b0; + else + wait_for_one_post_bret_inst <= (~hbreak_enabled & oci_single_step_mode) ? 1'b1 : (F_valid | ~oci_single_step_mode) ? 1'b0 : wait_for_one_post_bret_inst; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + hbreak_pending <= 1'b0; + else + hbreak_pending <= hbreak_pending_nxt; + end + + + assign intr_req = W_status_reg_pie & (W_ipending_reg != 0); + assign F_av_iw = i_readdata; + assign F_iw = hbreak_req ? 4040762 : + 1'b0 ? 127034 : + intr_req ? 3926074 : + F_av_iw; + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + D_iw <= 0; + else if (F_valid) + D_iw <= F_iw; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + D_valid <= 0; + else + D_valid <= F_valid | W1_rf_ecc_recoverable_valid; + end + + + assign D_dst_regnum = D_ctrl_implicit_dst_retaddr ? 5'd31 : + D_ctrl_implicit_dst_eretaddr ? 5'd29 : + D_ctrl_b_is_dst ? D_iw_b : + D_iw_c; + + assign D_wr_dst_reg = (D_dst_regnum != 0) & ~D_ctrl_ignore_dst; + assign D_logic_op_raw = D_is_opx_inst ? D_iw_opx[4 : 3] : + D_iw_op[4 : 3]; + + assign D_logic_op = D_ctrl_alu_force_xor ? 2'b11 : + D_ctrl_alu_force_and ? 2'b01 : + D_logic_op_raw; + + assign D_compare_op = D_is_opx_inst ? D_iw_opx[4 : 3] : + D_iw_op[4 : 3]; + + assign D_jmp_direct_target_waddr = D_iw[31 : 6]; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_valid <= 0; + else + R_valid <= D_valid; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_wr_dst_reg <= 0; + else + R_wr_dst_reg <= D_wr_dst_reg; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_dst_regnum <= 0; + else + R_dst_regnum <= D_dst_regnum; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_logic_op <= 0; + else + R_logic_op <= D_logic_op; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_compare_op <= 0; + else + R_compare_op <= D_compare_op; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_src2_use_imm <= 0; + else + R_src2_use_imm <= D_ctrl_src2_choose_imm | (D_ctrl_br & R_valid); + end + + + assign E_rf_ecc_valid_any = E_rf_ecc_recoverable_valid|E_rf_ecc_unrecoverable_valid; + assign W_rf_ecc_valid_any = W_rf_ecc_recoverable_valid|W_rf_ecc_unrecoverable_valid; + assign E_rf_ecc_recoverable_valid = 1'b0; + assign E_rf_ecc_unrecoverable_valid = 1'b0; + assign W_dst_regnum = R_dst_regnum; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_rf_ecc_recoverable_valid <= 0; + else + W_rf_ecc_recoverable_valid <= E_rf_ecc_recoverable_valid; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W1_rf_ecc_recoverable_valid <= 0; + else + W1_rf_ecc_recoverable_valid <= W_rf_ecc_recoverable_valid; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_rf_ecc_unrecoverable_valid <= 0; + else + W_rf_ecc_unrecoverable_valid <= E_rf_ecc_unrecoverable_valid & ~E_rf_ecc_recoverable_valid; + end + + + assign R_rf_a = R_rf_a_q; + assign R_rf_b = R_rf_b_q; + assign W_rf_wren = (R_wr_dst_reg & W_valid) | W_rf_ecc_valid_any | ~reset_n; + assign W_rf_wr_data = R_ctrl_ld ? av_ld_data_aligned_filtered : W_wr_data; +//niosII_cpu_cpu_register_bank_a, which is an nios_sdp_ram +niosII_cpu_cpu_register_bank_a_module niosII_cpu_cpu_register_bank_a + ( + .clock (clk), + .data (W_rf_wr_data), + .q (R_rf_a_q), + .rdaddress (D_iw_a), + .wraddress (W_dst_regnum), + .wren (W_rf_wren) + ); + +//synthesis translate_off +`ifdef NO_PLI +defparam niosII_cpu_cpu_register_bank_a.lpm_file = "niosII_cpu_cpu_rf_ram_a.dat"; +`else +defparam niosII_cpu_cpu_register_bank_a.lpm_file = "niosII_cpu_cpu_rf_ram_a.hex"; +`endif +//synthesis translate_on +//niosII_cpu_cpu_register_bank_b, which is an nios_sdp_ram +niosII_cpu_cpu_register_bank_b_module niosII_cpu_cpu_register_bank_b + ( + .clock (clk), + .data (W_rf_wr_data), + .q (R_rf_b_q), + .rdaddress (D_iw_b), + .wraddress (W_dst_regnum), + .wren (W_rf_wren) + ); + +//synthesis translate_off +`ifdef NO_PLI +defparam niosII_cpu_cpu_register_bank_b.lpm_file = "niosII_cpu_cpu_rf_ram_b.dat"; +`else +defparam niosII_cpu_cpu_register_bank_b.lpm_file = "niosII_cpu_cpu_rf_ram_b.hex"; +`endif +//synthesis translate_on + assign R_src1 = (((R_ctrl_br & E_valid_from_R) | (R_ctrl_retaddr & R_valid)))? {F_pc_plus_one, 2'b00} : + ((R_ctrl_jmp_direct & E_valid_from_R))? {D_jmp_direct_target_waddr, 2'b00} : + R_rf_a; + + assign R_src2_lo = ((R_ctrl_force_src2_zero|R_ctrl_hi_imm16))? {16 {D_ctrl_set_src2_rem_imm}} : + (R_ctrl_src_imm5_shift_rot)? {{11 {1'b0}},D_iw_imm5} : + (R_src2_use_imm)? D_iw_imm16 : + R_rf_b[15 : 0]; + + assign R_src2_hi = ((R_ctrl_force_src2_zero|R_ctrl_unsigned_lo_imm16))? {16 {D_ctrl_set_src2_rem_imm}} : + (R_ctrl_hi_imm16)? D_iw_imm16 : + (R_src2_use_imm)? {16 {D_iw_imm16[15]}} : + R_rf_b[31 : 16]; + + assign R_src2 = {R_src2_hi, R_src2_lo}; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_valid_from_R <= 0; + else + E_valid_from_R <= R_valid | E_stall; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_new_inst <= 0; + else + E_new_inst <= R_valid; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_src1 <= 0; + else + E_src1 <= R_src1; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_src2 <= 0; + else + E_src2 <= R_src2; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_invert_arith_src_msb <= 0; + else + E_invert_arith_src_msb <= D_ctrl_alu_signed_comparison & R_valid; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_alu_sub <= 0; + else + E_alu_sub <= D_ctrl_alu_subtract & R_valid; + end + + + assign E_valid = E_valid_from_R & ~E_rf_ecc_valid_any; + assign E_stall = (E_shift_rot_stall | E_ld_stall | E_st_stall | E_ci_multi_stall) & ~(E_rf_ecc_valid_any|W_rf_ecc_valid_any|W1_rf_ecc_recoverable_valid); + assign E_arith_src1 = { E_src1[31] ^ E_invert_arith_src_msb, + E_src1[30 : 0]}; + + assign E_arith_src2 = { E_src2[31] ^ E_invert_arith_src_msb, + E_src2[30 : 0]}; + + assign E_arith_result = E_alu_sub ? + E_arith_src1 - E_arith_src2 : + E_arith_src1 + E_arith_src2; + + assign E_mem_baddr = E_arith_result[17 : 0]; + assign E_logic_result = (R_logic_op == 2'b00)? (~(E_src1 | E_src2)) : + (R_logic_op == 2'b01)? (E_src1 & E_src2) : + (R_logic_op == 2'b10)? (E_src1 | E_src2) : + (E_src1 ^ E_src2); + + assign E_logic_result_is_0 = E_logic_result == 0; + assign E_eq = E_logic_result_is_0; + assign E_lt = E_arith_result[32]; + assign E_cmp_result = (R_compare_op == 2'b00)? E_eq : + (R_compare_op == 2'b01)? ~E_lt : + (R_compare_op == 2'b10)? E_lt : + ~E_eq; + + assign E_shift_rot_shfcnt = E_src2[4 : 0]; + assign E_shift_rot_cnt_nxt = E_new_inst ? E_shift_rot_shfcnt : E_shift_rot_cnt-1; + assign E_shift_rot_done = (E_shift_rot_cnt == 0) & ~E_new_inst; + assign E_shift_rot_stall = R_ctrl_shift_rot & E_valid & ~E_shift_rot_done; + assign E_shift_rot_fill_bit = R_ctrl_shift_logical ? 1'b0 : + (R_ctrl_rot_right ? E_shift_rot_result[0] : + E_shift_rot_result[31]); + + assign E_shift_rot_result_nxt = (E_new_inst)? E_src1 : + (R_ctrl_shift_rot_right)? {E_shift_rot_fill_bit, E_shift_rot_result[31 : 1]} : + {E_shift_rot_result[30 : 0], E_shift_rot_fill_bit}; + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_shift_rot_result <= 0; + else + E_shift_rot_result <= E_shift_rot_result_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + E_shift_rot_cnt <= 0; + else + E_shift_rot_cnt <= E_shift_rot_cnt_nxt; + end + + + assign E_control_rd_data = (D_iw_control_regnum == 5'd0)? W_status_reg : + (D_iw_control_regnum == 5'd1)? W_estatus_reg : + (D_iw_control_regnum == 5'd2)? W_bstatus_reg : + (D_iw_control_regnum == 5'd3)? W_ienable_reg : + (D_iw_control_regnum == 5'd4)? W_ipending_reg : + (D_iw_control_regnum == 5'd5)? W_cpuid_reg : + W_cdsr_reg; + + assign E_alu_result = ((R_ctrl_br_cmp | R_ctrl_rd_ctl_reg))? 0 : + (R_ctrl_shift_rot)? E_shift_rot_result : + (R_ctrl_logic)? E_logic_result : + (R_ctrl_custom)? E_ci_result : + E_arith_result; + + assign R_sth_data = R_rf_b[15 : 0]; + assign R_stw_data = R_rf_b[31 : 0]; + assign R_stb_data = R_rf_b[7 : 0]; + assign E_st_data = (D_ctrl_mem8)? {R_stb_data, R_stb_data, R_stb_data, R_stb_data} : + (D_ctrl_mem16)? {R_sth_data, R_sth_data} : + R_stw_data; + + assign E_mem_byte_en = ({D_ctrl_mem16, D_ctrl_mem8, E_mem_baddr[1 : 0]} == {2'b01, 2'b00})? 4'b0001 : + ({D_ctrl_mem16, D_ctrl_mem8, E_mem_baddr[1 : 0]} == {2'b01, 2'b01})? 4'b0010 : + ({D_ctrl_mem16, D_ctrl_mem8, E_mem_baddr[1 : 0]} == {2'b01, 2'b10})? 4'b0100 : + ({D_ctrl_mem16, D_ctrl_mem8, E_mem_baddr[1 : 0]} == {2'b01, 2'b11})? 4'b1000 : + ({D_ctrl_mem16, D_ctrl_mem8, E_mem_baddr[1 : 0]} == {2'b10, 2'b00})? 4'b0011 : + ({D_ctrl_mem16, D_ctrl_mem8, E_mem_baddr[1 : 0]} == {2'b10, 2'b01})? 4'b0011 : + ({D_ctrl_mem16, D_ctrl_mem8, E_mem_baddr[1 : 0]} == {2'b10, 2'b10})? 4'b1100 : + ({D_ctrl_mem16, D_ctrl_mem8, E_mem_baddr[1 : 0]} == {2'b10, 2'b11})? 4'b1100 : + 4'b1111; + + assign d_read_nxt = (R_ctrl_ld & E_new_inst & ~E_rf_ecc_valid_any) | (d_read & d_waitrequest); + assign E_ld_stall = R_ctrl_ld & ((E_valid & ~av_ld_done) | E_new_inst); + assign d_write_nxt = ((R_ctrl_st & (~R_ctrl_st_ex | W_up_ex_mon_state)) & E_new_inst & ~E_rf_ecc_valid_any) | (d_write & d_waitrequest); + assign E_st_stall = d_write_nxt; + assign d_address = W_mem_baddr; + assign av_ld_getting_data = d_read & ~d_waitrequest; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + d_read <= 0; + else + d_read <= d_read_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + d_writedata <= 0; + else + d_writedata <= E_st_data; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + d_byteenable <= 0; + else + d_byteenable <= E_mem_byte_en; + end + + + assign av_ld_align_cycle_nxt = av_ld_getting_data ? 0 : (av_ld_align_cycle+1); + assign av_ld_align_one_more_cycle = av_ld_align_cycle == (D_ctrl_mem16 ? 2 : 3); + assign av_ld_aligning_data_nxt = av_ld_aligning_data ? + ~av_ld_align_one_more_cycle : + (~D_ctrl_mem32 & av_ld_getting_data); + + assign av_ld_waiting_for_data_nxt = av_ld_waiting_for_data ? + ~av_ld_getting_data : + (R_ctrl_ld & E_new_inst); + + assign av_ld_done = ~av_ld_waiting_for_data_nxt & (D_ctrl_mem32 | ~av_ld_aligning_data_nxt); + assign av_ld_rshift8 = av_ld_aligning_data & + (av_ld_align_cycle < (W_mem_baddr[1 : 0])); + + assign av_ld_extend = av_ld_aligning_data; + assign av_ld_byte0_data_nxt = av_ld_rshift8 ? av_ld_byte1_data : + av_ld_extend ? av_ld_byte0_data :d_readdata[7 : 0]; + + assign av_ld_byte1_data_nxt = av_ld_rshift8 ? av_ld_byte2_data : + av_ld_extend ? {8 {av_fill_bit}} :d_readdata[15 : 8]; + + assign av_ld_byte2_data_nxt = av_ld_rshift8 ? av_ld_byte3_data : + av_ld_extend ? {8 {av_fill_bit}} :d_readdata[23 : 16]; + + assign av_ld_byte3_data_nxt = av_ld_rshift8 ? av_ld_byte3_data : + av_ld_extend ? {8 {av_fill_bit}} :d_readdata[31 : 24]; + + assign av_ld_byte1_data_en = ~(av_ld_extend & D_ctrl_mem16 & ~av_ld_rshift8); + assign av_ld_data_aligned_unfiltered = {av_ld_byte3_data, av_ld_byte2_data, + av_ld_byte1_data, av_ld_byte0_data}; + + assign av_sign_bit = D_ctrl_mem16 ? av_ld_byte1_data[7] : av_ld_byte0_data[7]; + assign av_fill_bit = av_sign_bit & R_ctrl_ld_signed; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + av_ld_align_cycle <= 0; + else + av_ld_align_cycle <= av_ld_align_cycle_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + av_ld_waiting_for_data <= 0; + else + av_ld_waiting_for_data <= av_ld_waiting_for_data_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + av_ld_aligning_data <= 0; + else + av_ld_aligning_data <= av_ld_aligning_data_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + av_ld_byte0_data <= 0; + else + av_ld_byte0_data <= av_ld_byte0_data_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + av_ld_byte1_data <= 0; + else if (av_ld_byte1_data_en) + av_ld_byte1_data <= av_ld_byte1_data_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + av_ld_byte2_data <= 0; + else + av_ld_byte2_data <= av_ld_byte2_data_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + av_ld_byte3_data <= 0; + else + av_ld_byte3_data <= av_ld_byte3_data_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_up_ex_mon_state <= 0; + else if (R_en) + W_up_ex_mon_state <= (R_ctrl_ld_ex & W_valid) ? 1'b1 : + ((D_op_eret & W_valid) | (R_ctrl_st_ex & W_valid)) ? 1'b0 : + W_up_ex_mon_state; + + end + + + assign W_valid_from_M = W_valid; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_valid <= 0; + else + W_valid <= E_valid & ~E_stall; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + A_valid_from_M <= 0; + else + A_valid_from_M <= E_valid & ~E_stall; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_control_rd_data <= 0; + else + W_control_rd_data <= D_ctrl_intr_inst ? W_status_reg : E_control_rd_data; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_cmp_result <= 0; + else + W_cmp_result <= E_cmp_result; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_alu_result <= 0; + else + W_alu_result <= E_alu_result; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_status_reg_pie <= 0; + else + W_status_reg_pie <= W_status_reg_pie_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_estatus_reg <= 0; + else + W_estatus_reg <= W_estatus_reg_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_bstatus_reg <= 0; + else + W_bstatus_reg <= W_bstatus_reg_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_ienable_reg <= 0; + else + W_ienable_reg <= W_ienable_reg_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_ipending_reg <= 0; + else + W_ipending_reg <= W_ipending_reg_nxt; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + W_cdsr_reg <= 0; + else + W_cdsr_reg <= 0; + end + + + assign W_cpuid_reg = 0; + assign W_wr_data_non_zero = R_ctrl_br_cmp ? W_cmp_result : + R_ctrl_rd_ctl_reg ? W_control_rd_data : + W_alu_result[31 : 0]; + + assign W_wr_data = W_wr_data_non_zero; + assign W_br_taken = R_ctrl_br_uncond | (R_ctrl_br & W_cmp_result); + assign W_mem_baddr = W_alu_result[17 : 0]; + assign W_status_reg = W_status_reg_pie; + assign E_wrctl_status = R_ctrl_wrctl_inst & + (D_iw_control_regnum == 5'd0); + + assign E_wrctl_estatus = R_ctrl_wrctl_inst & + (D_iw_control_regnum == 5'd1); + + assign E_wrctl_bstatus = R_ctrl_wrctl_inst & + (D_iw_control_regnum == 5'd2); + + assign E_wrctl_ienable = R_ctrl_wrctl_inst & + (D_iw_control_regnum == 5'd3); + + assign W_status_reg_pie_inst_nxt = (R_ctrl_exception | R_ctrl_break | R_ctrl_crst | W_rf_ecc_unrecoverable_valid) ? 1'b0 : + (D_op_eret) ? W_estatus_reg : + (D_op_bret) ? W_bstatus_reg : + (E_wrctl_status) ? E_src1[0] : + W_status_reg_pie; + + assign W_status_reg_pie_nxt = E_valid ? W_status_reg_pie_inst_nxt : W_status_reg_pie; + assign W_estatus_reg_inst_nxt = (R_ctrl_crst) ? 0 : + (R_ctrl_exception|W_rf_ecc_unrecoverable_valid) ? W_status_reg : + (E_wrctl_estatus) ? E_src1[0] : + W_estatus_reg; + + assign W_estatus_reg_nxt = E_valid ? W_estatus_reg_inst_nxt : W_estatus_reg; + assign W_bstatus_reg_inst_nxt = (R_ctrl_break) ? W_status_reg : + (E_wrctl_bstatus) ? E_src1[0] : + W_bstatus_reg; + + assign W_bstatus_reg_nxt = E_valid ? W_bstatus_reg_inst_nxt : W_bstatus_reg; + assign W_ienable_reg_nxt = ((E_wrctl_ienable & E_valid) ? + E_src1[31 : 0] : W_ienable_reg) & 32'b00000000000000000000000000000011; + + assign W_ipending_reg_nxt = iactive & W_ienable_reg & oci_ienable & 32'b00000000000000000000000000000011; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + hbreak_enabled <= 1'b1; + else if (E_valid) + hbreak_enabled <= R_ctrl_break ? 1'b0 : D_op_bret ? 1'b1 : hbreak_enabled; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + d_write <= 0; + else + d_write <= d_write_nxt; + end + + + niosII_cpu_cpu_nios2_oci the_niosII_cpu_cpu_nios2_oci + ( + .D_valid (D_valid), + .E_st_data (E_st_data), + .E_valid (E_valid), + .F_pc (F_pc), + .address_nxt (debug_mem_slave_address), + .av_ld_data_aligned_filtered (av_ld_data_aligned_filtered), + .byteenable_nxt (debug_mem_slave_byteenable), + .clk (debug_mem_slave_clk), + .d_address (d_address), + .d_read (d_read), + .d_waitrequest (d_waitrequest), + .d_write (d_write), + .debug_mem_slave_debugaccess_to_roms (debug_mem_slave_debugaccess_to_roms), + .debugaccess_nxt (debug_mem_slave_debugaccess), + .hbreak_enabled (hbreak_enabled), + .oci_hbreak_req (oci_hbreak_req), + .oci_ienable (oci_ienable), + .oci_single_step_mode (oci_single_step_mode), + .read_nxt (debug_mem_slave_read), + .readdata (debug_mem_slave_readdata), + .reset (debug_mem_slave_reset), + .reset_n (reset_n), + .reset_req (reset_req), + .resetrequest (debug_reset_request), + .waitrequest (debug_mem_slave_waitrequest), + .write_nxt (debug_mem_slave_write), + .writedata_nxt (debug_mem_slave_writedata) + ); + + //debug_mem_slave, which is an e_avalon_slave + assign debug_mem_slave_clk = clk; + assign debug_mem_slave_reset = ~reset_n; + assign D_ctrl_custom = 1'b0; + assign R_ctrl_custom_nxt = D_ctrl_custom; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_custom <= 0; + else if (R_en) + R_ctrl_custom <= R_ctrl_custom_nxt; + end + + + assign D_ctrl_custom_multi = 1'b0; + assign R_ctrl_custom_multi_nxt = D_ctrl_custom_multi; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_custom_multi <= 0; + else if (R_en) + R_ctrl_custom_multi <= R_ctrl_custom_multi_nxt; + end + + + assign D_ctrl_jmp_indirect = D_op_eret|D_op_bret|D_op_ret|D_op_jmp|D_op_callr; + assign R_ctrl_jmp_indirect_nxt = D_ctrl_jmp_indirect; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_jmp_indirect <= 0; + else if (R_en) + R_ctrl_jmp_indirect <= R_ctrl_jmp_indirect_nxt; + end + + + assign D_ctrl_jmp_direct = D_op_call|D_op_jmpi; + assign R_ctrl_jmp_direct_nxt = D_ctrl_jmp_direct; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_jmp_direct <= 0; + else if (R_en) + R_ctrl_jmp_direct <= R_ctrl_jmp_direct_nxt; + end + + + assign D_ctrl_implicit_dst_retaddr = D_op_call; + assign R_ctrl_implicit_dst_retaddr_nxt = D_ctrl_implicit_dst_retaddr; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_implicit_dst_retaddr <= 0; + else if (R_en) + R_ctrl_implicit_dst_retaddr <= R_ctrl_implicit_dst_retaddr_nxt; + end + + + assign D_ctrl_implicit_dst_eretaddr = D_op_div| + D_op_divu| + D_op_mul| + D_op_muli| + D_op_mulxss| + D_op_mulxsu| + D_op_mulxuu| + D_op_crst| + D_op_ldl| + D_op_op_rsv02| + D_op_op_rsv09| + D_op_op_rsv10| + D_op_op_rsv17| + D_op_op_rsv18| + D_op_op_rsv25| + D_op_op_rsv26| + D_op_op_rsv33| + D_op_op_rsv34| + D_op_op_rsv41| + D_op_op_rsv42| + D_op_op_rsv49| + D_op_op_rsv57| + D_op_op_rsv61| + D_op_op_rsv62| + D_op_op_rsv63| + D_op_opx_rsv00| + D_op_opx_rsv10| + D_op_opx_rsv15| + D_op_opx_rsv17| + D_op_opx_rsv21| + D_op_opx_rsv25| + D_op_opx_rsv33| + D_op_opx_rsv34| + D_op_opx_rsv35| + D_op_opx_rsv42| + D_op_opx_rsv43| + D_op_opx_rsv44| + D_op_opx_rsv47| + D_op_opx_rsv50| + D_op_opx_rsv51| + D_op_opx_rsv55| + D_op_opx_rsv56| + D_op_opx_rsv60| + D_op_opx_rsv63| + D_op_rdprs| + D_op_stc| + D_op_wrprs; + + assign R_ctrl_implicit_dst_eretaddr_nxt = D_ctrl_implicit_dst_eretaddr; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_implicit_dst_eretaddr <= 0; + else if (R_en) + R_ctrl_implicit_dst_eretaddr <= R_ctrl_implicit_dst_eretaddr_nxt; + end + + + assign D_ctrl_exception = D_op_trap| + D_op_opx_rsv44| + D_op_div| + D_op_divu| + D_op_mul| + D_op_muli| + D_op_mulxss| + D_op_mulxsu| + D_op_mulxuu| + D_op_crst| + D_op_ldl| + D_op_op_rsv02| + D_op_op_rsv09| + D_op_op_rsv10| + D_op_op_rsv17| + D_op_op_rsv18| + D_op_op_rsv25| + D_op_op_rsv26| + D_op_op_rsv33| + D_op_op_rsv34| + D_op_op_rsv41| + D_op_op_rsv42| + D_op_op_rsv49| + D_op_op_rsv57| + D_op_op_rsv61| + D_op_op_rsv62| + D_op_op_rsv63| + D_op_opx_rsv00| + D_op_opx_rsv10| + D_op_opx_rsv15| + D_op_opx_rsv17| + D_op_opx_rsv21| + D_op_opx_rsv25| + D_op_opx_rsv33| + D_op_opx_rsv34| + D_op_opx_rsv35| + D_op_opx_rsv42| + D_op_opx_rsv43| + D_op_opx_rsv47| + D_op_opx_rsv50| + D_op_opx_rsv51| + D_op_opx_rsv55| + D_op_opx_rsv56| + D_op_opx_rsv60| + D_op_opx_rsv63| + D_op_rdprs| + D_op_stc| + D_op_wrprs| + D_op_intr; + + assign R_ctrl_exception_nxt = D_ctrl_exception; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_exception <= 0; + else if (R_en) + R_ctrl_exception <= R_ctrl_exception_nxt; + end + + + assign D_ctrl_break = D_op_break|D_op_hbreak; + assign R_ctrl_break_nxt = D_ctrl_break; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_break <= 0; + else if (R_en) + R_ctrl_break <= R_ctrl_break_nxt; + end + + + assign D_ctrl_crst = 1'b0; + assign R_ctrl_crst_nxt = D_ctrl_crst; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_crst <= 0; + else if (R_en) + R_ctrl_crst <= R_ctrl_crst_nxt; + end + + + assign D_ctrl_rd_ctl_reg = D_op_rdctl; + assign R_ctrl_rd_ctl_reg_nxt = D_ctrl_rd_ctl_reg; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_rd_ctl_reg <= 0; + else if (R_en) + R_ctrl_rd_ctl_reg <= R_ctrl_rd_ctl_reg_nxt; + end + + + assign D_ctrl_uncond_cti_non_br = D_op_call|D_op_jmpi|D_op_eret|D_op_bret|D_op_ret|D_op_jmp|D_op_callr; + assign R_ctrl_uncond_cti_non_br_nxt = D_ctrl_uncond_cti_non_br; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_uncond_cti_non_br <= 0; + else if (R_en) + R_ctrl_uncond_cti_non_br <= R_ctrl_uncond_cti_non_br_nxt; + end + + + assign D_ctrl_retaddr = D_op_call| + D_op_op_rsv02| + D_op_nextpc| + D_op_callr| + D_op_trap| + D_op_opx_rsv44| + D_op_div| + D_op_divu| + D_op_mul| + D_op_muli| + D_op_mulxss| + D_op_mulxsu| + D_op_mulxuu| + D_op_crst| + D_op_ldl| + D_op_op_rsv09| + D_op_op_rsv10| + D_op_op_rsv17| + D_op_op_rsv18| + D_op_op_rsv25| + D_op_op_rsv26| + D_op_op_rsv33| + D_op_op_rsv34| + D_op_op_rsv41| + D_op_op_rsv42| + D_op_op_rsv49| + D_op_op_rsv57| + D_op_op_rsv61| + D_op_op_rsv62| + D_op_op_rsv63| + D_op_opx_rsv00| + D_op_opx_rsv10| + D_op_opx_rsv15| + D_op_opx_rsv17| + D_op_opx_rsv21| + D_op_opx_rsv25| + D_op_opx_rsv33| + D_op_opx_rsv34| + D_op_opx_rsv35| + D_op_opx_rsv42| + D_op_opx_rsv43| + D_op_opx_rsv47| + D_op_opx_rsv50| + D_op_opx_rsv51| + D_op_opx_rsv55| + D_op_opx_rsv56| + D_op_opx_rsv60| + D_op_opx_rsv63| + D_op_rdprs| + D_op_stc| + D_op_wrprs| + D_op_intr| + D_op_break| + D_op_hbreak; + + assign R_ctrl_retaddr_nxt = D_ctrl_retaddr; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_retaddr <= 0; + else if (R_en) + R_ctrl_retaddr <= R_ctrl_retaddr_nxt; + end + + + assign D_ctrl_shift_logical = D_op_slli|D_op_sll|D_op_srli|D_op_srl; + assign R_ctrl_shift_logical_nxt = D_ctrl_shift_logical; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_shift_logical <= 0; + else if (R_en) + R_ctrl_shift_logical <= R_ctrl_shift_logical_nxt; + end + + + assign D_ctrl_shift_right_arith = D_op_srai|D_op_sra; + assign R_ctrl_shift_right_arith_nxt = D_ctrl_shift_right_arith; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_shift_right_arith <= 0; + else if (R_en) + R_ctrl_shift_right_arith <= R_ctrl_shift_right_arith_nxt; + end + + + assign D_ctrl_rot_right = D_op_ror; + assign R_ctrl_rot_right_nxt = D_ctrl_rot_right; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_rot_right <= 0; + else if (R_en) + R_ctrl_rot_right <= R_ctrl_rot_right_nxt; + end + + + assign D_ctrl_shift_rot_right = D_op_srli|D_op_srl|D_op_srai|D_op_sra|D_op_ror; + assign R_ctrl_shift_rot_right_nxt = D_ctrl_shift_rot_right; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_shift_rot_right <= 0; + else if (R_en) + R_ctrl_shift_rot_right <= R_ctrl_shift_rot_right_nxt; + end + + + assign D_ctrl_shift_rot = D_op_slli| + D_op_sll| + D_op_roli| + D_op_rol| + D_op_srli| + D_op_srl| + D_op_srai| + D_op_sra| + D_op_ror; + + assign R_ctrl_shift_rot_nxt = D_ctrl_shift_rot; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_shift_rot <= 0; + else if (R_en) + R_ctrl_shift_rot <= R_ctrl_shift_rot_nxt; + end + + + assign D_ctrl_logic = D_op_and| + D_op_or| + D_op_xor| + D_op_nor| + D_op_andhi| + D_op_orhi| + D_op_xorhi| + D_op_andi| + D_op_ori| + D_op_xori; + + assign R_ctrl_logic_nxt = D_ctrl_logic; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_logic <= 0; + else if (R_en) + R_ctrl_logic <= R_ctrl_logic_nxt; + end + + + assign D_ctrl_hi_imm16 = D_op_andhi|D_op_orhi|D_op_xorhi; + assign R_ctrl_hi_imm16_nxt = D_ctrl_hi_imm16; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_hi_imm16 <= 0; + else if (R_en) + R_ctrl_hi_imm16 <= R_ctrl_hi_imm16_nxt; + end + + + assign D_ctrl_set_src2_rem_imm = 1'b0; + assign R_ctrl_set_src2_rem_imm_nxt = D_ctrl_set_src2_rem_imm; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_set_src2_rem_imm <= 0; + else if (R_en) + R_ctrl_set_src2_rem_imm <= R_ctrl_set_src2_rem_imm_nxt; + end + + + assign D_ctrl_unsigned_lo_imm16 = D_op_cmpgeui| + D_op_cmpltui| + D_op_andi| + D_op_ori| + D_op_xori| + D_op_roli| + D_op_slli| + D_op_srli| + D_op_srai; + + assign R_ctrl_unsigned_lo_imm16_nxt = D_ctrl_unsigned_lo_imm16; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_unsigned_lo_imm16 <= 0; + else if (R_en) + R_ctrl_unsigned_lo_imm16 <= R_ctrl_unsigned_lo_imm16_nxt; + end + + + assign D_ctrl_signed_imm12 = 1'b0; + assign R_ctrl_signed_imm12_nxt = D_ctrl_signed_imm12; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_signed_imm12 <= 0; + else if (R_en) + R_ctrl_signed_imm12 <= R_ctrl_signed_imm12_nxt; + end + + + assign D_ctrl_src_imm5_shift_rot = D_op_roli|D_op_slli|D_op_srli|D_op_srai; + assign R_ctrl_src_imm5_shift_rot_nxt = D_ctrl_src_imm5_shift_rot; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_src_imm5_shift_rot <= 0; + else if (R_en) + R_ctrl_src_imm5_shift_rot <= R_ctrl_src_imm5_shift_rot_nxt; + end + + + assign D_ctrl_br_uncond = D_op_br; + assign R_ctrl_br_uncond_nxt = D_ctrl_br_uncond; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_br_uncond <= 0; + else if (R_en) + R_ctrl_br_uncond <= R_ctrl_br_uncond_nxt; + end + + + assign D_ctrl_br = D_op_br|D_op_bge|D_op_blt|D_op_bne|D_op_beq|D_op_bgeu|D_op_bltu; + assign R_ctrl_br_nxt = D_ctrl_br; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_br <= 0; + else if (R_en) + R_ctrl_br <= R_ctrl_br_nxt; + end + + + assign D_ctrl_alu_subtract = D_op_sub| + D_op_cmplti| + D_op_cmpltui| + D_op_cmplt| + D_op_cmpltu| + D_op_blt| + D_op_bltu| + D_op_cmpgei| + D_op_cmpgeui| + D_op_cmpge| + D_op_cmpgeu| + D_op_bge| + D_op_bgeu; + + assign R_ctrl_alu_subtract_nxt = D_ctrl_alu_subtract; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_alu_subtract <= 0; + else if (R_en) + R_ctrl_alu_subtract <= R_ctrl_alu_subtract_nxt; + end + + + assign D_ctrl_alu_signed_comparison = D_op_cmpge|D_op_cmpgei|D_op_cmplt|D_op_cmplti|D_op_bge|D_op_blt; + assign R_ctrl_alu_signed_comparison_nxt = D_ctrl_alu_signed_comparison; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_alu_signed_comparison <= 0; + else if (R_en) + R_ctrl_alu_signed_comparison <= R_ctrl_alu_signed_comparison_nxt; + end + + + assign D_ctrl_br_cmp = D_op_br| + D_op_bge| + D_op_blt| + D_op_bne| + D_op_beq| + D_op_bgeu| + D_op_bltu| + D_op_cmpgei| + D_op_cmplti| + D_op_cmpnei| + D_op_cmpgeui| + D_op_cmpltui| + D_op_cmpeqi| + D_op_cmpge| + D_op_cmplt| + D_op_cmpne| + D_op_cmpgeu| + D_op_cmpltu| + D_op_cmpeq; + + assign R_ctrl_br_cmp_nxt = D_ctrl_br_cmp; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_br_cmp <= 0; + else if (R_en) + R_ctrl_br_cmp <= R_ctrl_br_cmp_nxt; + end + + + assign D_ctrl_ld_signed = D_op_ldb|D_op_ldh|D_op_ldw|D_op_ldbio|D_op_ldhio|D_op_ldwio; + assign R_ctrl_ld_signed_nxt = D_ctrl_ld_signed; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_ld_signed <= 0; + else if (R_en) + R_ctrl_ld_signed <= R_ctrl_ld_signed_nxt; + end + + + assign D_ctrl_ld = D_op_ldb| + D_op_ldh| + D_op_ldw| + D_op_ldbio| + D_op_ldhio| + D_op_ldwio| + D_op_ldbu| + D_op_ldhu| + D_op_ldbuio| + D_op_ldhuio; + + assign R_ctrl_ld_nxt = D_ctrl_ld; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_ld <= 0; + else if (R_en) + R_ctrl_ld <= R_ctrl_ld_nxt; + end + + + assign D_ctrl_ld_ex = 1'b0; + assign R_ctrl_ld_ex_nxt = D_ctrl_ld_ex; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_ld_ex <= 0; + else if (R_en) + R_ctrl_ld_ex <= R_ctrl_ld_ex_nxt; + end + + + assign D_ctrl_ld_non_io = D_op_ldbu|D_op_ldhu|D_op_ldb|D_op_ldh|D_op_ldw; + assign R_ctrl_ld_non_io_nxt = D_ctrl_ld_non_io; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_ld_non_io <= 0; + else if (R_en) + R_ctrl_ld_non_io <= R_ctrl_ld_non_io_nxt; + end + + + assign D_ctrl_st_ex = 1'b0; + assign R_ctrl_st_ex_nxt = D_ctrl_st_ex; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_st_ex <= 0; + else if (R_en) + R_ctrl_st_ex <= R_ctrl_st_ex_nxt; + end + + + assign D_ctrl_st = D_op_stb|D_op_sth|D_op_stw|D_op_stbio|D_op_sthio|D_op_stwio; + assign R_ctrl_st_nxt = D_ctrl_st; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_st <= 0; + else if (R_en) + R_ctrl_st <= R_ctrl_st_nxt; + end + + + assign D_ctrl_ld_st_ex = 1'b0; + assign R_ctrl_ld_st_ex_nxt = D_ctrl_ld_st_ex; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_ld_st_ex <= 0; + else if (R_en) + R_ctrl_ld_st_ex <= R_ctrl_ld_st_ex_nxt; + end + + + assign D_ctrl_mem8 = D_op_ldb|D_op_ldbu|D_op_ldbio|D_op_ldbuio|D_op_stb|D_op_stbio; + assign R_ctrl_mem8_nxt = D_ctrl_mem8; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_mem8 <= 0; + else if (R_en) + R_ctrl_mem8 <= R_ctrl_mem8_nxt; + end + + + assign D_ctrl_mem16 = D_op_ldhu|D_op_ldh|D_op_ldhio|D_op_ldhuio|D_op_sth|D_op_sthio; + assign R_ctrl_mem16_nxt = D_ctrl_mem16; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_mem16 <= 0; + else if (R_en) + R_ctrl_mem16 <= R_ctrl_mem16_nxt; + end + + + assign D_ctrl_mem32 = D_op_ldw|D_op_ldwio|D_op_stw|D_op_stwio; + assign R_ctrl_mem32_nxt = D_ctrl_mem32; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_mem32 <= 0; + else if (R_en) + R_ctrl_mem32 <= R_ctrl_mem32_nxt; + end + + + assign D_ctrl_ld_io = D_op_ldbuio|D_op_ldhuio|D_op_ldbio|D_op_ldhio|D_op_ldwio; + assign R_ctrl_ld_io_nxt = D_ctrl_ld_io; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_ld_io <= 0; + else if (R_en) + R_ctrl_ld_io <= R_ctrl_ld_io_nxt; + end + + + assign D_ctrl_b_is_dst = D_op_addi| + D_op_andhi| + D_op_orhi| + D_op_xorhi| + D_op_andi| + D_op_ori| + D_op_xori| + D_op_call| + D_op_cmpgei| + D_op_cmplti| + D_op_cmpnei| + D_op_cmpgeui| + D_op_cmpltui| + D_op_cmpeqi| + D_op_jmpi| + D_op_ldb| + D_op_ldh| + D_op_ldw| + D_op_ldbio| + D_op_ldhio| + D_op_ldwio| + D_op_ldbu| + D_op_ldhu| + D_op_ldbuio| + D_op_ldhuio| + D_op_initd| + D_op_initda| + D_op_flushd| + D_op_flushda; + + assign R_ctrl_b_is_dst_nxt = D_ctrl_b_is_dst; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_b_is_dst <= 0; + else if (R_en) + R_ctrl_b_is_dst <= R_ctrl_b_is_dst_nxt; + end + + + assign D_ctrl_ignore_dst = D_op_br| + D_op_bge| + D_op_blt| + D_op_bne| + D_op_beq| + D_op_bgeu| + D_op_bltu| + D_op_stb| + D_op_sth| + D_op_stw| + D_op_stbio| + D_op_sthio| + D_op_stwio| + D_op_jmpi; + + assign R_ctrl_ignore_dst_nxt = D_ctrl_ignore_dst; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_ignore_dst <= 0; + else if (R_en) + R_ctrl_ignore_dst <= R_ctrl_ignore_dst_nxt; + end + + + assign D_ctrl_src2_choose_imm = D_op_addi| + D_op_andhi| + D_op_orhi| + D_op_xorhi| + D_op_andi| + D_op_ori| + D_op_xori| + D_op_call| + D_op_cmpgei| + D_op_cmplti| + D_op_cmpnei| + D_op_cmpgeui| + D_op_cmpltui| + D_op_cmpeqi| + D_op_jmpi| + D_op_ldb| + D_op_ldh| + D_op_ldw| + D_op_ldbio| + D_op_ldhio| + D_op_ldwio| + D_op_ldbu| + D_op_ldhu| + D_op_ldbuio| + D_op_ldhuio| + D_op_initd| + D_op_initda| + D_op_flushd| + D_op_flushda| + D_op_stb| + D_op_sth| + D_op_stw| + D_op_stbio| + D_op_sthio| + D_op_stwio| + D_op_roli| + D_op_slli| + D_op_srli| + D_op_srai; + + assign R_ctrl_src2_choose_imm_nxt = D_ctrl_src2_choose_imm; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_src2_choose_imm <= 0; + else if (R_en) + R_ctrl_src2_choose_imm <= R_ctrl_src2_choose_imm_nxt; + end + + + assign D_ctrl_wrctl_inst = D_op_wrctl; + assign R_ctrl_wrctl_inst_nxt = D_ctrl_wrctl_inst; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_wrctl_inst <= 0; + else if (R_en) + R_ctrl_wrctl_inst <= R_ctrl_wrctl_inst_nxt; + end + + + assign D_ctrl_intr_inst = 1'b0; + assign R_ctrl_intr_inst_nxt = D_ctrl_intr_inst; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_intr_inst <= 0; + else if (R_en) + R_ctrl_intr_inst <= R_ctrl_intr_inst_nxt; + end + + + assign D_ctrl_force_src2_zero = D_op_call| + D_op_op_rsv02| + D_op_nextpc| + D_op_callr| + D_op_trap| + D_op_opx_rsv44| + D_op_crst| + D_op_ldl| + D_op_op_rsv09| + D_op_op_rsv10| + D_op_op_rsv17| + D_op_op_rsv18| + D_op_op_rsv25| + D_op_op_rsv26| + D_op_op_rsv33| + D_op_op_rsv34| + D_op_op_rsv41| + D_op_op_rsv42| + D_op_op_rsv49| + D_op_op_rsv57| + D_op_op_rsv61| + D_op_op_rsv62| + D_op_op_rsv63| + D_op_opx_rsv00| + D_op_opx_rsv10| + D_op_opx_rsv15| + D_op_opx_rsv17| + D_op_opx_rsv21| + D_op_opx_rsv25| + D_op_opx_rsv33| + D_op_opx_rsv34| + D_op_opx_rsv35| + D_op_opx_rsv42| + D_op_opx_rsv43| + D_op_opx_rsv47| + D_op_opx_rsv50| + D_op_opx_rsv51| + D_op_opx_rsv55| + D_op_opx_rsv56| + D_op_opx_rsv60| + D_op_opx_rsv63| + D_op_rdprs| + D_op_stc| + D_op_wrprs| + D_op_intr| + D_op_break| + D_op_hbreak| + D_op_eret| + D_op_bret| + D_op_ret| + D_op_jmp| + D_op_jmpi; + + assign R_ctrl_force_src2_zero_nxt = D_ctrl_force_src2_zero; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_force_src2_zero <= 0; + else if (R_en) + R_ctrl_force_src2_zero <= R_ctrl_force_src2_zero_nxt; + end + + + assign D_ctrl_alu_force_xor = D_op_cmpgei| + D_op_cmpgeui| + D_op_cmpeqi| + D_op_cmpge| + D_op_cmpgeu| + D_op_cmpeq| + D_op_cmpnei| + D_op_cmpne| + D_op_bge| + D_op_bgeu| + D_op_beq| + D_op_bne| + D_op_br; + + assign R_ctrl_alu_force_xor_nxt = D_ctrl_alu_force_xor; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_alu_force_xor <= 0; + else if (R_en) + R_ctrl_alu_force_xor <= R_ctrl_alu_force_xor_nxt; + end + + + assign D_ctrl_alu_force_and = 1'b0; + assign R_ctrl_alu_force_and_nxt = D_ctrl_alu_force_and; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + R_ctrl_alu_force_and <= 0; + else if (R_en) + R_ctrl_alu_force_and <= R_ctrl_alu_force_and_nxt; + end + + + //data_master, which is an e_avalon_master + //instruction_master, which is an e_avalon_master + +//synthesis translate_off +//////////////// SIMULATION-ONLY CONTENTS + assign F_inst = (F_op_call)? 56'h20202063616c6c : + (F_op_jmpi)? 56'h2020206a6d7069 : + (F_op_ldbu)? 56'h2020206c646275 : + (F_op_addi)? 56'h20202061646469 : + (F_op_stb)? 56'h20202020737462 : + (F_op_br)? 56'h20202020206272 : + (F_op_ldb)? 56'h202020206c6462 : + (F_op_cmpgei)? 56'h20636d70676569 : + (F_op_ldhu)? 56'h2020206c646875 : + (F_op_andi)? 56'h202020616e6469 : + (F_op_sth)? 56'h20202020737468 : + (F_op_bge)? 56'h20202020626765 : + (F_op_ldh)? 56'h202020206c6468 : + (F_op_cmplti)? 56'h20636d706c7469 : + (F_op_initda)? 56'h20696e69746461 : + (F_op_ori)? 56'h202020206f7269 : + (F_op_stw)? 56'h20202020737477 : + (F_op_blt)? 56'h20202020626c74 : + (F_op_ldw)? 56'h202020206c6477 : + (F_op_cmpnei)? 56'h20636d706e6569 : + (F_op_flushda)? 56'h666c7573686461 : + (F_op_xori)? 56'h202020786f7269 : + (F_op_bne)? 56'h20202020626e65 : + (F_op_cmpeqi)? 56'h20636d70657169 : + (F_op_ldbuio)? 56'h206c646275696f : + (F_op_muli)? 56'h2020206d756c69 : + (F_op_stbio)? 56'h2020737462696f : + (F_op_beq)? 56'h20202020626571 : + (F_op_ldbio)? 56'h20206c6462696f : + (F_op_cmpgeui)? 56'h636d7067657569 : + (F_op_ldhuio)? 56'h206c646875696f : + (F_op_andhi)? 56'h2020616e646869 : + (F_op_sthio)? 56'h2020737468696f : + (F_op_bgeu)? 56'h20202062676575 : + (F_op_ldhio)? 56'h20206c6468696f : + (F_op_cmpltui)? 56'h636d706c747569 : + (F_op_custom)? 56'h20637573746f6d : + (F_op_initd)? 56'h2020696e697464 : + (F_op_orhi)? 56'h2020206f726869 : + (F_op_stwio)? 56'h2020737477696f : + (F_op_bltu)? 56'h202020626c7475 : + (F_op_ldwio)? 56'h20206c6477696f : + (F_op_flushd)? 56'h20666c75736864 : + (F_op_xorhi)? 56'h2020786f726869 : + (F_op_eret)? 56'h20202065726574 : + (F_op_roli)? 56'h202020726f6c69 : + (F_op_rol)? 56'h20202020726f6c : + (F_op_flushp)? 56'h20666c75736870 : + (F_op_ret)? 56'h20202020726574 : + (F_op_nor)? 56'h202020206e6f72 : + (F_op_mulxuu)? 56'h206d756c787575 : + (F_op_cmpge)? 56'h2020636d706765 : + (F_op_bret)? 56'h20202062726574 : + (F_op_ror)? 56'h20202020726f72 : + (F_op_flushi)? 56'h20666c75736869 : + (F_op_jmp)? 56'h202020206a6d70 : + (F_op_and)? 56'h20202020616e64 : + (F_op_cmplt)? 56'h2020636d706c74 : + (F_op_slli)? 56'h202020736c6c69 : + (F_op_sll)? 56'h20202020736c6c : + (F_op_or)? 56'h20202020206f72 : + (F_op_mulxsu)? 56'h206d756c787375 : + (F_op_cmpne)? 56'h2020636d706e65 : + (F_op_srli)? 56'h20202073726c69 : + (F_op_srl)? 56'h2020202073726c : + (F_op_nextpc)? 56'h206e6578747063 : + (F_op_callr)? 56'h202063616c6c72 : + (F_op_xor)? 56'h20202020786f72 : + (F_op_mulxss)? 56'h206d756c787373 : + (F_op_cmpeq)? 56'h2020636d706571 : + (F_op_divu)? 56'h20202064697675 : + (F_op_div)? 56'h20202020646976 : + (F_op_rdctl)? 56'h2020726463746c : + (F_op_mul)? 56'h202020206d756c : + (F_op_cmpgeu)? 56'h20636d70676575 : + (F_op_initi)? 56'h2020696e697469 : + (F_op_trap)? 56'h20202074726170 : + (F_op_wrctl)? 56'h2020777263746c : + (F_op_cmpltu)? 56'h20636d706c7475 : + (F_op_add)? 56'h20202020616464 : + (F_op_break)? 56'h2020627265616b : + (F_op_hbreak)? 56'h2068627265616b : + (F_op_sync)? 56'h20202073796e63 : + (F_op_sub)? 56'h20202020737562 : + (F_op_srai)? 56'h20202073726169 : + (F_op_sra)? 56'h20202020737261 : + (F_op_intr)? 56'h202020696e7472 : + 56'h20202020424144; + + assign D_inst = (D_op_call)? 56'h20202063616c6c : + (D_op_jmpi)? 56'h2020206a6d7069 : + (D_op_ldbu)? 56'h2020206c646275 : + (D_op_addi)? 56'h20202061646469 : + (D_op_stb)? 56'h20202020737462 : + (D_op_br)? 56'h20202020206272 : + (D_op_ldb)? 56'h202020206c6462 : + (D_op_cmpgei)? 56'h20636d70676569 : + (D_op_ldhu)? 56'h2020206c646875 : + (D_op_andi)? 56'h202020616e6469 : + (D_op_sth)? 56'h20202020737468 : + (D_op_bge)? 56'h20202020626765 : + (D_op_ldh)? 56'h202020206c6468 : + (D_op_cmplti)? 56'h20636d706c7469 : + (D_op_initda)? 56'h20696e69746461 : + (D_op_ori)? 56'h202020206f7269 : + (D_op_stw)? 56'h20202020737477 : + (D_op_blt)? 56'h20202020626c74 : + (D_op_ldw)? 56'h202020206c6477 : + (D_op_cmpnei)? 56'h20636d706e6569 : + (D_op_flushda)? 56'h666c7573686461 : + (D_op_xori)? 56'h202020786f7269 : + (D_op_bne)? 56'h20202020626e65 : + (D_op_cmpeqi)? 56'h20636d70657169 : + (D_op_ldbuio)? 56'h206c646275696f : + (D_op_muli)? 56'h2020206d756c69 : + (D_op_stbio)? 56'h2020737462696f : + (D_op_beq)? 56'h20202020626571 : + (D_op_ldbio)? 56'h20206c6462696f : + (D_op_cmpgeui)? 56'h636d7067657569 : + (D_op_ldhuio)? 56'h206c646875696f : + (D_op_andhi)? 56'h2020616e646869 : + (D_op_sthio)? 56'h2020737468696f : + (D_op_bgeu)? 56'h20202062676575 : + (D_op_ldhio)? 56'h20206c6468696f : + (D_op_cmpltui)? 56'h636d706c747569 : + (D_op_custom)? 56'h20637573746f6d : + (D_op_initd)? 56'h2020696e697464 : + (D_op_orhi)? 56'h2020206f726869 : + (D_op_stwio)? 56'h2020737477696f : + (D_op_bltu)? 56'h202020626c7475 : + (D_op_ldwio)? 56'h20206c6477696f : + (D_op_flushd)? 56'h20666c75736864 : + (D_op_xorhi)? 56'h2020786f726869 : + (D_op_eret)? 56'h20202065726574 : + (D_op_roli)? 56'h202020726f6c69 : + (D_op_rol)? 56'h20202020726f6c : + (D_op_flushp)? 56'h20666c75736870 : + (D_op_ret)? 56'h20202020726574 : + (D_op_nor)? 56'h202020206e6f72 : + (D_op_mulxuu)? 56'h206d756c787575 : + (D_op_cmpge)? 56'h2020636d706765 : + (D_op_bret)? 56'h20202062726574 : + (D_op_ror)? 56'h20202020726f72 : + (D_op_flushi)? 56'h20666c75736869 : + (D_op_jmp)? 56'h202020206a6d70 : + (D_op_and)? 56'h20202020616e64 : + (D_op_cmplt)? 56'h2020636d706c74 : + (D_op_slli)? 56'h202020736c6c69 : + (D_op_sll)? 56'h20202020736c6c : + (D_op_or)? 56'h20202020206f72 : + (D_op_mulxsu)? 56'h206d756c787375 : + (D_op_cmpne)? 56'h2020636d706e65 : + (D_op_srli)? 56'h20202073726c69 : + (D_op_srl)? 56'h2020202073726c : + (D_op_nextpc)? 56'h206e6578747063 : + (D_op_callr)? 56'h202063616c6c72 : + (D_op_xor)? 56'h20202020786f72 : + (D_op_mulxss)? 56'h206d756c787373 : + (D_op_cmpeq)? 56'h2020636d706571 : + (D_op_divu)? 56'h20202064697675 : + (D_op_div)? 56'h20202020646976 : + (D_op_rdctl)? 56'h2020726463746c : + (D_op_mul)? 56'h202020206d756c : + (D_op_cmpgeu)? 56'h20636d70676575 : + (D_op_initi)? 56'h2020696e697469 : + (D_op_trap)? 56'h20202074726170 : + (D_op_wrctl)? 56'h2020777263746c : + (D_op_cmpltu)? 56'h20636d706c7475 : + (D_op_add)? 56'h20202020616464 : + (D_op_break)? 56'h2020627265616b : + (D_op_hbreak)? 56'h2068627265616b : + (D_op_sync)? 56'h20202073796e63 : + (D_op_sub)? 56'h20202020737562 : + (D_op_srai)? 56'h20202073726169 : + (D_op_sra)? 56'h20202020737261 : + (D_op_intr)? 56'h202020696e7472 : + 56'h20202020424144; + + assign F_vinst = F_valid ? F_inst : {9{8'h2d}}; + assign D_vinst = D_valid ? D_inst : {9{8'h2d}}; + assign R_vinst = R_valid ? D_inst : {9{8'h2d}}; + assign E_vinst = E_valid ? D_inst : {9{8'h2d}}; + assign W_vinst = W_valid ? D_inst : {9{8'h2d}}; + +//////////////// END SIMULATION-ONLY CONTENTS + +//synthesis translate_on + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_sysclk.v b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_sysclk.v new file mode 100644 index 0000000..c866a30 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_sysclk.v @@ -0,0 +1,162 @@ +//Legal Notice: (C)2022 Altera Corporation. All rights reserved. Your +//use of Altera Corporation's design tools, logic functions and other +//software and tools, and its AMPP partner logic functions, and any +//output files any of the foregoing (including device programming or +//simulation files), and any associated documentation or information are +//expressly subject to the terms and conditions of the Altera Program +//License Subscription Agreement or other applicable license agreement, +//including, without limitation, that your use is for the sole purpose +//of programming logic devices manufactured by Altera and sold by Altera +//or its authorized distributors. Please refer to the applicable +//agreement for further details. + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_debug_slave_sysclk ( + // inputs: + clk, + ir_in, + sr, + vs_udr, + vs_uir, + + // outputs: + jdo, + take_action_break_a, + take_action_break_b, + take_action_break_c, + take_action_ocimem_a, + take_action_ocimem_b, + take_action_tracectrl, + take_no_action_break_a, + take_no_action_break_b, + take_no_action_break_c, + take_no_action_ocimem_a + ) +; + + output [ 37: 0] jdo; + output take_action_break_a; + output take_action_break_b; + output take_action_break_c; + output take_action_ocimem_a; + output take_action_ocimem_b; + output take_action_tracectrl; + output take_no_action_break_a; + output take_no_action_break_b; + output take_no_action_break_c; + output take_no_action_ocimem_a; + input clk; + input [ 1: 0] ir_in; + input [ 37: 0] sr; + input vs_udr; + input vs_uir; + + +reg enable_action_strobe /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103\"" */; +reg [ 1: 0] ir /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; +reg [ 37: 0] jdo /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,R101\"" */; +reg jxuir /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103\"" */; +reg sync2_udr /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103\"" */; +reg sync2_uir /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103\"" */; +wire sync_udr; +wire sync_uir; +wire take_action_break_a; +wire take_action_break_b; +wire take_action_break_c; +wire take_action_ocimem_a; +wire take_action_ocimem_b; +wire take_action_tracectrl; +wire take_no_action_break_a; +wire take_no_action_break_b; +wire take_no_action_break_c; +wire take_no_action_ocimem_a; +wire unxunused_resetxx3; +wire unxunused_resetxx4; +reg update_jdo_strobe /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103\"" */; + assign unxunused_resetxx3 = 1'b1; + altera_std_synchronizer the_altera_std_synchronizer3 + ( + .clk (clk), + .din (vs_udr), + .dout (sync_udr), + .reset_n (unxunused_resetxx3) + ); + + defparam the_altera_std_synchronizer3.depth = 2; + + assign unxunused_resetxx4 = 1'b1; + altera_std_synchronizer the_altera_std_synchronizer4 + ( + .clk (clk), + .din (vs_uir), + .dout (sync_uir), + .reset_n (unxunused_resetxx4) + ); + + defparam the_altera_std_synchronizer4.depth = 2; + + always @(posedge clk) + begin + sync2_udr <= sync_udr; + update_jdo_strobe <= sync_udr & ~sync2_udr; + enable_action_strobe <= update_jdo_strobe; + sync2_uir <= sync_uir; + jxuir <= sync_uir & ~sync2_uir; + end + + + assign take_action_ocimem_a = enable_action_strobe && (ir == 2'b00) && + ~jdo[35] && jdo[34]; + + assign take_no_action_ocimem_a = enable_action_strobe && (ir == 2'b00) && + ~jdo[35] && ~jdo[34]; + + assign take_action_ocimem_b = enable_action_strobe && (ir == 2'b00) && + jdo[35]; + + assign take_action_break_a = enable_action_strobe && (ir == 2'b10) && + ~jdo[36] && + jdo[37]; + + assign take_no_action_break_a = enable_action_strobe && (ir == 2'b10) && + ~jdo[36] && + ~jdo[37]; + + assign take_action_break_b = enable_action_strobe && (ir == 2'b10) && + jdo[36] && ~jdo[35] && + jdo[37]; + + assign take_no_action_break_b = enable_action_strobe && (ir == 2'b10) && + jdo[36] && ~jdo[35] && + ~jdo[37]; + + assign take_action_break_c = enable_action_strobe && (ir == 2'b10) && + jdo[36] && jdo[35] && + jdo[37]; + + assign take_no_action_break_c = enable_action_strobe && (ir == 2'b10) && + jdo[36] && jdo[35] && + ~jdo[37]; + + assign take_action_tracectrl = enable_action_strobe && (ir == 2'b11) && + jdo[15]; + + always @(posedge clk) + begin + if (jxuir) + ir <= ir_in; + if (update_jdo_strobe) + jdo <= sr; + end + + + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_tck.v b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_tck.v new file mode 100644 index 0000000..646f301 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_tck.v @@ -0,0 +1,239 @@ +//Legal Notice: (C)2022 Altera Corporation. All rights reserved. Your +//use of Altera Corporation's design tools, logic functions and other +//software and tools, and its AMPP partner logic functions, and any +//output files any of the foregoing (including device programming or +//simulation files), and any associated documentation or information are +//expressly subject to the terms and conditions of the Altera Program +//License Subscription Agreement or other applicable license agreement, +//including, without limitation, that your use is for the sole purpose +//of programming logic devices manufactured by Altera and sold by Altera +//or its authorized distributors. Please refer to the applicable +//agreement for further details. + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_debug_slave_tck ( + // inputs: + MonDReg, + break_readreg, + dbrk_hit0_latch, + dbrk_hit1_latch, + dbrk_hit2_latch, + dbrk_hit3_latch, + debugack, + ir_in, + jtag_state_rti, + monitor_error, + monitor_ready, + reset_n, + resetlatch, + tck, + tdi, + tracemem_on, + tracemem_trcdata, + tracemem_tw, + trc_im_addr, + trc_on, + trc_wrap, + trigbrktype, + trigger_state_1, + vs_cdr, + vs_sdr, + vs_uir, + + // outputs: + ir_out, + jrst_n, + sr, + st_ready_test_idle, + tdo + ) +; + + output [ 1: 0] ir_out; + output jrst_n; + output [ 37: 0] sr; + output st_ready_test_idle; + output tdo; + input [ 31: 0] MonDReg; + input [ 31: 0] break_readreg; + input dbrk_hit0_latch; + input dbrk_hit1_latch; + input dbrk_hit2_latch; + input dbrk_hit3_latch; + input debugack; + input [ 1: 0] ir_in; + input jtag_state_rti; + input monitor_error; + input monitor_ready; + input reset_n; + input resetlatch; + input tck; + input tdi; + input tracemem_on; + input [ 35: 0] tracemem_trcdata; + input tracemem_tw; + input [ 6: 0] trc_im_addr; + input trc_on; + input trc_wrap; + input trigbrktype; + input trigger_state_1; + input vs_cdr; + input vs_sdr; + input vs_uir; + + +reg [ 2: 0] DRsize /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +wire debugack_sync; +reg [ 1: 0] ir_out; +wire jrst_n; +wire monitor_ready_sync; +reg [ 37: 0] sr /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"D101,D103,R101\"" */; +wire st_ready_test_idle; +wire tdo; +wire unxcomplemented_resetxx1; +wire unxcomplemented_resetxx2; + always @(posedge tck) + begin + if (vs_cdr) + case (ir_in) + + 2'b00: begin + sr[35] <= debugack_sync; + sr[34] <= monitor_error; + sr[33] <= resetlatch; + sr[32 : 1] <= MonDReg; + sr[0] <= monitor_ready_sync; + end // 2'b00 + + 2'b01: begin + sr[35 : 0] <= tracemem_trcdata; + sr[37] <= tracemem_tw; + sr[36] <= tracemem_on; + end // 2'b01 + + 2'b10: begin + sr[37] <= trigger_state_1; + sr[36] <= dbrk_hit3_latch; + sr[35] <= dbrk_hit2_latch; + sr[34] <= dbrk_hit1_latch; + sr[33] <= dbrk_hit0_latch; + sr[32 : 1] <= break_readreg; + sr[0] <= trigbrktype; + end // 2'b10 + + 2'b11: begin + sr[15 : 2] <= trc_im_addr; + sr[1] <= trc_wrap; + sr[0] <= trc_on; + end // 2'b11 + + endcase // ir_in + if (vs_sdr) + case (DRsize) + + 3'b000: begin + sr <= {tdi, sr[37 : 2], tdi}; + end // 3'b000 + + 3'b001: begin + sr <= {tdi, sr[37 : 9], tdi, sr[7 : 1]}; + end // 3'b001 + + 3'b010: begin + sr <= {tdi, sr[37 : 17], tdi, sr[15 : 1]}; + end // 3'b010 + + 3'b011: begin + sr <= {tdi, sr[37 : 33], tdi, sr[31 : 1]}; + end // 3'b011 + + 3'b100: begin + sr <= {tdi, sr[37], tdi, sr[35 : 1]}; + end // 3'b100 + + 3'b101: begin + sr <= {tdi, sr[37 : 1]}; + end // 3'b101 + + default: begin + sr <= {tdi, sr[37 : 2], tdi}; + end // default + + endcase // DRsize + if (vs_uir) + case (ir_in) + + 2'b00: begin + DRsize <= 3'b100; + end // 2'b00 + + 2'b01: begin + DRsize <= 3'b101; + end // 2'b01 + + 2'b10: begin + DRsize <= 3'b101; + end // 2'b10 + + 2'b11: begin + DRsize <= 3'b010; + end // 2'b11 + + endcase // ir_in + end + + + assign tdo = sr[0]; + assign st_ready_test_idle = jtag_state_rti; + assign unxcomplemented_resetxx1 = jrst_n; + altera_std_synchronizer the_altera_std_synchronizer1 + ( + .clk (tck), + .din (debugack), + .dout (debugack_sync), + .reset_n (unxcomplemented_resetxx1) + ); + + defparam the_altera_std_synchronizer1.depth = 2; + + assign unxcomplemented_resetxx2 = jrst_n; + altera_std_synchronizer the_altera_std_synchronizer2 + ( + .clk (tck), + .din (monitor_ready), + .dout (monitor_ready_sync), + .reset_n (unxcomplemented_resetxx2) + ); + + defparam the_altera_std_synchronizer2.depth = 2; + + always @(posedge tck or negedge jrst_n) + begin + if (jrst_n == 0) + ir_out <= 2'b0; + else + ir_out <= {debugack_sync, monitor_ready_sync}; + end + + + +//synthesis translate_off +//////////////// SIMULATION-ONLY CONTENTS + assign jrst_n = reset_n; + +//////////////// END SIMULATION-ONLY CONTENTS + +//synthesis translate_on +//synthesis read_comments_as_HDL on +// assign jrst_n = 1; +//synthesis read_comments_as_HDL off + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_wrapper.v b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_wrapper.v new file mode 100644 index 0000000..c292ca3 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_debug_slave_wrapper.v @@ -0,0 +1,222 @@ +//Legal Notice: (C)2022 Altera Corporation. All rights reserved. Your +//use of Altera Corporation's design tools, logic functions and other +//software and tools, and its AMPP partner logic functions, and any +//output files any of the foregoing (including device programming or +//simulation files), and any associated documentation or information are +//expressly subject to the terms and conditions of the Altera Program +//License Subscription Agreement or other applicable license agreement, +//including, without limitation, that your use is for the sole purpose +//of programming logic devices manufactured by Altera and sold by Altera +//or its authorized distributors. Please refer to the applicable +//agreement for further details. + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_debug_slave_wrapper ( + // inputs: + MonDReg, + break_readreg, + clk, + dbrk_hit0_latch, + dbrk_hit1_latch, + dbrk_hit2_latch, + dbrk_hit3_latch, + debugack, + monitor_error, + monitor_ready, + reset_n, + resetlatch, + tracemem_on, + tracemem_trcdata, + tracemem_tw, + trc_im_addr, + trc_on, + trc_wrap, + trigbrktype, + trigger_state_1, + + // outputs: + jdo, + jrst_n, + st_ready_test_idle, + take_action_break_a, + take_action_break_b, + take_action_break_c, + take_action_ocimem_a, + take_action_ocimem_b, + take_action_tracectrl, + take_no_action_break_a, + take_no_action_break_b, + take_no_action_break_c, + take_no_action_ocimem_a + ) +; + + output [ 37: 0] jdo; + output jrst_n; + output st_ready_test_idle; + output take_action_break_a; + output take_action_break_b; + output take_action_break_c; + output take_action_ocimem_a; + output take_action_ocimem_b; + output take_action_tracectrl; + output take_no_action_break_a; + output take_no_action_break_b; + output take_no_action_break_c; + output take_no_action_ocimem_a; + input [ 31: 0] MonDReg; + input [ 31: 0] break_readreg; + input clk; + input dbrk_hit0_latch; + input dbrk_hit1_latch; + input dbrk_hit2_latch; + input dbrk_hit3_latch; + input debugack; + input monitor_error; + input monitor_ready; + input reset_n; + input resetlatch; + input tracemem_on; + input [ 35: 0] tracemem_trcdata; + input tracemem_tw; + input [ 6: 0] trc_im_addr; + input trc_on; + input trc_wrap; + input trigbrktype; + input trigger_state_1; + + +wire [ 37: 0] jdo; +wire jrst_n; +wire [ 37: 0] sr; +wire st_ready_test_idle; +wire take_action_break_a; +wire take_action_break_b; +wire take_action_break_c; +wire take_action_ocimem_a; +wire take_action_ocimem_b; +wire take_action_tracectrl; +wire take_no_action_break_a; +wire take_no_action_break_b; +wire take_no_action_break_c; +wire take_no_action_ocimem_a; +wire vji_cdr; +wire [ 1: 0] vji_ir_in; +wire [ 1: 0] vji_ir_out; +wire vji_rti; +wire vji_sdr; +wire vji_tck; +wire vji_tdi; +wire vji_tdo; +wire vji_udr; +wire vji_uir; + //Change the sld_virtual_jtag_basic's defparams to + //switch between a regular Nios II or an internally embedded Nios II. + //For a regular Nios II, sld_mfg_id = 70, sld_type_id = 34. + //For an internally embedded Nios II, slf_mfg_id = 110, sld_type_id = 135. + niosII_cpu_cpu_debug_slave_tck the_niosII_cpu_cpu_debug_slave_tck + ( + .MonDReg (MonDReg), + .break_readreg (break_readreg), + .dbrk_hit0_latch (dbrk_hit0_latch), + .dbrk_hit1_latch (dbrk_hit1_latch), + .dbrk_hit2_latch (dbrk_hit2_latch), + .dbrk_hit3_latch (dbrk_hit3_latch), + .debugack (debugack), + .ir_in (vji_ir_in), + .ir_out (vji_ir_out), + .jrst_n (jrst_n), + .jtag_state_rti (vji_rti), + .monitor_error (monitor_error), + .monitor_ready (monitor_ready), + .reset_n (reset_n), + .resetlatch (resetlatch), + .sr (sr), + .st_ready_test_idle (st_ready_test_idle), + .tck (vji_tck), + .tdi (vji_tdi), + .tdo (vji_tdo), + .tracemem_on (tracemem_on), + .tracemem_trcdata (tracemem_trcdata), + .tracemem_tw (tracemem_tw), + .trc_im_addr (trc_im_addr), + .trc_on (trc_on), + .trc_wrap (trc_wrap), + .trigbrktype (trigbrktype), + .trigger_state_1 (trigger_state_1), + .vs_cdr (vji_cdr), + .vs_sdr (vji_sdr), + .vs_uir (vji_uir) + ); + + niosII_cpu_cpu_debug_slave_sysclk the_niosII_cpu_cpu_debug_slave_sysclk + ( + .clk (clk), + .ir_in (vji_ir_in), + .jdo (jdo), + .sr (sr), + .take_action_break_a (take_action_break_a), + .take_action_break_b (take_action_break_b), + .take_action_break_c (take_action_break_c), + .take_action_ocimem_a (take_action_ocimem_a), + .take_action_ocimem_b (take_action_ocimem_b), + .take_action_tracectrl (take_action_tracectrl), + .take_no_action_break_a (take_no_action_break_a), + .take_no_action_break_b (take_no_action_break_b), + .take_no_action_break_c (take_no_action_break_c), + .take_no_action_ocimem_a (take_no_action_ocimem_a), + .vs_udr (vji_udr), + .vs_uir (vji_uir) + ); + + +//synthesis translate_off +//////////////// SIMULATION-ONLY CONTENTS + assign vji_tck = 1'b0; + assign vji_tdi = 1'b0; + assign vji_sdr = 1'b0; + assign vji_cdr = 1'b0; + assign vji_rti = 1'b0; + assign vji_uir = 1'b0; + assign vji_udr = 1'b0; + assign vji_ir_in = 2'b0; + +//////////////// END SIMULATION-ONLY CONTENTS + +//synthesis translate_on +//synthesis read_comments_as_HDL on +// sld_virtual_jtag_basic niosII_cpu_cpu_debug_slave_phy +// ( +// .ir_in (vji_ir_in), +// .ir_out (vji_ir_out), +// .jtag_state_rti (vji_rti), +// .tck (vji_tck), +// .tdi (vji_tdi), +// .tdo (vji_tdo), +// .virtual_state_cdr (vji_cdr), +// .virtual_state_sdr (vji_sdr), +// .virtual_state_udr (vji_udr), +// .virtual_state_uir (vji_uir) +// ); +// +// defparam niosII_cpu_cpu_debug_slave_phy.sld_auto_instance_index = "YES", +// niosII_cpu_cpu_debug_slave_phy.sld_instance_index = 0, +// niosII_cpu_cpu_debug_slave_phy.sld_ir_width = 2, +// niosII_cpu_cpu_debug_slave_phy.sld_mfg_id = 70, +// niosII_cpu_cpu_debug_slave_phy.sld_sim_action = "", +// niosII_cpu_cpu_debug_slave_phy.sld_sim_n_scan = 0, +// niosII_cpu_cpu_debug_slave_phy.sld_sim_total_length = 0, +// niosII_cpu_cpu_debug_slave_phy.sld_type_id = 34, +// niosII_cpu_cpu_debug_slave_phy.sld_version = 3; +// +//synthesis read_comments_as_HDL off + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_cpu_cpu_ociram_default_contents.mif b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_ociram_default_contents.mif new file mode 100644 index 0000000..aee33b3 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_ociram_default_contents.mif @@ -0,0 +1,267 @@ +-- Contents are randomly generated during RTL generation. +WIDTH=32; +DEPTH=256; + +ADDRESS_RADIX=HEX; +DATA_RADIX=HEX; + +CONTENT BEGIN + +00 : 88997af9; +01 : abaae595; +02 : 32fd14d1; +03 : b66193c4; +04 : c6a6aa09; +05 : 0b43de5b; +06 : d1d93028; +07 : bcd08e2a; +08 : 1c8bae85; +09 : b11dad63; +0a : 864ddf62; +0b : 68301486; +0c : 51a3d8d0; +0d : 7af7d39e; +0e : 4761b503; +0f : 2a976e14; +10 : 98141041; +11 : 4c1f6471; +12 : 41dc0a35; +13 : 7d484ae3; +14 : 2a1329f3; +15 : 44ecf499; +16 : dccdd125; +17 : 240142e9; +18 : 3b7e4b05; +19 : bb92e762; +1a : 4594a3c5; +1b : ea0d940f; +1c : 66525d7c; +1d : 0f552242; +1e : 452bd52d; +1f : d1f4ed11; +20 : 5d590422; +21 : c8016b5f; +22 : 9ab94f07; +23 : 16bac9b4; +24 : fe569ae3; +25 : c6e1e6e7; +26 : 2ff19932; +27 : feb058ad; +28 : 1dcce651; +29 : e18b9bfb; +2a : e2f4fc64; +2b : 05d34847; +2c : 077a8143; +2d : 2ce4207f; +2e : 3f3e5113; +2f : c24d2803; +30 : e289b503; +31 : d16bcd4e; +32 : 57a841cf; +33 : 1194f754; +34 : 5c925a31; +35 : 40fd6946; +36 : e397e5d7; +37 : eada7553; +38 : eba8ec01; +39 : f5b39d0b; +3a : 88af39a3; +3b : 5b7f243e; +3c : 4f2bb4ba; +3d : 9451a234; +3e : 10fd984d; +3f : ad4ef4f7; +40 : 7fe97f8b; +41 : 08ea614d; +42 : 9f2c5cf4; +43 : 3f90b7a2; +44 : 8c2bc774; +45 : 45dd63a5; +46 : 3204329c; +47 : 9909be0d; +48 : be65c97b; +49 : 78f3d4a4; +4a : 3ee8b71c; +4b : 9e9a0de4; +4c : 56db426b; +4d : e6869d81; +4e : 20ab0652; +4f : 05d247ed; +50 : 1edccf12; +51 : 1e483b5a; +52 : 8e48ef1e; +53 : f19aefbf; +54 : 98335d23; +55 : 954ac923; +56 : 4679ced6; +57 : ae18d9b8; +58 : be57db48; +59 : 2af933e3; +5a : 3f04e244; +5b : 5d11c958; +5c : 65bda8cb; +5d : c53fe664; +5e : 797ceac8; +5f : aaa406e5; +60 : f785e24e; +61 : 95510077; +62 : 5b6f55a3; +63 : 2a3c749a; +64 : a92e6ae6; +65 : b2117fb0; +66 : 262a254e; +67 : b8c4da74; +68 : f69070ee; +69 : 9e7f80b8; +6a : 834528b4; +6b : 4aaf6d98; +6c : 96023372; +6d : d11663ed; +6e : 33a3c007; +6f : 0e7f06ee; +70 : 34385787; +71 : 2edfd7b0; +72 : 00d60e4b; +73 : 49535c30; +74 : e83f5c14; +75 : 5e0c4c59; +76 : 1d7b944a; +77 : 6ae69731; +78 : bf8414e4; +79 : 7451c212; +7a : 74ede6d2; +7b : 080eafa5; +7c : f21052d8; +7d : cc0819fb; +7e : 8993e5b6; +7f : e20f2df6; +80 : 0f267a65; +81 : 7a8e8407; +82 : e7be656d; +83 : 01ba4ca3; +84 : 7f998e44; +85 : 29d83420; +86 : 149f9a73; +87 : 643ae51e; +88 : 125714d3; +89 : 6e49dc21; +8a : 0b227946; +8b : 360a837d; +8c : b2187074; +8d : 17b0bdbd; +8e : 938fc73d; +8f : e73f501e; +90 : 70b5b87e; +91 : 2a2aed8a; +92 : f96cc881; +93 : 021b49e1; +94 : 8691600d; +95 : b45e1d12; +96 : 64d9644e; +97 : 486cbaf9; +98 : 386acf20; +99 : 0d1384d4; +9a : 62455f77; +9b : 866fde20; +9c : 006fecec; +9d : 94e84514; +9e : 7babc333; +9f : afaa8445; +a0 : b1175e3a; +a1 : e08de629; +a2 : 7f12a52d; +a3 : 0e322909; +a4 : 18784dc6; +a5 : b23bcc20; +a6 : 266c9e34; +a7 : c857eaf3; +a8 : 2ae3b164; +a9 : 038acf2a; +aa : c1abc60d; +ab : 8af787bd; +ac : 043723a9; +ad : c37c952d; +ae : 693a361f; +af : da4b8e99; +b0 : fb8fdb10; +b1 : 4d6365f2; +b2 : 712358e9; +b3 : 85dae0fa; +b4 : 7e82a418; +b5 : d3493768; +b6 : 739c65ec; +b7 : 73b66b19; +b8 : 22142816; +b9 : ff498322; +ba : 3266495e; +bb : e26e8214; +bc : c8c47131; +bd : 660793d8; +be : 689f8d69; +bf : faae340b; +c0 : 37518ba7; +c1 : f2865fe5; +c2 : 1bb44f3d; +c3 : 3bce44c5; +c4 : aff2d188; +c5 : 985442da; +c6 : 85bb58bd; +c7 : 0c53135d; +c8 : 495f80bc; +c9 : 853c95dc; +ca : dde937f1; +cb : 418f9452; +cc : 7669641c; +cd : 0e752434; +ce : b0fe17a7; +cf : d1be9b88; +d0 : cfbfeb76; +d1 : 80b48a11; +d2 : 9327c69e; +d3 : beca5a88; +d4 : e71d428f; +d5 : b318d275; +d6 : 56fea35e; +d7 : 140cd6bd; +d8 : b8c937ce; +d9 : 540eea36; +da : ee58fc7f; +db : 5615c389; +dc : 46692ad0; +dd : 5c713e51; +de : 6ba95f60; +df : 0e166732; +e0 : ac0e49f5; +e1 : c9a5ea76; +e2 : 05b04d86; +e3 : b29ac712; +e4 : 4e344493; +e5 : d45ede48; +e6 : 3da7e426; +e7 : 4d6a8937; +e8 : 99b59bd4; +e9 : 1f8a5751; +ea : 8b07e64e; +eb : b4dcd496; +ec : 42f84fe6; +ed : f1d5952f; +ee : a2e5a42d; +ef : 15b1af16; +f0 : 168012bc; +f1 : 2e276612; +f2 : 89913eaa; +f3 : c607a1a2; +f4 : fd8b544d; +f5 : aec31a53; +f6 : 25f958ad; +f7 : 365903ec; +f8 : 14761865; +f9 : 568cc23b; +fa : b0386305; +fb : fb9ebd8a; +fc : a25911d4; +fd : 806e3fbb; +fe : 9df35264; +ff : d62b3814; + +END; diff --git a/Top/niosII/synthesis/submodules/niosII_cpu_cpu_rf_ram_a.mif b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_rf_ram_a.mif new file mode 100644 index 0000000..644013a --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_rf_ram_a.mif @@ -0,0 +1,42 @@ +WIDTH=32; +DEPTH=32; + +ADDRESS_RADIX=HEX; +DATA_RADIX=HEX; + +CONTENT BEGIN + +00 : deadbeef; +01 : deadbeef; +02 : deadbeef; +03 : deadbeef; +04 : deadbeef; +05 : deadbeef; +06 : deadbeef; +07 : deadbeef; +08 : deadbeef; +09 : deadbeef; +0a : deadbeef; +0b : deadbeef; +0c : deadbeef; +0d : deadbeef; +0e : deadbeef; +0f : deadbeef; +10 : deadbeef; +11 : deadbeef; +12 : deadbeef; +13 : deadbeef; +14 : deadbeef; +15 : deadbeef; +16 : deadbeef; +17 : deadbeef; +18 : deadbeef; +19 : deadbeef; +1a : deadbeef; +1b : deadbeef; +1c : deadbeef; +1d : deadbeef; +1e : deadbeef; +1f : deadbeef; + +END; diff --git a/Top/niosII/synthesis/submodules/niosII_cpu_cpu_rf_ram_b.mif b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_rf_ram_b.mif new file mode 100644 index 0000000..644013a --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_rf_ram_b.mif @@ -0,0 +1,42 @@ +WIDTH=32; +DEPTH=32; + +ADDRESS_RADIX=HEX; +DATA_RADIX=HEX; + +CONTENT BEGIN + +00 : deadbeef; +01 : deadbeef; +02 : deadbeef; +03 : deadbeef; +04 : deadbeef; +05 : deadbeef; +06 : deadbeef; +07 : deadbeef; +08 : deadbeef; +09 : deadbeef; +0a : deadbeef; +0b : deadbeef; +0c : deadbeef; +0d : deadbeef; +0e : deadbeef; +0f : deadbeef; +10 : deadbeef; +11 : deadbeef; +12 : deadbeef; +13 : deadbeef; +14 : deadbeef; +15 : deadbeef; +16 : deadbeef; +17 : deadbeef; +18 : deadbeef; +19 : deadbeef; +1a : deadbeef; +1b : deadbeef; +1c : deadbeef; +1d : deadbeef; +1e : deadbeef; +1f : deadbeef; + +END; diff --git a/Top/niosII/synthesis/submodules/niosII_cpu_cpu_test_bench.v b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_test_bench.v new file mode 100644 index 0000000..17751ab --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_cpu_cpu_test_bench.v @@ -0,0 +1,656 @@ +//Legal Notice: (C)2022 Altera Corporation. All rights reserved. Your +//use of Altera Corporation's design tools, logic functions and other +//software and tools, and its AMPP partner logic functions, and any +//output files any of the foregoing (including device programming or +//simulation files), and any associated documentation or information are +//expressly subject to the terms and conditions of the Altera Program +//License Subscription Agreement or other applicable license agreement, +//including, without limitation, that your use is for the sole purpose +//of programming logic devices manufactured by Altera and sold by Altera +//or its authorized distributors. Please refer to the applicable +//agreement for further details. + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_cpu_cpu_test_bench ( + // inputs: + D_iw, + D_iw_op, + D_iw_opx, + D_valid, + E_valid, + F_pcb, + F_valid, + R_ctrl_ld, + R_ctrl_ld_non_io, + R_dst_regnum, + R_wr_dst_reg, + W_valid, + W_vinst, + W_wr_data, + av_ld_data_aligned_unfiltered, + clk, + d_address, + d_byteenable, + d_read, + d_write, + i_address, + i_read, + i_readdata, + i_waitrequest, + reset_n, + + // outputs: + av_ld_data_aligned_filtered, + test_has_ended + ) +; + + output [ 31: 0] av_ld_data_aligned_filtered; + output test_has_ended; + input [ 31: 0] D_iw; + input [ 5: 0] D_iw_op; + input [ 5: 0] D_iw_opx; + input D_valid; + input E_valid; + input [ 17: 0] F_pcb; + input F_valid; + input R_ctrl_ld; + input R_ctrl_ld_non_io; + input [ 4: 0] R_dst_regnum; + input R_wr_dst_reg; + input W_valid; + input [ 71: 0] W_vinst; + input [ 31: 0] W_wr_data; + input [ 31: 0] av_ld_data_aligned_unfiltered; + input clk; + input [ 17: 0] d_address; + input [ 3: 0] d_byteenable; + input d_read; + input d_write; + input [ 17: 0] i_address; + input i_read; + input [ 31: 0] i_readdata; + input i_waitrequest; + input reset_n; + + +wire D_is_opx_inst; +wire D_op_add; +wire D_op_addi; +wire D_op_and; +wire D_op_andhi; +wire D_op_andi; +wire D_op_beq; +wire D_op_bge; +wire D_op_bgeu; +wire D_op_blt; +wire D_op_bltu; +wire D_op_bne; +wire D_op_br; +wire D_op_break; +wire D_op_bret; +wire D_op_call; +wire D_op_callr; +wire D_op_cmpeq; +wire D_op_cmpeqi; +wire D_op_cmpge; +wire D_op_cmpgei; +wire D_op_cmpgeu; +wire D_op_cmpgeui; +wire D_op_cmplt; +wire D_op_cmplti; +wire D_op_cmpltu; +wire D_op_cmpltui; +wire D_op_cmpne; +wire D_op_cmpnei; +wire D_op_crst; +wire D_op_custom; +wire D_op_div; +wire D_op_divu; +wire D_op_eret; +wire D_op_flushd; +wire D_op_flushda; +wire D_op_flushi; +wire D_op_flushp; +wire D_op_hbreak; +wire D_op_initd; +wire D_op_initda; +wire D_op_initi; +wire D_op_intr; +wire D_op_jmp; +wire D_op_jmpi; +wire D_op_ldb; +wire D_op_ldbio; +wire D_op_ldbu; +wire D_op_ldbuio; +wire D_op_ldh; +wire D_op_ldhio; +wire D_op_ldhu; +wire D_op_ldhuio; +wire D_op_ldl; +wire D_op_ldw; +wire D_op_ldwio; +wire D_op_mul; +wire D_op_muli; +wire D_op_mulxss; +wire D_op_mulxsu; +wire D_op_mulxuu; +wire D_op_nextpc; +wire D_op_nor; +wire D_op_op_rsv02; +wire D_op_op_rsv09; +wire D_op_op_rsv10; +wire D_op_op_rsv17; +wire D_op_op_rsv18; +wire D_op_op_rsv25; +wire D_op_op_rsv26; +wire D_op_op_rsv33; +wire D_op_op_rsv34; +wire D_op_op_rsv41; +wire D_op_op_rsv42; +wire D_op_op_rsv49; +wire D_op_op_rsv57; +wire D_op_op_rsv61; +wire D_op_op_rsv62; +wire D_op_op_rsv63; +wire D_op_opx_rsv00; +wire D_op_opx_rsv10; +wire D_op_opx_rsv15; +wire D_op_opx_rsv17; +wire D_op_opx_rsv21; +wire D_op_opx_rsv25; +wire D_op_opx_rsv33; +wire D_op_opx_rsv34; +wire D_op_opx_rsv35; +wire D_op_opx_rsv42; +wire D_op_opx_rsv43; +wire D_op_opx_rsv44; +wire D_op_opx_rsv47; +wire D_op_opx_rsv50; +wire D_op_opx_rsv51; +wire D_op_opx_rsv55; +wire D_op_opx_rsv56; +wire D_op_opx_rsv60; +wire D_op_opx_rsv63; +wire D_op_or; +wire D_op_orhi; +wire D_op_ori; +wire D_op_rdctl; +wire D_op_rdprs; +wire D_op_ret; +wire D_op_rol; +wire D_op_roli; +wire D_op_ror; +wire D_op_sll; +wire D_op_slli; +wire D_op_sra; +wire D_op_srai; +wire D_op_srl; +wire D_op_srli; +wire D_op_stb; +wire D_op_stbio; +wire D_op_stc; +wire D_op_sth; +wire D_op_sthio; +wire D_op_stw; +wire D_op_stwio; +wire D_op_sub; +wire D_op_sync; +wire D_op_trap; +wire D_op_wrctl; +wire D_op_wrprs; +wire D_op_xor; +wire D_op_xorhi; +wire D_op_xori; +wire [ 31: 0] av_ld_data_aligned_filtered; +wire av_ld_data_aligned_unfiltered_0_is_x; +wire av_ld_data_aligned_unfiltered_10_is_x; +wire av_ld_data_aligned_unfiltered_11_is_x; +wire av_ld_data_aligned_unfiltered_12_is_x; +wire av_ld_data_aligned_unfiltered_13_is_x; +wire av_ld_data_aligned_unfiltered_14_is_x; +wire av_ld_data_aligned_unfiltered_15_is_x; +wire av_ld_data_aligned_unfiltered_16_is_x; +wire av_ld_data_aligned_unfiltered_17_is_x; +wire av_ld_data_aligned_unfiltered_18_is_x; +wire av_ld_data_aligned_unfiltered_19_is_x; +wire av_ld_data_aligned_unfiltered_1_is_x; +wire av_ld_data_aligned_unfiltered_20_is_x; +wire av_ld_data_aligned_unfiltered_21_is_x; +wire av_ld_data_aligned_unfiltered_22_is_x; +wire av_ld_data_aligned_unfiltered_23_is_x; +wire av_ld_data_aligned_unfiltered_24_is_x; +wire av_ld_data_aligned_unfiltered_25_is_x; +wire av_ld_data_aligned_unfiltered_26_is_x; +wire av_ld_data_aligned_unfiltered_27_is_x; +wire av_ld_data_aligned_unfiltered_28_is_x; +wire av_ld_data_aligned_unfiltered_29_is_x; +wire av_ld_data_aligned_unfiltered_2_is_x; +wire av_ld_data_aligned_unfiltered_30_is_x; +wire av_ld_data_aligned_unfiltered_31_is_x; +wire av_ld_data_aligned_unfiltered_3_is_x; +wire av_ld_data_aligned_unfiltered_4_is_x; +wire av_ld_data_aligned_unfiltered_5_is_x; +wire av_ld_data_aligned_unfiltered_6_is_x; +wire av_ld_data_aligned_unfiltered_7_is_x; +wire av_ld_data_aligned_unfiltered_8_is_x; +wire av_ld_data_aligned_unfiltered_9_is_x; +wire test_has_ended; + assign D_op_call = D_iw_op == 0; + assign D_op_jmpi = D_iw_op == 1; + assign D_op_op_rsv02 = D_iw_op == 2; + assign D_op_ldbu = D_iw_op == 3; + assign D_op_addi = D_iw_op == 4; + assign D_op_stb = D_iw_op == 5; + assign D_op_br = D_iw_op == 6; + assign D_op_ldb = D_iw_op == 7; + assign D_op_cmpgei = D_iw_op == 8; + assign D_op_op_rsv09 = D_iw_op == 9; + assign D_op_op_rsv10 = D_iw_op == 10; + assign D_op_ldhu = D_iw_op == 11; + assign D_op_andi = D_iw_op == 12; + assign D_op_sth = D_iw_op == 13; + assign D_op_bge = D_iw_op == 14; + assign D_op_ldh = D_iw_op == 15; + assign D_op_cmplti = D_iw_op == 16; + assign D_op_op_rsv17 = D_iw_op == 17; + assign D_op_op_rsv18 = D_iw_op == 18; + assign D_op_initda = D_iw_op == 19; + assign D_op_ori = D_iw_op == 20; + assign D_op_stw = D_iw_op == 21; + assign D_op_blt = D_iw_op == 22; + assign D_op_ldw = D_iw_op == 23; + assign D_op_cmpnei = D_iw_op == 24; + assign D_op_op_rsv25 = D_iw_op == 25; + assign D_op_op_rsv26 = D_iw_op == 26; + assign D_op_flushda = D_iw_op == 27; + assign D_op_xori = D_iw_op == 28; + assign D_op_stc = D_iw_op == 29; + assign D_op_bne = D_iw_op == 30; + assign D_op_ldl = D_iw_op == 31; + assign D_op_cmpeqi = D_iw_op == 32; + assign D_op_op_rsv33 = D_iw_op == 33; + assign D_op_op_rsv34 = D_iw_op == 34; + assign D_op_ldbuio = D_iw_op == 35; + assign D_op_muli = D_iw_op == 36; + assign D_op_stbio = D_iw_op == 37; + assign D_op_beq = D_iw_op == 38; + assign D_op_ldbio = D_iw_op == 39; + assign D_op_cmpgeui = D_iw_op == 40; + assign D_op_op_rsv41 = D_iw_op == 41; + assign D_op_op_rsv42 = D_iw_op == 42; + assign D_op_ldhuio = D_iw_op == 43; + assign D_op_andhi = D_iw_op == 44; + assign D_op_sthio = D_iw_op == 45; + assign D_op_bgeu = D_iw_op == 46; + assign D_op_ldhio = D_iw_op == 47; + assign D_op_cmpltui = D_iw_op == 48; + assign D_op_op_rsv49 = D_iw_op == 49; + assign D_op_custom = D_iw_op == 50; + assign D_op_initd = D_iw_op == 51; + assign D_op_orhi = D_iw_op == 52; + assign D_op_stwio = D_iw_op == 53; + assign D_op_bltu = D_iw_op == 54; + assign D_op_ldwio = D_iw_op == 55; + assign D_op_rdprs = D_iw_op == 56; + assign D_op_op_rsv57 = D_iw_op == 57; + assign D_op_flushd = D_iw_op == 59; + assign D_op_xorhi = D_iw_op == 60; + assign D_op_op_rsv61 = D_iw_op == 61; + assign D_op_op_rsv62 = D_iw_op == 62; + assign D_op_op_rsv63 = D_iw_op == 63; + assign D_op_opx_rsv00 = (D_iw_opx == 0) & D_is_opx_inst; + assign D_op_eret = (D_iw_opx == 1) & D_is_opx_inst; + assign D_op_roli = (D_iw_opx == 2) & D_is_opx_inst; + assign D_op_rol = (D_iw_opx == 3) & D_is_opx_inst; + assign D_op_flushp = (D_iw_opx == 4) & D_is_opx_inst; + assign D_op_ret = (D_iw_opx == 5) & D_is_opx_inst; + assign D_op_nor = (D_iw_opx == 6) & D_is_opx_inst; + assign D_op_mulxuu = (D_iw_opx == 7) & D_is_opx_inst; + assign D_op_cmpge = (D_iw_opx == 8) & D_is_opx_inst; + assign D_op_bret = (D_iw_opx == 9) & D_is_opx_inst; + assign D_op_opx_rsv10 = (D_iw_opx == 10) & D_is_opx_inst; + assign D_op_ror = (D_iw_opx == 11) & D_is_opx_inst; + assign D_op_flushi = (D_iw_opx == 12) & D_is_opx_inst; + assign D_op_jmp = (D_iw_opx == 13) & D_is_opx_inst; + assign D_op_and = (D_iw_opx == 14) & D_is_opx_inst; + assign D_op_opx_rsv15 = (D_iw_opx == 15) & D_is_opx_inst; + assign D_op_cmplt = (D_iw_opx == 16) & D_is_opx_inst; + assign D_op_opx_rsv17 = (D_iw_opx == 17) & D_is_opx_inst; + assign D_op_slli = (D_iw_opx == 18) & D_is_opx_inst; + assign D_op_sll = (D_iw_opx == 19) & D_is_opx_inst; + assign D_op_wrprs = (D_iw_opx == 20) & D_is_opx_inst; + assign D_op_opx_rsv21 = (D_iw_opx == 21) & D_is_opx_inst; + assign D_op_or = (D_iw_opx == 22) & D_is_opx_inst; + assign D_op_mulxsu = (D_iw_opx == 23) & D_is_opx_inst; + assign D_op_cmpne = (D_iw_opx == 24) & D_is_opx_inst; + assign D_op_opx_rsv25 = (D_iw_opx == 25) & D_is_opx_inst; + assign D_op_srli = (D_iw_opx == 26) & D_is_opx_inst; + assign D_op_srl = (D_iw_opx == 27) & D_is_opx_inst; + assign D_op_nextpc = (D_iw_opx == 28) & D_is_opx_inst; + assign D_op_callr = (D_iw_opx == 29) & D_is_opx_inst; + assign D_op_xor = (D_iw_opx == 30) & D_is_opx_inst; + assign D_op_mulxss = (D_iw_opx == 31) & D_is_opx_inst; + assign D_op_cmpeq = (D_iw_opx == 32) & D_is_opx_inst; + assign D_op_opx_rsv33 = (D_iw_opx == 33) & D_is_opx_inst; + assign D_op_opx_rsv34 = (D_iw_opx == 34) & D_is_opx_inst; + assign D_op_opx_rsv35 = (D_iw_opx == 35) & D_is_opx_inst; + assign D_op_divu = (D_iw_opx == 36) & D_is_opx_inst; + assign D_op_div = (D_iw_opx == 37) & D_is_opx_inst; + assign D_op_rdctl = (D_iw_opx == 38) & D_is_opx_inst; + assign D_op_mul = (D_iw_opx == 39) & D_is_opx_inst; + assign D_op_cmpgeu = (D_iw_opx == 40) & D_is_opx_inst; + assign D_op_initi = (D_iw_opx == 41) & D_is_opx_inst; + assign D_op_opx_rsv42 = (D_iw_opx == 42) & D_is_opx_inst; + assign D_op_opx_rsv43 = (D_iw_opx == 43) & D_is_opx_inst; + assign D_op_opx_rsv44 = (D_iw_opx == 44) & D_is_opx_inst; + assign D_op_trap = (D_iw_opx == 45) & D_is_opx_inst; + assign D_op_wrctl = (D_iw_opx == 46) & D_is_opx_inst; + assign D_op_opx_rsv47 = (D_iw_opx == 47) & D_is_opx_inst; + assign D_op_cmpltu = (D_iw_opx == 48) & D_is_opx_inst; + assign D_op_add = (D_iw_opx == 49) & D_is_opx_inst; + assign D_op_opx_rsv50 = (D_iw_opx == 50) & D_is_opx_inst; + assign D_op_opx_rsv51 = (D_iw_opx == 51) & D_is_opx_inst; + assign D_op_break = (D_iw_opx == 52) & D_is_opx_inst; + assign D_op_hbreak = (D_iw_opx == 53) & D_is_opx_inst; + assign D_op_sync = (D_iw_opx == 54) & D_is_opx_inst; + assign D_op_opx_rsv55 = (D_iw_opx == 55) & D_is_opx_inst; + assign D_op_opx_rsv56 = (D_iw_opx == 56) & D_is_opx_inst; + assign D_op_sub = (D_iw_opx == 57) & D_is_opx_inst; + assign D_op_srai = (D_iw_opx == 58) & D_is_opx_inst; + assign D_op_sra = (D_iw_opx == 59) & D_is_opx_inst; + assign D_op_opx_rsv60 = (D_iw_opx == 60) & D_is_opx_inst; + assign D_op_intr = (D_iw_opx == 61) & D_is_opx_inst; + assign D_op_crst = (D_iw_opx == 62) & D_is_opx_inst; + assign D_op_opx_rsv63 = (D_iw_opx == 63) & D_is_opx_inst; + assign D_is_opx_inst = D_iw_op == 58; + assign test_has_ended = 1'b0; + +//synthesis translate_off +//////////////// SIMULATION-ONLY CONTENTS + //Clearing 'X' data bits + assign av_ld_data_aligned_unfiltered_0_is_x = ^(av_ld_data_aligned_unfiltered[0]) === 1'bx; + + assign av_ld_data_aligned_filtered[0] = (av_ld_data_aligned_unfiltered_0_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[0]; + assign av_ld_data_aligned_unfiltered_1_is_x = ^(av_ld_data_aligned_unfiltered[1]) === 1'bx; + assign av_ld_data_aligned_filtered[1] = (av_ld_data_aligned_unfiltered_1_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[1]; + assign av_ld_data_aligned_unfiltered_2_is_x = ^(av_ld_data_aligned_unfiltered[2]) === 1'bx; + assign av_ld_data_aligned_filtered[2] = (av_ld_data_aligned_unfiltered_2_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[2]; + assign av_ld_data_aligned_unfiltered_3_is_x = ^(av_ld_data_aligned_unfiltered[3]) === 1'bx; + assign av_ld_data_aligned_filtered[3] = (av_ld_data_aligned_unfiltered_3_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[3]; + assign av_ld_data_aligned_unfiltered_4_is_x = ^(av_ld_data_aligned_unfiltered[4]) === 1'bx; + assign av_ld_data_aligned_filtered[4] = (av_ld_data_aligned_unfiltered_4_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[4]; + assign av_ld_data_aligned_unfiltered_5_is_x = ^(av_ld_data_aligned_unfiltered[5]) === 1'bx; + assign av_ld_data_aligned_filtered[5] = (av_ld_data_aligned_unfiltered_5_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[5]; + assign av_ld_data_aligned_unfiltered_6_is_x = ^(av_ld_data_aligned_unfiltered[6]) === 1'bx; + assign av_ld_data_aligned_filtered[6] = (av_ld_data_aligned_unfiltered_6_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[6]; + assign av_ld_data_aligned_unfiltered_7_is_x = ^(av_ld_data_aligned_unfiltered[7]) === 1'bx; + assign av_ld_data_aligned_filtered[7] = (av_ld_data_aligned_unfiltered_7_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[7]; + assign av_ld_data_aligned_unfiltered_8_is_x = ^(av_ld_data_aligned_unfiltered[8]) === 1'bx; + assign av_ld_data_aligned_filtered[8] = (av_ld_data_aligned_unfiltered_8_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[8]; + assign av_ld_data_aligned_unfiltered_9_is_x = ^(av_ld_data_aligned_unfiltered[9]) === 1'bx; + assign av_ld_data_aligned_filtered[9] = (av_ld_data_aligned_unfiltered_9_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[9]; + assign av_ld_data_aligned_unfiltered_10_is_x = ^(av_ld_data_aligned_unfiltered[10]) === 1'bx; + assign av_ld_data_aligned_filtered[10] = (av_ld_data_aligned_unfiltered_10_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[10]; + assign av_ld_data_aligned_unfiltered_11_is_x = ^(av_ld_data_aligned_unfiltered[11]) === 1'bx; + assign av_ld_data_aligned_filtered[11] = (av_ld_data_aligned_unfiltered_11_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[11]; + assign av_ld_data_aligned_unfiltered_12_is_x = ^(av_ld_data_aligned_unfiltered[12]) === 1'bx; + assign av_ld_data_aligned_filtered[12] = (av_ld_data_aligned_unfiltered_12_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[12]; + assign av_ld_data_aligned_unfiltered_13_is_x = ^(av_ld_data_aligned_unfiltered[13]) === 1'bx; + assign av_ld_data_aligned_filtered[13] = (av_ld_data_aligned_unfiltered_13_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[13]; + assign av_ld_data_aligned_unfiltered_14_is_x = ^(av_ld_data_aligned_unfiltered[14]) === 1'bx; + assign av_ld_data_aligned_filtered[14] = (av_ld_data_aligned_unfiltered_14_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[14]; + assign av_ld_data_aligned_unfiltered_15_is_x = ^(av_ld_data_aligned_unfiltered[15]) === 1'bx; + assign av_ld_data_aligned_filtered[15] = (av_ld_data_aligned_unfiltered_15_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[15]; + assign av_ld_data_aligned_unfiltered_16_is_x = ^(av_ld_data_aligned_unfiltered[16]) === 1'bx; + assign av_ld_data_aligned_filtered[16] = (av_ld_data_aligned_unfiltered_16_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[16]; + assign av_ld_data_aligned_unfiltered_17_is_x = ^(av_ld_data_aligned_unfiltered[17]) === 1'bx; + assign av_ld_data_aligned_filtered[17] = (av_ld_data_aligned_unfiltered_17_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[17]; + assign av_ld_data_aligned_unfiltered_18_is_x = ^(av_ld_data_aligned_unfiltered[18]) === 1'bx; + assign av_ld_data_aligned_filtered[18] = (av_ld_data_aligned_unfiltered_18_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[18]; + assign av_ld_data_aligned_unfiltered_19_is_x = ^(av_ld_data_aligned_unfiltered[19]) === 1'bx; + assign av_ld_data_aligned_filtered[19] = (av_ld_data_aligned_unfiltered_19_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[19]; + assign av_ld_data_aligned_unfiltered_20_is_x = ^(av_ld_data_aligned_unfiltered[20]) === 1'bx; + assign av_ld_data_aligned_filtered[20] = (av_ld_data_aligned_unfiltered_20_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[20]; + assign av_ld_data_aligned_unfiltered_21_is_x = ^(av_ld_data_aligned_unfiltered[21]) === 1'bx; + assign av_ld_data_aligned_filtered[21] = (av_ld_data_aligned_unfiltered_21_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[21]; + assign av_ld_data_aligned_unfiltered_22_is_x = ^(av_ld_data_aligned_unfiltered[22]) === 1'bx; + assign av_ld_data_aligned_filtered[22] = (av_ld_data_aligned_unfiltered_22_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[22]; + assign av_ld_data_aligned_unfiltered_23_is_x = ^(av_ld_data_aligned_unfiltered[23]) === 1'bx; + assign av_ld_data_aligned_filtered[23] = (av_ld_data_aligned_unfiltered_23_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[23]; + assign av_ld_data_aligned_unfiltered_24_is_x = ^(av_ld_data_aligned_unfiltered[24]) === 1'bx; + assign av_ld_data_aligned_filtered[24] = (av_ld_data_aligned_unfiltered_24_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[24]; + assign av_ld_data_aligned_unfiltered_25_is_x = ^(av_ld_data_aligned_unfiltered[25]) === 1'bx; + assign av_ld_data_aligned_filtered[25] = (av_ld_data_aligned_unfiltered_25_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[25]; + assign av_ld_data_aligned_unfiltered_26_is_x = ^(av_ld_data_aligned_unfiltered[26]) === 1'bx; + assign av_ld_data_aligned_filtered[26] = (av_ld_data_aligned_unfiltered_26_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[26]; + assign av_ld_data_aligned_unfiltered_27_is_x = ^(av_ld_data_aligned_unfiltered[27]) === 1'bx; + assign av_ld_data_aligned_filtered[27] = (av_ld_data_aligned_unfiltered_27_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[27]; + assign av_ld_data_aligned_unfiltered_28_is_x = ^(av_ld_data_aligned_unfiltered[28]) === 1'bx; + assign av_ld_data_aligned_filtered[28] = (av_ld_data_aligned_unfiltered_28_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[28]; + assign av_ld_data_aligned_unfiltered_29_is_x = ^(av_ld_data_aligned_unfiltered[29]) === 1'bx; + assign av_ld_data_aligned_filtered[29] = (av_ld_data_aligned_unfiltered_29_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[29]; + assign av_ld_data_aligned_unfiltered_30_is_x = ^(av_ld_data_aligned_unfiltered[30]) === 1'bx; + assign av_ld_data_aligned_filtered[30] = (av_ld_data_aligned_unfiltered_30_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[30]; + assign av_ld_data_aligned_unfiltered_31_is_x = ^(av_ld_data_aligned_unfiltered[31]) === 1'bx; + assign av_ld_data_aligned_filtered[31] = (av_ld_data_aligned_unfiltered_31_is_x & (R_ctrl_ld_non_io)) ? 1'b0 : av_ld_data_aligned_unfiltered[31]; + always @(posedge clk) + begin + if (reset_n) + if (^(F_valid) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/F_valid is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk) + begin + if (reset_n) + if (^(D_valid) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/D_valid is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk) + begin + if (reset_n) + if (^(E_valid) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/E_valid is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk) + begin + if (reset_n) + if (^(W_valid) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/W_valid is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + begin + end + else if (W_valid) + if (^(R_wr_dst_reg) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/R_wr_dst_reg is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + begin + end + else if (W_valid & R_wr_dst_reg) + if (^(W_wr_data) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/W_wr_data is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + begin + end + else if (W_valid & R_wr_dst_reg) + if (^(R_dst_regnum) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/R_dst_regnum is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk) + begin + if (reset_n) + if (^(d_write) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/d_write is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + begin + end + else if (d_write) + if (^(d_byteenable) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/d_byteenable is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + begin + end + else if (d_write | d_read) + if (^(d_address) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/d_address is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk) + begin + if (reset_n) + if (^(d_read) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/d_read is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk) + begin + if (reset_n) + if (^(i_read) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/i_read is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + begin + end + else if (i_read) + if (^(i_address) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/i_address is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + begin + end + else if (i_read & ~i_waitrequest) + if (^(i_readdata) === 1'bx) + begin + $write("%0d ns: ERROR: niosII_cpu_cpu_test_bench/i_readdata is 'x'\n", $time); + $stop; + end + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + begin + end + else if (W_valid & R_ctrl_ld) + if (^(av_ld_data_aligned_unfiltered) === 1'bx) + begin + $write("%0d ns: WARNING: niosII_cpu_cpu_test_bench/av_ld_data_aligned_unfiltered is 'x'\n", $time); + end + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + begin + end + else if (W_valid & R_wr_dst_reg) + if (^(W_wr_data) === 1'bx) + begin + $write("%0d ns: WARNING: niosII_cpu_cpu_test_bench/W_wr_data is 'x'\n", $time); + end + end + + + +//////////////// END SIMULATION-ONLY CONTENTS + +//synthesis translate_on +//synthesis read_comments_as_HDL on +// +// assign av_ld_data_aligned_filtered = av_ld_data_aligned_unfiltered; +// +//synthesis read_comments_as_HDL off + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_irq_mapper.sv b/Top/niosII/synthesis/submodules/niosII_irq_mapper.sv new file mode 100644 index 0000000..9293969 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_irq_mapper.sv @@ -0,0 +1,60 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_irq_mapper/altera_irq_mapper.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------------------------- +// Altera IRQ Mapper +// +// Parameters +// NUM_RCVRS : 2 +// SENDER_IRW_WIDTH : 32 +// IRQ_MAP : 0:0,1:1 +// +// ------------------------------------------------------- + +`timescale 1 ns / 1 ns + +module niosII_irq_mapper +( + // ------------------- + // Clock & Reset + // ------------------- + input clk, + input reset, + + // ------------------- + // IRQ Receivers + // ------------------- + input receiver0_irq, + input receiver1_irq, + + // ------------------- + // Command Source (Output) + // ------------------- + output reg [31 : 0] sender_irq +); + + + always @* begin + sender_irq = 0; + + sender_irq[0] = receiver0_irq; + sender_irq[1] = receiver1_irq; + end + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_jtag_uart.v b/Top/niosII/synthesis/submodules/niosII_jtag_uart.v new file mode 100644 index 0000000..21f5189 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_jtag_uart.v @@ -0,0 +1,588 @@ +//Legal Notice: (C)2022 Altera Corporation. All rights reserved. Your +//use of Altera Corporation's design tools, logic functions and other +//software and tools, and its AMPP partner logic functions, and any +//output files any of the foregoing (including device programming or +//simulation files), and any associated documentation or information are +//expressly subject to the terms and conditions of the Altera Program +//License Subscription Agreement or other applicable license agreement, +//including, without limitation, that your use is for the sole purpose +//of programming logic devices manufactured by Altera and sold by Altera +//or its authorized distributors. Please refer to the applicable +//agreement for further details. + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_jtag_uart_sim_scfifo_w ( + // inputs: + clk, + fifo_wdata, + fifo_wr, + + // outputs: + fifo_FF, + r_dat, + wfifo_empty, + wfifo_used + ) +; + + output fifo_FF; + output [ 7: 0] r_dat; + output wfifo_empty; + output [ 5: 0] wfifo_used; + input clk; + input [ 7: 0] fifo_wdata; + input fifo_wr; + + +wire fifo_FF; +wire [ 7: 0] r_dat; +wire wfifo_empty; +wire [ 5: 0] wfifo_used; + +//synthesis translate_off +//////////////// SIMULATION-ONLY CONTENTS + always @(posedge clk) + begin + if (fifo_wr) + $write("%c", fifo_wdata); + end + + + assign wfifo_used = {6{1'b0}}; + assign r_dat = {8{1'b0}}; + assign fifo_FF = 1'b0; + assign wfifo_empty = 1'b1; + +//////////////// END SIMULATION-ONLY CONTENTS + +//synthesis translate_on + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_jtag_uart_scfifo_w ( + // inputs: + clk, + fifo_clear, + fifo_wdata, + fifo_wr, + rd_wfifo, + + // outputs: + fifo_FF, + r_dat, + wfifo_empty, + wfifo_used + ) +; + + output fifo_FF; + output [ 7: 0] r_dat; + output wfifo_empty; + output [ 5: 0] wfifo_used; + input clk; + input fifo_clear; + input [ 7: 0] fifo_wdata; + input fifo_wr; + input rd_wfifo; + + +wire fifo_FF; +wire [ 7: 0] r_dat; +wire wfifo_empty; +wire [ 5: 0] wfifo_used; + +//synthesis translate_off +//////////////// SIMULATION-ONLY CONTENTS + niosII_jtag_uart_sim_scfifo_w the_niosII_jtag_uart_sim_scfifo_w + ( + .clk (clk), + .fifo_FF (fifo_FF), + .fifo_wdata (fifo_wdata), + .fifo_wr (fifo_wr), + .r_dat (r_dat), + .wfifo_empty (wfifo_empty), + .wfifo_used (wfifo_used) + ); + + +//////////////// END SIMULATION-ONLY CONTENTS + +//synthesis translate_on +//synthesis read_comments_as_HDL on +// scfifo wfifo +// ( +// .aclr (fifo_clear), +// .clock (clk), +// .data (fifo_wdata), +// .empty (wfifo_empty), +// .full (fifo_FF), +// .q (r_dat), +// .rdreq (rd_wfifo), +// .usedw (wfifo_used), +// .wrreq (fifo_wr) +// ); +// +// defparam wfifo.lpm_hint = "RAM_BLOCK_TYPE=AUTO", +// wfifo.lpm_numwords = 64, +// wfifo.lpm_showahead = "OFF", +// wfifo.lpm_type = "scfifo", +// wfifo.lpm_width = 8, +// wfifo.lpm_widthu = 6, +// wfifo.overflow_checking = "OFF", +// wfifo.underflow_checking = "OFF", +// wfifo.use_eab = "ON"; +// +//synthesis read_comments_as_HDL off + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_jtag_uart_sim_scfifo_r ( + // inputs: + clk, + fifo_rd, + rst_n, + + // outputs: + fifo_EF, + fifo_rdata, + rfifo_full, + rfifo_used + ) +; + + output fifo_EF; + output [ 7: 0] fifo_rdata; + output rfifo_full; + output [ 5: 0] rfifo_used; + input clk; + input fifo_rd; + input rst_n; + + +reg [ 31: 0] bytes_left; +wire fifo_EF; +reg fifo_rd_d; +wire [ 7: 0] fifo_rdata; +wire new_rom; +wire [ 31: 0] num_bytes; +wire [ 6: 0] rfifo_entries; +wire rfifo_full; +wire [ 5: 0] rfifo_used; + +//synthesis translate_off +//////////////// SIMULATION-ONLY CONTENTS + // Generate rfifo_entries for simulation + always @(posedge clk or negedge rst_n) + begin + if (rst_n == 0) + begin + bytes_left <= 32'h0; + fifo_rd_d <= 1'b0; + end + else + begin + fifo_rd_d <= fifo_rd; + // decrement on read + if (fifo_rd_d) + bytes_left <= bytes_left - 1'b1; + // catch new contents + if (new_rom) + bytes_left <= num_bytes; + end + end + + + assign fifo_EF = bytes_left == 32'b0; + assign rfifo_full = bytes_left > 7'h40; + assign rfifo_entries = (rfifo_full) ? 7'h40 : bytes_left; + assign rfifo_used = rfifo_entries[5 : 0]; + assign new_rom = 1'b0; + assign num_bytes = 32'b0; + assign fifo_rdata = 8'b0; + +//////////////// END SIMULATION-ONLY CONTENTS + +//synthesis translate_on + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_jtag_uart_scfifo_r ( + // inputs: + clk, + fifo_clear, + fifo_rd, + rst_n, + t_dat, + wr_rfifo, + + // outputs: + fifo_EF, + fifo_rdata, + rfifo_full, + rfifo_used + ) +; + + output fifo_EF; + output [ 7: 0] fifo_rdata; + output rfifo_full; + output [ 5: 0] rfifo_used; + input clk; + input fifo_clear; + input fifo_rd; + input rst_n; + input [ 7: 0] t_dat; + input wr_rfifo; + + +wire fifo_EF; +wire [ 7: 0] fifo_rdata; +wire rfifo_full; +wire [ 5: 0] rfifo_used; + +//synthesis translate_off +//////////////// SIMULATION-ONLY CONTENTS + niosII_jtag_uart_sim_scfifo_r the_niosII_jtag_uart_sim_scfifo_r + ( + .clk (clk), + .fifo_EF (fifo_EF), + .fifo_rd (fifo_rd), + .fifo_rdata (fifo_rdata), + .rfifo_full (rfifo_full), + .rfifo_used (rfifo_used), + .rst_n (rst_n) + ); + + +//////////////// END SIMULATION-ONLY CONTENTS + +//synthesis translate_on +//synthesis read_comments_as_HDL on +// scfifo rfifo +// ( +// .aclr (fifo_clear), +// .clock (clk), +// .data (t_dat), +// .empty (fifo_EF), +// .full (rfifo_full), +// .q (fifo_rdata), +// .rdreq (fifo_rd), +// .usedw (rfifo_used), +// .wrreq (wr_rfifo) +// ); +// +// defparam rfifo.lpm_hint = "RAM_BLOCK_TYPE=AUTO", +// rfifo.lpm_numwords = 64, +// rfifo.lpm_showahead = "OFF", +// rfifo.lpm_type = "scfifo", +// rfifo.lpm_width = 8, +// rfifo.lpm_widthu = 6, +// rfifo.overflow_checking = "OFF", +// rfifo.underflow_checking = "OFF", +// rfifo.use_eab = "ON"; +// +//synthesis read_comments_as_HDL off + +endmodule + + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_jtag_uart ( + // inputs: + av_address, + av_chipselect, + av_read_n, + av_write_n, + av_writedata, + clk, + rst_n, + + // outputs: + av_irq, + av_readdata, + av_waitrequest, + dataavailable, + readyfordata + ) + /* synthesis ALTERA_ATTRIBUTE = "SUPPRESS_DA_RULE_INTERNAL=\"R101,C106,D101,D103\"" */ ; + + output av_irq; + output [ 31: 0] av_readdata; + output av_waitrequest; + output dataavailable; + output readyfordata; + input av_address; + input av_chipselect; + input av_read_n; + input av_write_n; + input [ 31: 0] av_writedata; + input clk; + input rst_n; + + +reg ac; +wire activity; +wire av_irq; +wire [ 31: 0] av_readdata; +reg av_waitrequest; +reg dataavailable; +reg fifo_AE; +reg fifo_AF; +wire fifo_EF; +wire fifo_FF; +wire fifo_clear; +wire fifo_rd; +wire [ 7: 0] fifo_rdata; +wire [ 7: 0] fifo_wdata; +reg fifo_wr; +reg ien_AE; +reg ien_AF; +wire ipen_AE; +wire ipen_AF; +reg pause_irq; +wire [ 7: 0] r_dat; +wire r_ena; +reg r_val; +wire rd_wfifo; +reg read_0; +reg readyfordata; +wire rfifo_full; +wire [ 5: 0] rfifo_used; +reg rvalid; +reg sim_r_ena; +reg sim_t_dat; +reg sim_t_ena; +reg sim_t_pause; +wire [ 7: 0] t_dat; +reg t_dav; +wire t_ena; +wire t_pause; +wire wfifo_empty; +wire [ 5: 0] wfifo_used; +reg woverflow; +wire wr_rfifo; + //avalon_jtag_slave, which is an e_avalon_slave + assign rd_wfifo = r_ena & ~wfifo_empty; + assign wr_rfifo = t_ena & ~rfifo_full; + assign fifo_clear = ~rst_n; + niosII_jtag_uart_scfifo_w the_niosII_jtag_uart_scfifo_w + ( + .clk (clk), + .fifo_FF (fifo_FF), + .fifo_clear (fifo_clear), + .fifo_wdata (fifo_wdata), + .fifo_wr (fifo_wr), + .r_dat (r_dat), + .rd_wfifo (rd_wfifo), + .wfifo_empty (wfifo_empty), + .wfifo_used (wfifo_used) + ); + + niosII_jtag_uart_scfifo_r the_niosII_jtag_uart_scfifo_r + ( + .clk (clk), + .fifo_EF (fifo_EF), + .fifo_clear (fifo_clear), + .fifo_rd (fifo_rd), + .fifo_rdata (fifo_rdata), + .rfifo_full (rfifo_full), + .rfifo_used (rfifo_used), + .rst_n (rst_n), + .t_dat (t_dat), + .wr_rfifo (wr_rfifo) + ); + + assign ipen_AE = ien_AE & fifo_AE; + assign ipen_AF = ien_AF & (pause_irq | fifo_AF); + assign av_irq = ipen_AE | ipen_AF; + assign activity = t_pause | t_ena; + always @(posedge clk or negedge rst_n) + begin + if (rst_n == 0) + pause_irq <= 1'b0; + else // only if fifo is not empty... + if (t_pause & ~fifo_EF) + pause_irq <= 1'b1; + else if (read_0) + pause_irq <= 1'b0; + end + + + always @(posedge clk or negedge rst_n) + begin + if (rst_n == 0) + begin + r_val <= 1'b0; + t_dav <= 1'b1; + end + else + begin + r_val <= r_ena & ~wfifo_empty; + t_dav <= ~rfifo_full; + end + end + + + always @(posedge clk or negedge rst_n) + begin + if (rst_n == 0) + begin + fifo_AE <= 1'b0; + fifo_AF <= 1'b0; + fifo_wr <= 1'b0; + rvalid <= 1'b0; + read_0 <= 1'b0; + ien_AE <= 1'b0; + ien_AF <= 1'b0; + ac <= 1'b0; + woverflow <= 1'b0; + av_waitrequest <= 1'b1; + end + else + begin + fifo_AE <= {fifo_FF,wfifo_used} <= 8; + fifo_AF <= (7'h40 - {rfifo_full,rfifo_used}) <= 8; + fifo_wr <= 1'b0; + read_0 <= 1'b0; + av_waitrequest <= ~(av_chipselect & (~av_write_n | ~av_read_n) & av_waitrequest); + if (activity) + ac <= 1'b1; + // write + if (av_chipselect & ~av_write_n & av_waitrequest) + // addr 1 is control; addr 0 is data + if (av_address) + begin + ien_AF <= av_writedata[0]; + ien_AE <= av_writedata[1]; + if (av_writedata[10] & ~activity) + ac <= 1'b0; + end + else + begin + fifo_wr <= ~fifo_FF; + woverflow <= fifo_FF; + end + // read + if (av_chipselect & ~av_read_n & av_waitrequest) + begin + // addr 1 is interrupt; addr 0 is data + if (~av_address) + rvalid <= ~fifo_EF; + read_0 <= ~av_address; + end + end + end + + + assign fifo_wdata = av_writedata[7 : 0]; + assign fifo_rd = (av_chipselect & ~av_read_n & av_waitrequest & ~av_address) ? ~fifo_EF : 1'b0; + assign av_readdata = read_0 ? { {9{1'b0}},rfifo_full,rfifo_used,rvalid,woverflow,~fifo_FF,~fifo_EF,1'b0,ac,ipen_AE,ipen_AF,fifo_rdata } : { {9{1'b0}},(7'h40 - {fifo_FF,wfifo_used}),rvalid,woverflow,~fifo_FF,~fifo_EF,1'b0,ac,ipen_AE,ipen_AF,{6{1'b0}},ien_AE,ien_AF }; + always @(posedge clk or negedge rst_n) + begin + if (rst_n == 0) + readyfordata <= 0; + else + readyfordata <= ~fifo_FF; + end + + + +//synthesis translate_off +//////////////// SIMULATION-ONLY CONTENTS + // Tie off Atlantic Interface signals not used for simulation + always @(posedge clk) + begin + sim_t_pause <= 1'b0; + sim_t_ena <= 1'b0; + sim_t_dat <= t_dav ? r_dat : {8{r_val}}; + sim_r_ena <= 1'b0; + end + + + assign r_ena = sim_r_ena; + assign t_ena = sim_t_ena; + assign t_dat = sim_t_dat; + assign t_pause = sim_t_pause; + always @(fifo_EF) + begin + dataavailable = ~fifo_EF; + end + + + +//////////////// END SIMULATION-ONLY CONTENTS + +//synthesis translate_on +//synthesis read_comments_as_HDL on +// alt_jtag_atlantic niosII_jtag_uart_alt_jtag_atlantic +// ( +// .clk (clk), +// .r_dat (r_dat), +// .r_ena (r_ena), +// .r_val (r_val), +// .rst_n (rst_n), +// .t_dat (t_dat), +// .t_dav (t_dav), +// .t_ena (t_ena), +// .t_pause (t_pause) +// ); +// +// defparam niosII_jtag_uart_alt_jtag_atlantic.INSTANCE_ID = 0, +// niosII_jtag_uart_alt_jtag_atlantic.LOG2_RXFIFO_DEPTH = 6, +// niosII_jtag_uart_alt_jtag_atlantic.LOG2_TXFIFO_DEPTH = 6, +// niosII_jtag_uart_alt_jtag_atlantic.SLD_AUTO_INSTANCE_INDEX = "YES"; +// +// always @(posedge clk or negedge rst_n) +// begin +// if (rst_n == 0) +// dataavailable <= 0; +// else +// dataavailable <= ~fifo_EF; +// end +// +// +//synthesis read_comments_as_HDL off + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_mem.hex b/Top/niosII/synthesis/submodules/niosII_mem.hex new file mode 100644 index 0000000..19e432c --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mem.hex @@ -0,0 +1,32769 @@ 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+:047FF7000000000086 +:047FF8000000000085 +:047FF9000000000084 +:047FFA000000000083 +:047FFB000000000082 +:047FFC000000000081 +:047FFD000000000080 +:047FFE00000000007F +:047FFF00000000007E +:00000001ff diff --git a/Top/niosII/synthesis/submodules/niosII_mem.v b/Top/niosII/synthesis/submodules/niosII_mem.v new file mode 100644 index 0000000..4d4e712 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mem.v @@ -0,0 +1,125 @@ +//Legal Notice: (C)2022 Altera Corporation. All rights reserved. Your +//use of Altera Corporation's design tools, logic functions and other +//software and tools, and its AMPP partner logic functions, and any +//output files any of the foregoing (including device programming or +//simulation files), and any associated documentation or information are +//expressly subject to the terms and conditions of the Altera Program +//License Subscription Agreement or other applicable license agreement, +//including, without limitation, that your use is for the sole purpose +//of programming logic devices manufactured by Altera and sold by Altera +//or its authorized distributors. Please refer to the applicable +//agreement for further details. + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_mem ( + // inputs: + address, + address2, + byteenable, + byteenable2, + chipselect, + chipselect2, + clk, + clken, + clken2, + freeze, + reset, + reset_req, + write, + write2, + writedata, + writedata2, + + // outputs: + readdata, + readdata2 + ) +; + + parameter INIT_FILE = "niosII_mem.hex"; + + + output [ 31: 0] readdata; + output [ 31: 0] readdata2; + input [ 14: 0] address; + input [ 14: 0] address2; + input [ 3: 0] byteenable; + input [ 3: 0] byteenable2; + input chipselect; + input chipselect2; + input clk; + input clken; + input clken2; + input freeze; + input reset; + input reset_req; + input write; + input write2; + input [ 31: 0] writedata; + input [ 31: 0] writedata2; + + +wire clocken0; +wire not_clken; +wire not_clken2; +wire [ 31: 0] readdata; +wire [ 31: 0] readdata2; +wire wren; +wire wren2; + assign wren = chipselect & write & clken; + assign not_clken = ~clken; + assign not_clken2 = ~clken2; + assign clocken0 = ~reset_req; + assign wren2 = chipselect2 & write2 & clken2; + altsyncram the_altsyncram + ( + .address_a (address), + .address_b (address2), + .addressstall_a (not_clken), + .addressstall_b (not_clken2), + .byteena_a (byteenable), + .byteena_b (byteenable2), + .clock0 (clk), + .clocken0 (clocken0), + .data_a (writedata), + .data_b (writedata2), + .q_a (readdata), + .q_b (readdata2), + .wren_a (wren), + .wren_b (wren2) + ); + + defparam the_altsyncram.address_reg_b = "CLOCK0", + the_altsyncram.byte_size = 8, + the_altsyncram.byteena_reg_b = "CLOCK0", + the_altsyncram.indata_reg_b = "CLOCK0", + the_altsyncram.init_file = INIT_FILE, + the_altsyncram.lpm_type = "altsyncram", + the_altsyncram.maximum_depth = 32768, + the_altsyncram.numwords_a = 32768, + the_altsyncram.numwords_b = 32768, + the_altsyncram.operation_mode = "BIDIR_DUAL_PORT", + the_altsyncram.outdata_reg_a = "UNREGISTERED", + the_altsyncram.outdata_reg_b = "UNREGISTERED", + the_altsyncram.ram_block_type = "AUTO", + the_altsyncram.read_during_write_mode_mixed_ports = "DONT_CARE", + the_altsyncram.width_a = 32, + the_altsyncram.width_b = 32, + the_altsyncram.width_byteena_a = 4, + the_altsyncram.width_byteena_b = 4, + the_altsyncram.widthad_a = 15, + the_altsyncram.widthad_b = 15, + the_altsyncram.wrcontrol_wraddress_reg_b = "CLOCK0"; + + //s1, which is an e_avalon_slave + //s2, which is an e_avalon_slave + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0.v b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0.v new file mode 100644 index 0000000..3f697ec --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0.v @@ -0,0 +1,2878 @@ +// niosII_mm_interconnect_0.v + +// This file was auto-generated from altera_mm_interconnect_hw.tcl. If you edit it your changes +// will probably be lost. +// +// Generated using ACDS version 18.1 625 + +`timescale 1 ps / 1 ps +module niosII_mm_interconnect_0 ( + input wire clk_clk_clk, // clk_clk.clk + input wire cpu_reset_reset_bridge_in_reset_reset, // cpu_reset_reset_bridge_in_reset.reset + input wire [17:0] cpu_data_master_address, // cpu_data_master.address + output wire cpu_data_master_waitrequest, // .waitrequest + input wire [3:0] cpu_data_master_byteenable, // .byteenable + input wire cpu_data_master_read, // .read + output wire [31:0] cpu_data_master_readdata, // .readdata + input wire cpu_data_master_write, // .write + input wire [31:0] cpu_data_master_writedata, // .writedata + input wire cpu_data_master_debugaccess, // .debugaccess + input wire [17:0] cpu_instruction_master_address, // cpu_instruction_master.address + output wire cpu_instruction_master_waitrequest, // .waitrequest + input wire cpu_instruction_master_read, // .read + output wire [31:0] cpu_instruction_master_readdata, // .readdata + output wire [8:0] cpu_debug_mem_slave_address, // cpu_debug_mem_slave.address + output wire cpu_debug_mem_slave_write, // .write + output wire cpu_debug_mem_slave_read, // .read + input wire [31:0] cpu_debug_mem_slave_readdata, // .readdata + output wire [31:0] cpu_debug_mem_slave_writedata, // .writedata + output wire [3:0] cpu_debug_mem_slave_byteenable, // .byteenable + input wire cpu_debug_mem_slave_waitrequest, // .waitrequest + output wire cpu_debug_mem_slave_debugaccess, // .debugaccess + output wire [0:0] jtag_uart_avalon_jtag_slave_address, // jtag_uart_avalon_jtag_slave.address + output wire jtag_uart_avalon_jtag_slave_write, // .write + output wire jtag_uart_avalon_jtag_slave_read, // .read + input wire [31:0] jtag_uart_avalon_jtag_slave_readdata, // .readdata + output wire [31:0] jtag_uart_avalon_jtag_slave_writedata, // .writedata + input wire jtag_uart_avalon_jtag_slave_waitrequest, // .waitrequest + output wire jtag_uart_avalon_jtag_slave_chipselect, // .chipselect + output wire [14:0] mem_s1_address, // mem_s1.address + output wire mem_s1_write, // .write + input wire [31:0] mem_s1_readdata, // .readdata + output wire [31:0] mem_s1_writedata, // .writedata + output wire [3:0] mem_s1_byteenable, // .byteenable + output wire mem_s1_chipselect, // .chipselect + output wire mem_s1_clken, // .clken + output wire [14:0] mem_s2_address, // mem_s2.address + output wire mem_s2_write, // .write + input wire [31:0] mem_s2_readdata, // .readdata + output wire [31:0] mem_s2_writedata, // .writedata + output wire [3:0] mem_s2_byteenable, // .byteenable + output wire mem_s2_chipselect, // .chipselect + output wire mem_s2_clken, // .clken + output wire [0:0] sem_ctl_slave_address, // sem_ctl_slave.address + output wire sem_ctl_slave_write, // .write + output wire sem_ctl_slave_read, // .read + input wire [31:0] sem_ctl_slave_readdata, // .readdata + output wire [31:0] sem_ctl_slave_writedata, // .writedata + output wire [1:0] sem_ram_slave_address, // sem_ram_slave.address + output wire sem_ram_slave_write, // .write + output wire [31:0] sem_ram_slave_writedata, // .writedata + output wire [2:0] sys_clk_timer_s1_address, // sys_clk_timer_s1.address + output wire sys_clk_timer_s1_write, // .write + input wire [15:0] sys_clk_timer_s1_readdata, // .readdata + output wire [15:0] sys_clk_timer_s1_writedata, // .writedata + output wire sys_clk_timer_s1_chipselect // .chipselect + ); + + wire cpu_data_master_translator_avalon_universal_master_0_waitrequest; // cpu_data_master_agent:av_waitrequest -> cpu_data_master_translator:uav_waitrequest + wire [31:0] cpu_data_master_translator_avalon_universal_master_0_readdata; // cpu_data_master_agent:av_readdata -> cpu_data_master_translator:uav_readdata + wire cpu_data_master_translator_avalon_universal_master_0_debugaccess; // cpu_data_master_translator:uav_debugaccess -> cpu_data_master_agent:av_debugaccess + wire [17:0] cpu_data_master_translator_avalon_universal_master_0_address; // cpu_data_master_translator:uav_address -> cpu_data_master_agent:av_address + wire cpu_data_master_translator_avalon_universal_master_0_read; // cpu_data_master_translator:uav_read -> cpu_data_master_agent:av_read + wire [3:0] cpu_data_master_translator_avalon_universal_master_0_byteenable; // cpu_data_master_translator:uav_byteenable -> cpu_data_master_agent:av_byteenable + wire cpu_data_master_translator_avalon_universal_master_0_readdatavalid; // cpu_data_master_agent:av_readdatavalid -> cpu_data_master_translator:uav_readdatavalid + wire cpu_data_master_translator_avalon_universal_master_0_lock; // cpu_data_master_translator:uav_lock -> cpu_data_master_agent:av_lock + wire cpu_data_master_translator_avalon_universal_master_0_write; // cpu_data_master_translator:uav_write -> cpu_data_master_agent:av_write + wire [31:0] cpu_data_master_translator_avalon_universal_master_0_writedata; // cpu_data_master_translator:uav_writedata -> cpu_data_master_agent:av_writedata + wire [2:0] cpu_data_master_translator_avalon_universal_master_0_burstcount; // cpu_data_master_translator:uav_burstcount -> cpu_data_master_agent:av_burstcount + wire rsp_mux_src_valid; // rsp_mux:src_valid -> cpu_data_master_agent:rp_valid + wire [93:0] rsp_mux_src_data; // rsp_mux:src_data -> cpu_data_master_agent:rp_data + wire rsp_mux_src_ready; // cpu_data_master_agent:rp_ready -> rsp_mux:src_ready + wire [6:0] rsp_mux_src_channel; // rsp_mux:src_channel -> cpu_data_master_agent:rp_channel + wire rsp_mux_src_startofpacket; // rsp_mux:src_startofpacket -> cpu_data_master_agent:rp_startofpacket + wire rsp_mux_src_endofpacket; // rsp_mux:src_endofpacket -> cpu_data_master_agent:rp_endofpacket + wire cpu_instruction_master_translator_avalon_universal_master_0_waitrequest; // cpu_instruction_master_agent:av_waitrequest -> cpu_instruction_master_translator:uav_waitrequest + wire [31:0] cpu_instruction_master_translator_avalon_universal_master_0_readdata; // cpu_instruction_master_agent:av_readdata -> cpu_instruction_master_translator:uav_readdata + wire cpu_instruction_master_translator_avalon_universal_master_0_debugaccess; // cpu_instruction_master_translator:uav_debugaccess -> cpu_instruction_master_agent:av_debugaccess + wire [17:0] cpu_instruction_master_translator_avalon_universal_master_0_address; // cpu_instruction_master_translator:uav_address -> cpu_instruction_master_agent:av_address + wire cpu_instruction_master_translator_avalon_universal_master_0_read; // cpu_instruction_master_translator:uav_read -> cpu_instruction_master_agent:av_read + wire [3:0] cpu_instruction_master_translator_avalon_universal_master_0_byteenable; // cpu_instruction_master_translator:uav_byteenable -> cpu_instruction_master_agent:av_byteenable + wire cpu_instruction_master_translator_avalon_universal_master_0_readdatavalid; // cpu_instruction_master_agent:av_readdatavalid -> cpu_instruction_master_translator:uav_readdatavalid + wire cpu_instruction_master_translator_avalon_universal_master_0_lock; // cpu_instruction_master_translator:uav_lock -> cpu_instruction_master_agent:av_lock + wire cpu_instruction_master_translator_avalon_universal_master_0_write; // cpu_instruction_master_translator:uav_write -> cpu_instruction_master_agent:av_write + wire [31:0] cpu_instruction_master_translator_avalon_universal_master_0_writedata; // cpu_instruction_master_translator:uav_writedata -> cpu_instruction_master_agent:av_writedata + wire [2:0] cpu_instruction_master_translator_avalon_universal_master_0_burstcount; // cpu_instruction_master_translator:uav_burstcount -> cpu_instruction_master_agent:av_burstcount + wire rsp_mux_001_src_valid; // rsp_mux_001:src_valid -> cpu_instruction_master_agent:rp_valid + wire [93:0] rsp_mux_001_src_data; // rsp_mux_001:src_data -> cpu_instruction_master_agent:rp_data + wire rsp_mux_001_src_ready; // cpu_instruction_master_agent:rp_ready -> rsp_mux_001:src_ready + wire [6:0] rsp_mux_001_src_channel; // rsp_mux_001:src_channel -> cpu_instruction_master_agent:rp_channel + wire rsp_mux_001_src_startofpacket; // rsp_mux_001:src_startofpacket -> cpu_instruction_master_agent:rp_startofpacket + wire rsp_mux_001_src_endofpacket; // rsp_mux_001:src_endofpacket -> cpu_instruction_master_agent:rp_endofpacket + wire [31:0] jtag_uart_avalon_jtag_slave_agent_m0_readdata; // jtag_uart_avalon_jtag_slave_translator:uav_readdata -> jtag_uart_avalon_jtag_slave_agent:m0_readdata + wire jtag_uart_avalon_jtag_slave_agent_m0_waitrequest; // jtag_uart_avalon_jtag_slave_translator:uav_waitrequest -> jtag_uart_avalon_jtag_slave_agent:m0_waitrequest + wire jtag_uart_avalon_jtag_slave_agent_m0_debugaccess; // jtag_uart_avalon_jtag_slave_agent:m0_debugaccess -> jtag_uart_avalon_jtag_slave_translator:uav_debugaccess + wire [17:0] jtag_uart_avalon_jtag_slave_agent_m0_address; // jtag_uart_avalon_jtag_slave_agent:m0_address -> jtag_uart_avalon_jtag_slave_translator:uav_address + wire [3:0] jtag_uart_avalon_jtag_slave_agent_m0_byteenable; // jtag_uart_avalon_jtag_slave_agent:m0_byteenable -> jtag_uart_avalon_jtag_slave_translator:uav_byteenable + wire jtag_uart_avalon_jtag_slave_agent_m0_read; // jtag_uart_avalon_jtag_slave_agent:m0_read -> jtag_uart_avalon_jtag_slave_translator:uav_read + wire jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid; // jtag_uart_avalon_jtag_slave_translator:uav_readdatavalid -> jtag_uart_avalon_jtag_slave_agent:m0_readdatavalid + wire jtag_uart_avalon_jtag_slave_agent_m0_lock; // jtag_uart_avalon_jtag_slave_agent:m0_lock -> jtag_uart_avalon_jtag_slave_translator:uav_lock + wire [31:0] jtag_uart_avalon_jtag_slave_agent_m0_writedata; // jtag_uart_avalon_jtag_slave_agent:m0_writedata -> jtag_uart_avalon_jtag_slave_translator:uav_writedata + wire jtag_uart_avalon_jtag_slave_agent_m0_write; // jtag_uart_avalon_jtag_slave_agent:m0_write -> jtag_uart_avalon_jtag_slave_translator:uav_write + wire [2:0] jtag_uart_avalon_jtag_slave_agent_m0_burstcount; // jtag_uart_avalon_jtag_slave_agent:m0_burstcount -> jtag_uart_avalon_jtag_slave_translator:uav_burstcount + wire jtag_uart_avalon_jtag_slave_agent_rf_source_valid; // jtag_uart_avalon_jtag_slave_agent:rf_source_valid -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_valid + wire [94:0] jtag_uart_avalon_jtag_slave_agent_rf_source_data; // jtag_uart_avalon_jtag_slave_agent:rf_source_data -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_data + wire jtag_uart_avalon_jtag_slave_agent_rf_source_ready; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_ready -> jtag_uart_avalon_jtag_slave_agent:rf_source_ready + wire jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket; // jtag_uart_avalon_jtag_slave_agent:rf_source_startofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_startofpacket + wire jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket; // jtag_uart_avalon_jtag_slave_agent:rf_source_endofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_endofpacket + wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_valid -> jtag_uart_avalon_jtag_slave_agent:rf_sink_valid + wire [94:0] jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_data -> jtag_uart_avalon_jtag_slave_agent:rf_sink_data + wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready; // jtag_uart_avalon_jtag_slave_agent:rf_sink_ready -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_ready + wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_startofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_startofpacket + wire jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket; // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_endofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_endofpacket + wire cmd_mux_src_valid; // cmd_mux:src_valid -> jtag_uart_avalon_jtag_slave_agent:cp_valid + wire [93:0] cmd_mux_src_data; // cmd_mux:src_data -> jtag_uart_avalon_jtag_slave_agent:cp_data + wire cmd_mux_src_ready; // jtag_uart_avalon_jtag_slave_agent:cp_ready -> cmd_mux:src_ready + wire [6:0] cmd_mux_src_channel; // cmd_mux:src_channel -> jtag_uart_avalon_jtag_slave_agent:cp_channel + wire cmd_mux_src_startofpacket; // cmd_mux:src_startofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_startofpacket + wire cmd_mux_src_endofpacket; // cmd_mux:src_endofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_endofpacket + wire [31:0] sem_ctl_slave_agent_m0_readdata; // sem_ctl_slave_translator:uav_readdata -> sem_ctl_slave_agent:m0_readdata + wire sem_ctl_slave_agent_m0_waitrequest; // sem_ctl_slave_translator:uav_waitrequest -> sem_ctl_slave_agent:m0_waitrequest + wire sem_ctl_slave_agent_m0_debugaccess; // sem_ctl_slave_agent:m0_debugaccess -> sem_ctl_slave_translator:uav_debugaccess + wire [17:0] sem_ctl_slave_agent_m0_address; // sem_ctl_slave_agent:m0_address -> sem_ctl_slave_translator:uav_address + wire [3:0] sem_ctl_slave_agent_m0_byteenable; // sem_ctl_slave_agent:m0_byteenable -> sem_ctl_slave_translator:uav_byteenable + wire sem_ctl_slave_agent_m0_read; // sem_ctl_slave_agent:m0_read -> sem_ctl_slave_translator:uav_read + wire sem_ctl_slave_agent_m0_readdatavalid; // sem_ctl_slave_translator:uav_readdatavalid -> sem_ctl_slave_agent:m0_readdatavalid + wire sem_ctl_slave_agent_m0_lock; // sem_ctl_slave_agent:m0_lock -> sem_ctl_slave_translator:uav_lock + wire [31:0] sem_ctl_slave_agent_m0_writedata; // sem_ctl_slave_agent:m0_writedata -> sem_ctl_slave_translator:uav_writedata + wire sem_ctl_slave_agent_m0_write; // sem_ctl_slave_agent:m0_write -> sem_ctl_slave_translator:uav_write + wire [2:0] sem_ctl_slave_agent_m0_burstcount; // sem_ctl_slave_agent:m0_burstcount -> sem_ctl_slave_translator:uav_burstcount + wire sem_ctl_slave_agent_rf_source_valid; // sem_ctl_slave_agent:rf_source_valid -> sem_ctl_slave_agent_rsp_fifo:in_valid + wire [94:0] sem_ctl_slave_agent_rf_source_data; // sem_ctl_slave_agent:rf_source_data -> sem_ctl_slave_agent_rsp_fifo:in_data + wire sem_ctl_slave_agent_rf_source_ready; // sem_ctl_slave_agent_rsp_fifo:in_ready -> sem_ctl_slave_agent:rf_source_ready + wire sem_ctl_slave_agent_rf_source_startofpacket; // sem_ctl_slave_agent:rf_source_startofpacket -> sem_ctl_slave_agent_rsp_fifo:in_startofpacket + wire sem_ctl_slave_agent_rf_source_endofpacket; // sem_ctl_slave_agent:rf_source_endofpacket -> sem_ctl_slave_agent_rsp_fifo:in_endofpacket + wire sem_ctl_slave_agent_rsp_fifo_out_valid; // sem_ctl_slave_agent_rsp_fifo:out_valid -> sem_ctl_slave_agent:rf_sink_valid + wire [94:0] sem_ctl_slave_agent_rsp_fifo_out_data; // sem_ctl_slave_agent_rsp_fifo:out_data -> sem_ctl_slave_agent:rf_sink_data + wire sem_ctl_slave_agent_rsp_fifo_out_ready; // sem_ctl_slave_agent:rf_sink_ready -> sem_ctl_slave_agent_rsp_fifo:out_ready + wire sem_ctl_slave_agent_rsp_fifo_out_startofpacket; // sem_ctl_slave_agent_rsp_fifo:out_startofpacket -> sem_ctl_slave_agent:rf_sink_startofpacket + wire sem_ctl_slave_agent_rsp_fifo_out_endofpacket; // sem_ctl_slave_agent_rsp_fifo:out_endofpacket -> sem_ctl_slave_agent:rf_sink_endofpacket + wire cmd_mux_001_src_valid; // cmd_mux_001:src_valid -> sem_ctl_slave_agent:cp_valid + wire [93:0] cmd_mux_001_src_data; // cmd_mux_001:src_data -> sem_ctl_slave_agent:cp_data + wire cmd_mux_001_src_ready; // sem_ctl_slave_agent:cp_ready -> cmd_mux_001:src_ready + wire [6:0] cmd_mux_001_src_channel; // cmd_mux_001:src_channel -> sem_ctl_slave_agent:cp_channel + wire cmd_mux_001_src_startofpacket; // cmd_mux_001:src_startofpacket -> sem_ctl_slave_agent:cp_startofpacket + wire cmd_mux_001_src_endofpacket; // cmd_mux_001:src_endofpacket -> sem_ctl_slave_agent:cp_endofpacket + wire [31:0] cpu_debug_mem_slave_agent_m0_readdata; // cpu_debug_mem_slave_translator:uav_readdata -> cpu_debug_mem_slave_agent:m0_readdata + wire cpu_debug_mem_slave_agent_m0_waitrequest; // cpu_debug_mem_slave_translator:uav_waitrequest -> cpu_debug_mem_slave_agent:m0_waitrequest + wire cpu_debug_mem_slave_agent_m0_debugaccess; // cpu_debug_mem_slave_agent:m0_debugaccess -> cpu_debug_mem_slave_translator:uav_debugaccess + wire [17:0] cpu_debug_mem_slave_agent_m0_address; // cpu_debug_mem_slave_agent:m0_address -> cpu_debug_mem_slave_translator:uav_address + wire [3:0] cpu_debug_mem_slave_agent_m0_byteenable; // cpu_debug_mem_slave_agent:m0_byteenable -> cpu_debug_mem_slave_translator:uav_byteenable + wire cpu_debug_mem_slave_agent_m0_read; // cpu_debug_mem_slave_agent:m0_read -> cpu_debug_mem_slave_translator:uav_read + wire cpu_debug_mem_slave_agent_m0_readdatavalid; // cpu_debug_mem_slave_translator:uav_readdatavalid -> cpu_debug_mem_slave_agent:m0_readdatavalid + wire cpu_debug_mem_slave_agent_m0_lock; // cpu_debug_mem_slave_agent:m0_lock -> cpu_debug_mem_slave_translator:uav_lock + wire [31:0] cpu_debug_mem_slave_agent_m0_writedata; // cpu_debug_mem_slave_agent:m0_writedata -> cpu_debug_mem_slave_translator:uav_writedata + wire cpu_debug_mem_slave_agent_m0_write; // cpu_debug_mem_slave_agent:m0_write -> cpu_debug_mem_slave_translator:uav_write + wire [2:0] cpu_debug_mem_slave_agent_m0_burstcount; // cpu_debug_mem_slave_agent:m0_burstcount -> cpu_debug_mem_slave_translator:uav_burstcount + wire cpu_debug_mem_slave_agent_rf_source_valid; // cpu_debug_mem_slave_agent:rf_source_valid -> cpu_debug_mem_slave_agent_rsp_fifo:in_valid + wire [94:0] cpu_debug_mem_slave_agent_rf_source_data; // cpu_debug_mem_slave_agent:rf_source_data -> cpu_debug_mem_slave_agent_rsp_fifo:in_data + wire cpu_debug_mem_slave_agent_rf_source_ready; // cpu_debug_mem_slave_agent_rsp_fifo:in_ready -> cpu_debug_mem_slave_agent:rf_source_ready + wire cpu_debug_mem_slave_agent_rf_source_startofpacket; // cpu_debug_mem_slave_agent:rf_source_startofpacket -> cpu_debug_mem_slave_agent_rsp_fifo:in_startofpacket + wire cpu_debug_mem_slave_agent_rf_source_endofpacket; // cpu_debug_mem_slave_agent:rf_source_endofpacket -> cpu_debug_mem_slave_agent_rsp_fifo:in_endofpacket + wire cpu_debug_mem_slave_agent_rsp_fifo_out_valid; // cpu_debug_mem_slave_agent_rsp_fifo:out_valid -> cpu_debug_mem_slave_agent:rf_sink_valid + wire [94:0] cpu_debug_mem_slave_agent_rsp_fifo_out_data; // cpu_debug_mem_slave_agent_rsp_fifo:out_data -> cpu_debug_mem_slave_agent:rf_sink_data + wire cpu_debug_mem_slave_agent_rsp_fifo_out_ready; // cpu_debug_mem_slave_agent:rf_sink_ready -> cpu_debug_mem_slave_agent_rsp_fifo:out_ready + wire cpu_debug_mem_slave_agent_rsp_fifo_out_startofpacket; // cpu_debug_mem_slave_agent_rsp_fifo:out_startofpacket -> cpu_debug_mem_slave_agent:rf_sink_startofpacket + wire cpu_debug_mem_slave_agent_rsp_fifo_out_endofpacket; // cpu_debug_mem_slave_agent_rsp_fifo:out_endofpacket -> cpu_debug_mem_slave_agent:rf_sink_endofpacket + wire cmd_mux_002_src_valid; // cmd_mux_002:src_valid -> cpu_debug_mem_slave_agent:cp_valid + wire [93:0] cmd_mux_002_src_data; // cmd_mux_002:src_data -> cpu_debug_mem_slave_agent:cp_data + wire cmd_mux_002_src_ready; // cpu_debug_mem_slave_agent:cp_ready -> cmd_mux_002:src_ready + wire [6:0] cmd_mux_002_src_channel; // cmd_mux_002:src_channel -> cpu_debug_mem_slave_agent:cp_channel + wire cmd_mux_002_src_startofpacket; // cmd_mux_002:src_startofpacket -> cpu_debug_mem_slave_agent:cp_startofpacket + wire cmd_mux_002_src_endofpacket; // cmd_mux_002:src_endofpacket -> cpu_debug_mem_slave_agent:cp_endofpacket + wire [31:0] sem_ram_slave_agent_m0_readdata; // sem_ram_slave_translator:uav_readdata -> sem_ram_slave_agent:m0_readdata + wire sem_ram_slave_agent_m0_waitrequest; // sem_ram_slave_translator:uav_waitrequest -> sem_ram_slave_agent:m0_waitrequest + wire sem_ram_slave_agent_m0_debugaccess; // sem_ram_slave_agent:m0_debugaccess -> sem_ram_slave_translator:uav_debugaccess + wire [17:0] sem_ram_slave_agent_m0_address; // sem_ram_slave_agent:m0_address -> sem_ram_slave_translator:uav_address + wire [3:0] sem_ram_slave_agent_m0_byteenable; // sem_ram_slave_agent:m0_byteenable -> sem_ram_slave_translator:uav_byteenable + wire sem_ram_slave_agent_m0_read; // sem_ram_slave_agent:m0_read -> sem_ram_slave_translator:uav_read + wire sem_ram_slave_agent_m0_readdatavalid; // sem_ram_slave_translator:uav_readdatavalid -> sem_ram_slave_agent:m0_readdatavalid + wire sem_ram_slave_agent_m0_lock; // sem_ram_slave_agent:m0_lock -> sem_ram_slave_translator:uav_lock + wire [31:0] sem_ram_slave_agent_m0_writedata; // sem_ram_slave_agent:m0_writedata -> sem_ram_slave_translator:uav_writedata + wire sem_ram_slave_agent_m0_write; // sem_ram_slave_agent:m0_write -> sem_ram_slave_translator:uav_write + wire [2:0] sem_ram_slave_agent_m0_burstcount; // sem_ram_slave_agent:m0_burstcount -> sem_ram_slave_translator:uav_burstcount + wire sem_ram_slave_agent_rf_source_valid; // sem_ram_slave_agent:rf_source_valid -> sem_ram_slave_agent_rsp_fifo:in_valid + wire [94:0] sem_ram_slave_agent_rf_source_data; // sem_ram_slave_agent:rf_source_data -> sem_ram_slave_agent_rsp_fifo:in_data + wire sem_ram_slave_agent_rf_source_ready; // sem_ram_slave_agent_rsp_fifo:in_ready -> sem_ram_slave_agent:rf_source_ready + wire sem_ram_slave_agent_rf_source_startofpacket; // sem_ram_slave_agent:rf_source_startofpacket -> sem_ram_slave_agent_rsp_fifo:in_startofpacket + wire sem_ram_slave_agent_rf_source_endofpacket; // sem_ram_slave_agent:rf_source_endofpacket -> sem_ram_slave_agent_rsp_fifo:in_endofpacket + wire sem_ram_slave_agent_rsp_fifo_out_valid; // sem_ram_slave_agent_rsp_fifo:out_valid -> sem_ram_slave_agent:rf_sink_valid + wire [94:0] sem_ram_slave_agent_rsp_fifo_out_data; // sem_ram_slave_agent_rsp_fifo:out_data -> sem_ram_slave_agent:rf_sink_data + wire sem_ram_slave_agent_rsp_fifo_out_ready; // sem_ram_slave_agent:rf_sink_ready -> sem_ram_slave_agent_rsp_fifo:out_ready + wire sem_ram_slave_agent_rsp_fifo_out_startofpacket; // sem_ram_slave_agent_rsp_fifo:out_startofpacket -> sem_ram_slave_agent:rf_sink_startofpacket + wire sem_ram_slave_agent_rsp_fifo_out_endofpacket; // sem_ram_slave_agent_rsp_fifo:out_endofpacket -> sem_ram_slave_agent:rf_sink_endofpacket + wire cmd_mux_003_src_valid; // cmd_mux_003:src_valid -> sem_ram_slave_agent:cp_valid + wire [93:0] cmd_mux_003_src_data; // cmd_mux_003:src_data -> sem_ram_slave_agent:cp_data + wire cmd_mux_003_src_ready; // sem_ram_slave_agent:cp_ready -> cmd_mux_003:src_ready + wire [6:0] cmd_mux_003_src_channel; // cmd_mux_003:src_channel -> sem_ram_slave_agent:cp_channel + wire cmd_mux_003_src_startofpacket; // cmd_mux_003:src_startofpacket -> sem_ram_slave_agent:cp_startofpacket + wire cmd_mux_003_src_endofpacket; // cmd_mux_003:src_endofpacket -> sem_ram_slave_agent:cp_endofpacket + wire [31:0] sys_clk_timer_s1_agent_m0_readdata; // sys_clk_timer_s1_translator:uav_readdata -> sys_clk_timer_s1_agent:m0_readdata + wire sys_clk_timer_s1_agent_m0_waitrequest; // sys_clk_timer_s1_translator:uav_waitrequest -> sys_clk_timer_s1_agent:m0_waitrequest + wire sys_clk_timer_s1_agent_m0_debugaccess; // sys_clk_timer_s1_agent:m0_debugaccess -> sys_clk_timer_s1_translator:uav_debugaccess + wire [17:0] sys_clk_timer_s1_agent_m0_address; // sys_clk_timer_s1_agent:m0_address -> sys_clk_timer_s1_translator:uav_address + wire [3:0] sys_clk_timer_s1_agent_m0_byteenable; // sys_clk_timer_s1_agent:m0_byteenable -> sys_clk_timer_s1_translator:uav_byteenable + wire sys_clk_timer_s1_agent_m0_read; // sys_clk_timer_s1_agent:m0_read -> sys_clk_timer_s1_translator:uav_read + wire sys_clk_timer_s1_agent_m0_readdatavalid; // sys_clk_timer_s1_translator:uav_readdatavalid -> sys_clk_timer_s1_agent:m0_readdatavalid + wire sys_clk_timer_s1_agent_m0_lock; // sys_clk_timer_s1_agent:m0_lock -> sys_clk_timer_s1_translator:uav_lock + wire [31:0] sys_clk_timer_s1_agent_m0_writedata; // sys_clk_timer_s1_agent:m0_writedata -> sys_clk_timer_s1_translator:uav_writedata + wire sys_clk_timer_s1_agent_m0_write; // sys_clk_timer_s1_agent:m0_write -> sys_clk_timer_s1_translator:uav_write + wire [2:0] sys_clk_timer_s1_agent_m0_burstcount; // sys_clk_timer_s1_agent:m0_burstcount -> sys_clk_timer_s1_translator:uav_burstcount + wire sys_clk_timer_s1_agent_rf_source_valid; // sys_clk_timer_s1_agent:rf_source_valid -> sys_clk_timer_s1_agent_rsp_fifo:in_valid + wire [94:0] sys_clk_timer_s1_agent_rf_source_data; // sys_clk_timer_s1_agent:rf_source_data -> sys_clk_timer_s1_agent_rsp_fifo:in_data + wire sys_clk_timer_s1_agent_rf_source_ready; // sys_clk_timer_s1_agent_rsp_fifo:in_ready -> sys_clk_timer_s1_agent:rf_source_ready + wire sys_clk_timer_s1_agent_rf_source_startofpacket; // sys_clk_timer_s1_agent:rf_source_startofpacket -> sys_clk_timer_s1_agent_rsp_fifo:in_startofpacket + wire sys_clk_timer_s1_agent_rf_source_endofpacket; // sys_clk_timer_s1_agent:rf_source_endofpacket -> sys_clk_timer_s1_agent_rsp_fifo:in_endofpacket + wire sys_clk_timer_s1_agent_rsp_fifo_out_valid; // sys_clk_timer_s1_agent_rsp_fifo:out_valid -> sys_clk_timer_s1_agent:rf_sink_valid + wire [94:0] sys_clk_timer_s1_agent_rsp_fifo_out_data; // sys_clk_timer_s1_agent_rsp_fifo:out_data -> sys_clk_timer_s1_agent:rf_sink_data + wire sys_clk_timer_s1_agent_rsp_fifo_out_ready; // sys_clk_timer_s1_agent:rf_sink_ready -> sys_clk_timer_s1_agent_rsp_fifo:out_ready + wire sys_clk_timer_s1_agent_rsp_fifo_out_startofpacket; // sys_clk_timer_s1_agent_rsp_fifo:out_startofpacket -> sys_clk_timer_s1_agent:rf_sink_startofpacket + wire sys_clk_timer_s1_agent_rsp_fifo_out_endofpacket; // sys_clk_timer_s1_agent_rsp_fifo:out_endofpacket -> sys_clk_timer_s1_agent:rf_sink_endofpacket + wire cmd_mux_004_src_valid; // cmd_mux_004:src_valid -> sys_clk_timer_s1_agent:cp_valid + wire [93:0] cmd_mux_004_src_data; // cmd_mux_004:src_data -> sys_clk_timer_s1_agent:cp_data + wire cmd_mux_004_src_ready; // sys_clk_timer_s1_agent:cp_ready -> cmd_mux_004:src_ready + wire [6:0] cmd_mux_004_src_channel; // cmd_mux_004:src_channel -> sys_clk_timer_s1_agent:cp_channel + wire cmd_mux_004_src_startofpacket; // cmd_mux_004:src_startofpacket -> sys_clk_timer_s1_agent:cp_startofpacket + wire cmd_mux_004_src_endofpacket; // cmd_mux_004:src_endofpacket -> sys_clk_timer_s1_agent:cp_endofpacket + wire [31:0] mem_s2_agent_m0_readdata; // mem_s2_translator:uav_readdata -> mem_s2_agent:m0_readdata + wire mem_s2_agent_m0_waitrequest; // mem_s2_translator:uav_waitrequest -> mem_s2_agent:m0_waitrequest + wire mem_s2_agent_m0_debugaccess; // mem_s2_agent:m0_debugaccess -> mem_s2_translator:uav_debugaccess + wire [17:0] mem_s2_agent_m0_address; // mem_s2_agent:m0_address -> mem_s2_translator:uav_address + wire [3:0] mem_s2_agent_m0_byteenable; // mem_s2_agent:m0_byteenable -> mem_s2_translator:uav_byteenable + wire mem_s2_agent_m0_read; // mem_s2_agent:m0_read -> mem_s2_translator:uav_read + wire mem_s2_agent_m0_readdatavalid; // mem_s2_translator:uav_readdatavalid -> mem_s2_agent:m0_readdatavalid + wire mem_s2_agent_m0_lock; // mem_s2_agent:m0_lock -> mem_s2_translator:uav_lock + wire [31:0] mem_s2_agent_m0_writedata; // mem_s2_agent:m0_writedata -> mem_s2_translator:uav_writedata + wire mem_s2_agent_m0_write; // mem_s2_agent:m0_write -> mem_s2_translator:uav_write + wire [2:0] mem_s2_agent_m0_burstcount; // mem_s2_agent:m0_burstcount -> mem_s2_translator:uav_burstcount + wire mem_s2_agent_rf_source_valid; // mem_s2_agent:rf_source_valid -> mem_s2_agent_rsp_fifo:in_valid + wire [94:0] mem_s2_agent_rf_source_data; // mem_s2_agent:rf_source_data -> mem_s2_agent_rsp_fifo:in_data + wire mem_s2_agent_rf_source_ready; // mem_s2_agent_rsp_fifo:in_ready -> mem_s2_agent:rf_source_ready + wire mem_s2_agent_rf_source_startofpacket; // mem_s2_agent:rf_source_startofpacket -> mem_s2_agent_rsp_fifo:in_startofpacket + wire mem_s2_agent_rf_source_endofpacket; // mem_s2_agent:rf_source_endofpacket -> mem_s2_agent_rsp_fifo:in_endofpacket + wire mem_s2_agent_rsp_fifo_out_valid; // mem_s2_agent_rsp_fifo:out_valid -> mem_s2_agent:rf_sink_valid + wire [94:0] mem_s2_agent_rsp_fifo_out_data; // mem_s2_agent_rsp_fifo:out_data -> mem_s2_agent:rf_sink_data + wire mem_s2_agent_rsp_fifo_out_ready; // mem_s2_agent:rf_sink_ready -> mem_s2_agent_rsp_fifo:out_ready + wire mem_s2_agent_rsp_fifo_out_startofpacket; // mem_s2_agent_rsp_fifo:out_startofpacket -> mem_s2_agent:rf_sink_startofpacket + wire mem_s2_agent_rsp_fifo_out_endofpacket; // mem_s2_agent_rsp_fifo:out_endofpacket -> mem_s2_agent:rf_sink_endofpacket + wire cmd_mux_005_src_valid; // cmd_mux_005:src_valid -> mem_s2_agent:cp_valid + wire [93:0] cmd_mux_005_src_data; // cmd_mux_005:src_data -> mem_s2_agent:cp_data + wire cmd_mux_005_src_ready; // mem_s2_agent:cp_ready -> cmd_mux_005:src_ready + wire [6:0] cmd_mux_005_src_channel; // cmd_mux_005:src_channel -> mem_s2_agent:cp_channel + wire cmd_mux_005_src_startofpacket; // cmd_mux_005:src_startofpacket -> mem_s2_agent:cp_startofpacket + wire cmd_mux_005_src_endofpacket; // cmd_mux_005:src_endofpacket -> mem_s2_agent:cp_endofpacket + wire [31:0] mem_s1_agent_m0_readdata; // mem_s1_translator:uav_readdata -> mem_s1_agent:m0_readdata + wire mem_s1_agent_m0_waitrequest; // mem_s1_translator:uav_waitrequest -> mem_s1_agent:m0_waitrequest + wire mem_s1_agent_m0_debugaccess; // mem_s1_agent:m0_debugaccess -> mem_s1_translator:uav_debugaccess + wire [17:0] mem_s1_agent_m0_address; // mem_s1_agent:m0_address -> mem_s1_translator:uav_address + wire [3:0] mem_s1_agent_m0_byteenable; // mem_s1_agent:m0_byteenable -> mem_s1_translator:uav_byteenable + wire mem_s1_agent_m0_read; // mem_s1_agent:m0_read -> mem_s1_translator:uav_read + wire mem_s1_agent_m0_readdatavalid; // mem_s1_translator:uav_readdatavalid -> mem_s1_agent:m0_readdatavalid + wire mem_s1_agent_m0_lock; // mem_s1_agent:m0_lock -> mem_s1_translator:uav_lock + wire [31:0] mem_s1_agent_m0_writedata; // mem_s1_agent:m0_writedata -> mem_s1_translator:uav_writedata + wire mem_s1_agent_m0_write; // mem_s1_agent:m0_write -> mem_s1_translator:uav_write + wire [2:0] mem_s1_agent_m0_burstcount; // mem_s1_agent:m0_burstcount -> mem_s1_translator:uav_burstcount + wire mem_s1_agent_rf_source_valid; // mem_s1_agent:rf_source_valid -> mem_s1_agent_rsp_fifo:in_valid + wire [94:0] mem_s1_agent_rf_source_data; // mem_s1_agent:rf_source_data -> mem_s1_agent_rsp_fifo:in_data + wire mem_s1_agent_rf_source_ready; // mem_s1_agent_rsp_fifo:in_ready -> mem_s1_agent:rf_source_ready + wire mem_s1_agent_rf_source_startofpacket; // mem_s1_agent:rf_source_startofpacket -> mem_s1_agent_rsp_fifo:in_startofpacket + wire mem_s1_agent_rf_source_endofpacket; // mem_s1_agent:rf_source_endofpacket -> mem_s1_agent_rsp_fifo:in_endofpacket + wire mem_s1_agent_rsp_fifo_out_valid; // mem_s1_agent_rsp_fifo:out_valid -> mem_s1_agent:rf_sink_valid + wire [94:0] mem_s1_agent_rsp_fifo_out_data; // mem_s1_agent_rsp_fifo:out_data -> mem_s1_agent:rf_sink_data + wire mem_s1_agent_rsp_fifo_out_ready; // mem_s1_agent:rf_sink_ready -> mem_s1_agent_rsp_fifo:out_ready + wire mem_s1_agent_rsp_fifo_out_startofpacket; // mem_s1_agent_rsp_fifo:out_startofpacket -> mem_s1_agent:rf_sink_startofpacket + wire mem_s1_agent_rsp_fifo_out_endofpacket; // mem_s1_agent_rsp_fifo:out_endofpacket -> mem_s1_agent:rf_sink_endofpacket + wire cmd_mux_006_src_valid; // cmd_mux_006:src_valid -> mem_s1_agent:cp_valid + wire [93:0] cmd_mux_006_src_data; // cmd_mux_006:src_data -> mem_s1_agent:cp_data + wire cmd_mux_006_src_ready; // mem_s1_agent:cp_ready -> cmd_mux_006:src_ready + wire [6:0] cmd_mux_006_src_channel; // cmd_mux_006:src_channel -> mem_s1_agent:cp_channel + wire cmd_mux_006_src_startofpacket; // cmd_mux_006:src_startofpacket -> mem_s1_agent:cp_startofpacket + wire cmd_mux_006_src_endofpacket; // cmd_mux_006:src_endofpacket -> mem_s1_agent:cp_endofpacket + wire cpu_data_master_agent_cp_valid; // cpu_data_master_agent:cp_valid -> router:sink_valid + wire [93:0] cpu_data_master_agent_cp_data; // cpu_data_master_agent:cp_data -> router:sink_data + wire cpu_data_master_agent_cp_ready; // router:sink_ready -> cpu_data_master_agent:cp_ready + wire cpu_data_master_agent_cp_startofpacket; // cpu_data_master_agent:cp_startofpacket -> router:sink_startofpacket + wire cpu_data_master_agent_cp_endofpacket; // cpu_data_master_agent:cp_endofpacket -> router:sink_endofpacket + wire router_src_valid; // router:src_valid -> cmd_demux:sink_valid + wire [93:0] router_src_data; // router:src_data -> cmd_demux:sink_data + wire router_src_ready; // cmd_demux:sink_ready -> router:src_ready + wire [6:0] router_src_channel; // router:src_channel -> cmd_demux:sink_channel + wire router_src_startofpacket; // router:src_startofpacket -> cmd_demux:sink_startofpacket + wire router_src_endofpacket; // router:src_endofpacket -> cmd_demux:sink_endofpacket + wire cpu_instruction_master_agent_cp_valid; // cpu_instruction_master_agent:cp_valid -> router_001:sink_valid + wire [93:0] cpu_instruction_master_agent_cp_data; // cpu_instruction_master_agent:cp_data -> router_001:sink_data + wire cpu_instruction_master_agent_cp_ready; // router_001:sink_ready -> cpu_instruction_master_agent:cp_ready + wire cpu_instruction_master_agent_cp_startofpacket; // cpu_instruction_master_agent:cp_startofpacket -> router_001:sink_startofpacket + wire cpu_instruction_master_agent_cp_endofpacket; // cpu_instruction_master_agent:cp_endofpacket -> router_001:sink_endofpacket + wire router_001_src_valid; // router_001:src_valid -> cmd_demux_001:sink_valid + wire [93:0] router_001_src_data; // router_001:src_data -> cmd_demux_001:sink_data + wire router_001_src_ready; // cmd_demux_001:sink_ready -> router_001:src_ready + wire [6:0] router_001_src_channel; // router_001:src_channel -> cmd_demux_001:sink_channel + wire router_001_src_startofpacket; // router_001:src_startofpacket -> cmd_demux_001:sink_startofpacket + wire router_001_src_endofpacket; // router_001:src_endofpacket -> cmd_demux_001:sink_endofpacket + wire jtag_uart_avalon_jtag_slave_agent_rp_valid; // jtag_uart_avalon_jtag_slave_agent:rp_valid -> router_002:sink_valid + wire [93:0] jtag_uart_avalon_jtag_slave_agent_rp_data; // jtag_uart_avalon_jtag_slave_agent:rp_data -> router_002:sink_data + wire jtag_uart_avalon_jtag_slave_agent_rp_ready; // router_002:sink_ready -> jtag_uart_avalon_jtag_slave_agent:rp_ready + wire jtag_uart_avalon_jtag_slave_agent_rp_startofpacket; // jtag_uart_avalon_jtag_slave_agent:rp_startofpacket -> router_002:sink_startofpacket + wire jtag_uart_avalon_jtag_slave_agent_rp_endofpacket; // jtag_uart_avalon_jtag_slave_agent:rp_endofpacket -> router_002:sink_endofpacket + wire router_002_src_valid; // router_002:src_valid -> rsp_demux:sink_valid + wire [93:0] router_002_src_data; // router_002:src_data -> rsp_demux:sink_data + wire router_002_src_ready; // rsp_demux:sink_ready -> router_002:src_ready + wire [6:0] router_002_src_channel; // router_002:src_channel -> rsp_demux:sink_channel + wire router_002_src_startofpacket; // router_002:src_startofpacket -> rsp_demux:sink_startofpacket + wire router_002_src_endofpacket; // router_002:src_endofpacket -> rsp_demux:sink_endofpacket + wire sem_ctl_slave_agent_rp_valid; // sem_ctl_slave_agent:rp_valid -> router_003:sink_valid + wire [93:0] sem_ctl_slave_agent_rp_data; // sem_ctl_slave_agent:rp_data -> router_003:sink_data + wire sem_ctl_slave_agent_rp_ready; // router_003:sink_ready -> sem_ctl_slave_agent:rp_ready + wire sem_ctl_slave_agent_rp_startofpacket; // sem_ctl_slave_agent:rp_startofpacket -> router_003:sink_startofpacket + wire sem_ctl_slave_agent_rp_endofpacket; // sem_ctl_slave_agent:rp_endofpacket -> router_003:sink_endofpacket + wire router_003_src_valid; // router_003:src_valid -> rsp_demux_001:sink_valid + wire [93:0] router_003_src_data; // router_003:src_data -> rsp_demux_001:sink_data + wire router_003_src_ready; // rsp_demux_001:sink_ready -> router_003:src_ready + wire [6:0] router_003_src_channel; // router_003:src_channel -> rsp_demux_001:sink_channel + wire router_003_src_startofpacket; // router_003:src_startofpacket -> rsp_demux_001:sink_startofpacket + wire router_003_src_endofpacket; // router_003:src_endofpacket -> rsp_demux_001:sink_endofpacket + wire cpu_debug_mem_slave_agent_rp_valid; // cpu_debug_mem_slave_agent:rp_valid -> router_004:sink_valid + wire [93:0] cpu_debug_mem_slave_agent_rp_data; // cpu_debug_mem_slave_agent:rp_data -> router_004:sink_data + wire cpu_debug_mem_slave_agent_rp_ready; // router_004:sink_ready -> cpu_debug_mem_slave_agent:rp_ready + wire cpu_debug_mem_slave_agent_rp_startofpacket; // cpu_debug_mem_slave_agent:rp_startofpacket -> router_004:sink_startofpacket + wire cpu_debug_mem_slave_agent_rp_endofpacket; // cpu_debug_mem_slave_agent:rp_endofpacket -> router_004:sink_endofpacket + wire router_004_src_valid; // router_004:src_valid -> rsp_demux_002:sink_valid + wire [93:0] router_004_src_data; // router_004:src_data -> rsp_demux_002:sink_data + wire router_004_src_ready; // rsp_demux_002:sink_ready -> router_004:src_ready + wire [6:0] router_004_src_channel; // router_004:src_channel -> rsp_demux_002:sink_channel + wire router_004_src_startofpacket; // router_004:src_startofpacket -> rsp_demux_002:sink_startofpacket + wire router_004_src_endofpacket; // router_004:src_endofpacket -> rsp_demux_002:sink_endofpacket + wire sem_ram_slave_agent_rp_valid; // sem_ram_slave_agent:rp_valid -> router_005:sink_valid + wire [93:0] sem_ram_slave_agent_rp_data; // sem_ram_slave_agent:rp_data -> router_005:sink_data + wire sem_ram_slave_agent_rp_ready; // router_005:sink_ready -> sem_ram_slave_agent:rp_ready + wire sem_ram_slave_agent_rp_startofpacket; // sem_ram_slave_agent:rp_startofpacket -> router_005:sink_startofpacket + wire sem_ram_slave_agent_rp_endofpacket; // sem_ram_slave_agent:rp_endofpacket -> router_005:sink_endofpacket + wire router_005_src_valid; // router_005:src_valid -> rsp_demux_003:sink_valid + wire [93:0] router_005_src_data; // router_005:src_data -> rsp_demux_003:sink_data + wire router_005_src_ready; // rsp_demux_003:sink_ready -> router_005:src_ready + wire [6:0] router_005_src_channel; // router_005:src_channel -> rsp_demux_003:sink_channel + wire router_005_src_startofpacket; // router_005:src_startofpacket -> rsp_demux_003:sink_startofpacket + wire router_005_src_endofpacket; // router_005:src_endofpacket -> rsp_demux_003:sink_endofpacket + wire sys_clk_timer_s1_agent_rp_valid; // sys_clk_timer_s1_agent:rp_valid -> router_006:sink_valid + wire [93:0] sys_clk_timer_s1_agent_rp_data; // sys_clk_timer_s1_agent:rp_data -> router_006:sink_data + wire sys_clk_timer_s1_agent_rp_ready; // router_006:sink_ready -> sys_clk_timer_s1_agent:rp_ready + wire sys_clk_timer_s1_agent_rp_startofpacket; // sys_clk_timer_s1_agent:rp_startofpacket -> router_006:sink_startofpacket + wire sys_clk_timer_s1_agent_rp_endofpacket; // sys_clk_timer_s1_agent:rp_endofpacket -> router_006:sink_endofpacket + wire router_006_src_valid; // router_006:src_valid -> rsp_demux_004:sink_valid + wire [93:0] router_006_src_data; // router_006:src_data -> rsp_demux_004:sink_data + wire router_006_src_ready; // rsp_demux_004:sink_ready -> router_006:src_ready + wire [6:0] router_006_src_channel; // router_006:src_channel -> rsp_demux_004:sink_channel + wire router_006_src_startofpacket; // router_006:src_startofpacket -> rsp_demux_004:sink_startofpacket + wire router_006_src_endofpacket; // router_006:src_endofpacket -> rsp_demux_004:sink_endofpacket + wire mem_s2_agent_rp_valid; // mem_s2_agent:rp_valid -> router_007:sink_valid + wire [93:0] mem_s2_agent_rp_data; // mem_s2_agent:rp_data -> router_007:sink_data + wire mem_s2_agent_rp_ready; // router_007:sink_ready -> mem_s2_agent:rp_ready + wire mem_s2_agent_rp_startofpacket; // mem_s2_agent:rp_startofpacket -> router_007:sink_startofpacket + wire mem_s2_agent_rp_endofpacket; // mem_s2_agent:rp_endofpacket -> router_007:sink_endofpacket + wire router_007_src_valid; // router_007:src_valid -> rsp_demux_005:sink_valid + wire [93:0] router_007_src_data; // router_007:src_data -> rsp_demux_005:sink_data + wire router_007_src_ready; // rsp_demux_005:sink_ready -> router_007:src_ready + wire [6:0] router_007_src_channel; // router_007:src_channel -> rsp_demux_005:sink_channel + wire router_007_src_startofpacket; // router_007:src_startofpacket -> rsp_demux_005:sink_startofpacket + wire router_007_src_endofpacket; // router_007:src_endofpacket -> rsp_demux_005:sink_endofpacket + wire mem_s1_agent_rp_valid; // mem_s1_agent:rp_valid -> router_008:sink_valid + wire [93:0] mem_s1_agent_rp_data; // mem_s1_agent:rp_data -> router_008:sink_data + wire mem_s1_agent_rp_ready; // router_008:sink_ready -> mem_s1_agent:rp_ready + wire mem_s1_agent_rp_startofpacket; // mem_s1_agent:rp_startofpacket -> router_008:sink_startofpacket + wire mem_s1_agent_rp_endofpacket; // mem_s1_agent:rp_endofpacket -> router_008:sink_endofpacket + wire router_008_src_valid; // router_008:src_valid -> rsp_demux_006:sink_valid + wire [93:0] router_008_src_data; // router_008:src_data -> rsp_demux_006:sink_data + wire router_008_src_ready; // rsp_demux_006:sink_ready -> router_008:src_ready + wire [6:0] router_008_src_channel; // router_008:src_channel -> rsp_demux_006:sink_channel + wire router_008_src_startofpacket; // router_008:src_startofpacket -> rsp_demux_006:sink_startofpacket + wire router_008_src_endofpacket; // router_008:src_endofpacket -> rsp_demux_006:sink_endofpacket + wire cmd_demux_src0_valid; // cmd_demux:src0_valid -> cmd_mux:sink0_valid + wire [93:0] cmd_demux_src0_data; // cmd_demux:src0_data -> cmd_mux:sink0_data + wire cmd_demux_src0_ready; // cmd_mux:sink0_ready -> cmd_demux:src0_ready + wire [6:0] cmd_demux_src0_channel; // cmd_demux:src0_channel -> cmd_mux:sink0_channel + wire cmd_demux_src0_startofpacket; // cmd_demux:src0_startofpacket -> cmd_mux:sink0_startofpacket + wire cmd_demux_src0_endofpacket; // cmd_demux:src0_endofpacket -> cmd_mux:sink0_endofpacket + wire cmd_demux_src1_valid; // cmd_demux:src1_valid -> cmd_mux_001:sink0_valid + wire [93:0] cmd_demux_src1_data; // cmd_demux:src1_data -> cmd_mux_001:sink0_data + wire cmd_demux_src1_ready; // cmd_mux_001:sink0_ready -> cmd_demux:src1_ready + wire [6:0] cmd_demux_src1_channel; // cmd_demux:src1_channel -> cmd_mux_001:sink0_channel + wire cmd_demux_src1_startofpacket; // cmd_demux:src1_startofpacket -> cmd_mux_001:sink0_startofpacket + wire cmd_demux_src1_endofpacket; // cmd_demux:src1_endofpacket -> cmd_mux_001:sink0_endofpacket + wire cmd_demux_src2_valid; // cmd_demux:src2_valid -> cmd_mux_002:sink0_valid + wire [93:0] cmd_demux_src2_data; // cmd_demux:src2_data -> cmd_mux_002:sink0_data + wire cmd_demux_src2_ready; // cmd_mux_002:sink0_ready -> cmd_demux:src2_ready + wire [6:0] cmd_demux_src2_channel; // cmd_demux:src2_channel -> cmd_mux_002:sink0_channel + wire cmd_demux_src2_startofpacket; // cmd_demux:src2_startofpacket -> cmd_mux_002:sink0_startofpacket + wire cmd_demux_src2_endofpacket; // cmd_demux:src2_endofpacket -> cmd_mux_002:sink0_endofpacket + wire cmd_demux_src3_valid; // cmd_demux:src3_valid -> cmd_mux_003:sink0_valid + wire [93:0] cmd_demux_src3_data; // cmd_demux:src3_data -> cmd_mux_003:sink0_data + wire cmd_demux_src3_ready; // cmd_mux_003:sink0_ready -> cmd_demux:src3_ready + wire [6:0] cmd_demux_src3_channel; // cmd_demux:src3_channel -> cmd_mux_003:sink0_channel + wire cmd_demux_src3_startofpacket; // cmd_demux:src3_startofpacket -> cmd_mux_003:sink0_startofpacket + wire cmd_demux_src3_endofpacket; // cmd_demux:src3_endofpacket -> cmd_mux_003:sink0_endofpacket + wire cmd_demux_src4_valid; // cmd_demux:src4_valid -> cmd_mux_004:sink0_valid + wire [93:0] cmd_demux_src4_data; // cmd_demux:src4_data -> cmd_mux_004:sink0_data + wire cmd_demux_src4_ready; // cmd_mux_004:sink0_ready -> cmd_demux:src4_ready + wire [6:0] cmd_demux_src4_channel; // cmd_demux:src4_channel -> cmd_mux_004:sink0_channel + wire cmd_demux_src4_startofpacket; // cmd_demux:src4_startofpacket -> cmd_mux_004:sink0_startofpacket + wire cmd_demux_src4_endofpacket; // cmd_demux:src4_endofpacket -> cmd_mux_004:sink0_endofpacket + wire cmd_demux_src5_valid; // cmd_demux:src5_valid -> cmd_mux_005:sink0_valid + wire [93:0] cmd_demux_src5_data; // cmd_demux:src5_data -> cmd_mux_005:sink0_data + wire cmd_demux_src5_ready; // cmd_mux_005:sink0_ready -> cmd_demux:src5_ready + wire [6:0] cmd_demux_src5_channel; // cmd_demux:src5_channel -> cmd_mux_005:sink0_channel + wire cmd_demux_src5_startofpacket; // cmd_demux:src5_startofpacket -> cmd_mux_005:sink0_startofpacket + wire cmd_demux_src5_endofpacket; // cmd_demux:src5_endofpacket -> cmd_mux_005:sink0_endofpacket + wire cmd_demux_001_src0_valid; // cmd_demux_001:src0_valid -> cmd_mux_002:sink1_valid + wire [93:0] cmd_demux_001_src0_data; // cmd_demux_001:src0_data -> cmd_mux_002:sink1_data + wire cmd_demux_001_src0_ready; // cmd_mux_002:sink1_ready -> cmd_demux_001:src0_ready + wire [6:0] cmd_demux_001_src0_channel; // cmd_demux_001:src0_channel -> cmd_mux_002:sink1_channel + wire cmd_demux_001_src0_startofpacket; // cmd_demux_001:src0_startofpacket -> cmd_mux_002:sink1_startofpacket + wire cmd_demux_001_src0_endofpacket; // cmd_demux_001:src0_endofpacket -> cmd_mux_002:sink1_endofpacket + wire cmd_demux_001_src1_valid; // cmd_demux_001:src1_valid -> cmd_mux_006:sink0_valid + wire [93:0] cmd_demux_001_src1_data; // cmd_demux_001:src1_data -> cmd_mux_006:sink0_data + wire cmd_demux_001_src1_ready; // cmd_mux_006:sink0_ready -> cmd_demux_001:src1_ready + wire [6:0] cmd_demux_001_src1_channel; // cmd_demux_001:src1_channel -> cmd_mux_006:sink0_channel + wire cmd_demux_001_src1_startofpacket; // cmd_demux_001:src1_startofpacket -> cmd_mux_006:sink0_startofpacket + wire cmd_demux_001_src1_endofpacket; // cmd_demux_001:src1_endofpacket -> cmd_mux_006:sink0_endofpacket + wire rsp_demux_src0_valid; // rsp_demux:src0_valid -> rsp_mux:sink0_valid + wire [93:0] rsp_demux_src0_data; // rsp_demux:src0_data -> rsp_mux:sink0_data + wire rsp_demux_src0_ready; // rsp_mux:sink0_ready -> rsp_demux:src0_ready + wire [6:0] rsp_demux_src0_channel; // rsp_demux:src0_channel -> rsp_mux:sink0_channel + wire rsp_demux_src0_startofpacket; // rsp_demux:src0_startofpacket -> rsp_mux:sink0_startofpacket + wire rsp_demux_src0_endofpacket; // rsp_demux:src0_endofpacket -> rsp_mux:sink0_endofpacket + wire rsp_demux_001_src0_valid; // rsp_demux_001:src0_valid -> rsp_mux:sink1_valid + wire [93:0] rsp_demux_001_src0_data; // rsp_demux_001:src0_data -> rsp_mux:sink1_data + wire rsp_demux_001_src0_ready; // rsp_mux:sink1_ready -> rsp_demux_001:src0_ready + wire [6:0] rsp_demux_001_src0_channel; // rsp_demux_001:src0_channel -> rsp_mux:sink1_channel + wire rsp_demux_001_src0_startofpacket; // rsp_demux_001:src0_startofpacket -> rsp_mux:sink1_startofpacket + wire rsp_demux_001_src0_endofpacket; // rsp_demux_001:src0_endofpacket -> rsp_mux:sink1_endofpacket + wire rsp_demux_002_src0_valid; // rsp_demux_002:src0_valid -> rsp_mux:sink2_valid + wire [93:0] rsp_demux_002_src0_data; // rsp_demux_002:src0_data -> rsp_mux:sink2_data + wire rsp_demux_002_src0_ready; // rsp_mux:sink2_ready -> rsp_demux_002:src0_ready + wire [6:0] rsp_demux_002_src0_channel; // rsp_demux_002:src0_channel -> rsp_mux:sink2_channel + wire rsp_demux_002_src0_startofpacket; // rsp_demux_002:src0_startofpacket -> rsp_mux:sink2_startofpacket + wire rsp_demux_002_src0_endofpacket; // rsp_demux_002:src0_endofpacket -> rsp_mux:sink2_endofpacket + wire rsp_demux_002_src1_valid; // rsp_demux_002:src1_valid -> rsp_mux_001:sink0_valid + wire [93:0] rsp_demux_002_src1_data; // rsp_demux_002:src1_data -> rsp_mux_001:sink0_data + wire rsp_demux_002_src1_ready; // rsp_mux_001:sink0_ready -> rsp_demux_002:src1_ready + wire [6:0] rsp_demux_002_src1_channel; // rsp_demux_002:src1_channel -> rsp_mux_001:sink0_channel + wire rsp_demux_002_src1_startofpacket; // rsp_demux_002:src1_startofpacket -> rsp_mux_001:sink0_startofpacket + wire rsp_demux_002_src1_endofpacket; // rsp_demux_002:src1_endofpacket -> rsp_mux_001:sink0_endofpacket + wire rsp_demux_003_src0_valid; // rsp_demux_003:src0_valid -> rsp_mux:sink3_valid + wire [93:0] rsp_demux_003_src0_data; // rsp_demux_003:src0_data -> rsp_mux:sink3_data + wire rsp_demux_003_src0_ready; // rsp_mux:sink3_ready -> rsp_demux_003:src0_ready + wire [6:0] rsp_demux_003_src0_channel; // rsp_demux_003:src0_channel -> rsp_mux:sink3_channel + wire rsp_demux_003_src0_startofpacket; // rsp_demux_003:src0_startofpacket -> rsp_mux:sink3_startofpacket + wire rsp_demux_003_src0_endofpacket; // rsp_demux_003:src0_endofpacket -> rsp_mux:sink3_endofpacket + wire rsp_demux_004_src0_valid; // rsp_demux_004:src0_valid -> rsp_mux:sink4_valid + wire [93:0] rsp_demux_004_src0_data; // rsp_demux_004:src0_data -> rsp_mux:sink4_data + wire rsp_demux_004_src0_ready; // rsp_mux:sink4_ready -> rsp_demux_004:src0_ready + wire [6:0] rsp_demux_004_src0_channel; // rsp_demux_004:src0_channel -> rsp_mux:sink4_channel + wire rsp_demux_004_src0_startofpacket; // rsp_demux_004:src0_startofpacket -> rsp_mux:sink4_startofpacket + wire rsp_demux_004_src0_endofpacket; // rsp_demux_004:src0_endofpacket -> rsp_mux:sink4_endofpacket + wire rsp_demux_005_src0_valid; // rsp_demux_005:src0_valid -> rsp_mux:sink5_valid + wire [93:0] rsp_demux_005_src0_data; // rsp_demux_005:src0_data -> rsp_mux:sink5_data + wire rsp_demux_005_src0_ready; // rsp_mux:sink5_ready -> rsp_demux_005:src0_ready + wire [6:0] rsp_demux_005_src0_channel; // rsp_demux_005:src0_channel -> rsp_mux:sink5_channel + wire rsp_demux_005_src0_startofpacket; // rsp_demux_005:src0_startofpacket -> rsp_mux:sink5_startofpacket + wire rsp_demux_005_src0_endofpacket; // rsp_demux_005:src0_endofpacket -> rsp_mux:sink5_endofpacket + wire rsp_demux_006_src0_valid; // rsp_demux_006:src0_valid -> rsp_mux_001:sink1_valid + wire [93:0] rsp_demux_006_src0_data; // rsp_demux_006:src0_data -> rsp_mux_001:sink1_data + wire rsp_demux_006_src0_ready; // rsp_mux_001:sink1_ready -> rsp_demux_006:src0_ready + wire [6:0] rsp_demux_006_src0_channel; // rsp_demux_006:src0_channel -> rsp_mux_001:sink1_channel + wire rsp_demux_006_src0_startofpacket; // rsp_demux_006:src0_startofpacket -> rsp_mux_001:sink1_startofpacket + wire rsp_demux_006_src0_endofpacket; // rsp_demux_006:src0_endofpacket -> rsp_mux_001:sink1_endofpacket + wire jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid; // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_valid -> avalon_st_adapter:in_0_valid + wire [33:0] jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data; // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_data -> avalon_st_adapter:in_0_data + wire jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready; // avalon_st_adapter:in_0_ready -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_ready + wire avalon_st_adapter_out_0_valid; // avalon_st_adapter:out_0_valid -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_valid + wire [33:0] avalon_st_adapter_out_0_data; // avalon_st_adapter:out_0_data -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_data + wire avalon_st_adapter_out_0_ready; // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_ready -> avalon_st_adapter:out_0_ready + wire [0:0] avalon_st_adapter_out_0_error; // avalon_st_adapter:out_0_error -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_error + wire sem_ctl_slave_agent_rdata_fifo_src_valid; // sem_ctl_slave_agent:rdata_fifo_src_valid -> avalon_st_adapter_001:in_0_valid + wire [33:0] sem_ctl_slave_agent_rdata_fifo_src_data; // sem_ctl_slave_agent:rdata_fifo_src_data -> avalon_st_adapter_001:in_0_data + wire sem_ctl_slave_agent_rdata_fifo_src_ready; // avalon_st_adapter_001:in_0_ready -> sem_ctl_slave_agent:rdata_fifo_src_ready + wire avalon_st_adapter_001_out_0_valid; // avalon_st_adapter_001:out_0_valid -> sem_ctl_slave_agent:rdata_fifo_sink_valid + wire [33:0] avalon_st_adapter_001_out_0_data; // avalon_st_adapter_001:out_0_data -> sem_ctl_slave_agent:rdata_fifo_sink_data + wire avalon_st_adapter_001_out_0_ready; // sem_ctl_slave_agent:rdata_fifo_sink_ready -> avalon_st_adapter_001:out_0_ready + wire [0:0] avalon_st_adapter_001_out_0_error; // avalon_st_adapter_001:out_0_error -> sem_ctl_slave_agent:rdata_fifo_sink_error + wire cpu_debug_mem_slave_agent_rdata_fifo_src_valid; // cpu_debug_mem_slave_agent:rdata_fifo_src_valid -> avalon_st_adapter_002:in_0_valid + wire [33:0] cpu_debug_mem_slave_agent_rdata_fifo_src_data; // cpu_debug_mem_slave_agent:rdata_fifo_src_data -> avalon_st_adapter_002:in_0_data + wire cpu_debug_mem_slave_agent_rdata_fifo_src_ready; // avalon_st_adapter_002:in_0_ready -> cpu_debug_mem_slave_agent:rdata_fifo_src_ready + wire avalon_st_adapter_002_out_0_valid; // avalon_st_adapter_002:out_0_valid -> cpu_debug_mem_slave_agent:rdata_fifo_sink_valid + wire [33:0] avalon_st_adapter_002_out_0_data; // avalon_st_adapter_002:out_0_data -> cpu_debug_mem_slave_agent:rdata_fifo_sink_data + wire avalon_st_adapter_002_out_0_ready; // cpu_debug_mem_slave_agent:rdata_fifo_sink_ready -> avalon_st_adapter_002:out_0_ready + wire [0:0] avalon_st_adapter_002_out_0_error; // avalon_st_adapter_002:out_0_error -> cpu_debug_mem_slave_agent:rdata_fifo_sink_error + wire sem_ram_slave_agent_rdata_fifo_src_valid; // sem_ram_slave_agent:rdata_fifo_src_valid -> avalon_st_adapter_003:in_0_valid + wire [33:0] sem_ram_slave_agent_rdata_fifo_src_data; // sem_ram_slave_agent:rdata_fifo_src_data -> avalon_st_adapter_003:in_0_data + wire sem_ram_slave_agent_rdata_fifo_src_ready; // avalon_st_adapter_003:in_0_ready -> sem_ram_slave_agent:rdata_fifo_src_ready + wire avalon_st_adapter_003_out_0_valid; // avalon_st_adapter_003:out_0_valid -> sem_ram_slave_agent:rdata_fifo_sink_valid + wire [33:0] avalon_st_adapter_003_out_0_data; // avalon_st_adapter_003:out_0_data -> sem_ram_slave_agent:rdata_fifo_sink_data + wire avalon_st_adapter_003_out_0_ready; // sem_ram_slave_agent:rdata_fifo_sink_ready -> avalon_st_adapter_003:out_0_ready + wire [0:0] avalon_st_adapter_003_out_0_error; // avalon_st_adapter_003:out_0_error -> sem_ram_slave_agent:rdata_fifo_sink_error + wire sys_clk_timer_s1_agent_rdata_fifo_src_valid; // sys_clk_timer_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_004:in_0_valid + wire [33:0] sys_clk_timer_s1_agent_rdata_fifo_src_data; // sys_clk_timer_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_004:in_0_data + wire sys_clk_timer_s1_agent_rdata_fifo_src_ready; // avalon_st_adapter_004:in_0_ready -> sys_clk_timer_s1_agent:rdata_fifo_src_ready + wire avalon_st_adapter_004_out_0_valid; // avalon_st_adapter_004:out_0_valid -> sys_clk_timer_s1_agent:rdata_fifo_sink_valid + wire [33:0] avalon_st_adapter_004_out_0_data; // avalon_st_adapter_004:out_0_data -> sys_clk_timer_s1_agent:rdata_fifo_sink_data + wire avalon_st_adapter_004_out_0_ready; // sys_clk_timer_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_004:out_0_ready + wire [0:0] avalon_st_adapter_004_out_0_error; // avalon_st_adapter_004:out_0_error -> sys_clk_timer_s1_agent:rdata_fifo_sink_error + wire mem_s2_agent_rdata_fifo_src_valid; // mem_s2_agent:rdata_fifo_src_valid -> avalon_st_adapter_005:in_0_valid + wire [33:0] mem_s2_agent_rdata_fifo_src_data; // mem_s2_agent:rdata_fifo_src_data -> avalon_st_adapter_005:in_0_data + wire mem_s2_agent_rdata_fifo_src_ready; // avalon_st_adapter_005:in_0_ready -> mem_s2_agent:rdata_fifo_src_ready + wire avalon_st_adapter_005_out_0_valid; // avalon_st_adapter_005:out_0_valid -> mem_s2_agent:rdata_fifo_sink_valid + wire [33:0] avalon_st_adapter_005_out_0_data; // avalon_st_adapter_005:out_0_data -> mem_s2_agent:rdata_fifo_sink_data + wire avalon_st_adapter_005_out_0_ready; // mem_s2_agent:rdata_fifo_sink_ready -> avalon_st_adapter_005:out_0_ready + wire [0:0] avalon_st_adapter_005_out_0_error; // avalon_st_adapter_005:out_0_error -> mem_s2_agent:rdata_fifo_sink_error + wire mem_s1_agent_rdata_fifo_src_valid; // mem_s1_agent:rdata_fifo_src_valid -> avalon_st_adapter_006:in_0_valid + wire [33:0] mem_s1_agent_rdata_fifo_src_data; // mem_s1_agent:rdata_fifo_src_data -> avalon_st_adapter_006:in_0_data + wire mem_s1_agent_rdata_fifo_src_ready; // avalon_st_adapter_006:in_0_ready -> mem_s1_agent:rdata_fifo_src_ready + wire avalon_st_adapter_006_out_0_valid; // avalon_st_adapter_006:out_0_valid -> mem_s1_agent:rdata_fifo_sink_valid + wire [33:0] avalon_st_adapter_006_out_0_data; // avalon_st_adapter_006:out_0_data -> mem_s1_agent:rdata_fifo_sink_data + wire avalon_st_adapter_006_out_0_ready; // mem_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_006:out_0_ready + wire [0:0] avalon_st_adapter_006_out_0_error; // avalon_st_adapter_006:out_0_error -> mem_s1_agent:rdata_fifo_sink_error + + altera_merlin_master_translator #( + .AV_ADDRESS_W (18), + .AV_DATA_W (32), + .AV_BURSTCOUNT_W (1), + .AV_BYTEENABLE_W (4), + .UAV_ADDRESS_W (18), + .UAV_BURSTCOUNT_W (3), + .USE_READ (1), + .USE_WRITE (1), + .USE_BEGINBURSTTRANSFER (0), + .USE_BEGINTRANSFER (0), + .USE_CHIPSELECT (0), + .USE_BURSTCOUNT (0), + .USE_READDATAVALID (0), + .USE_WAITREQUEST (1), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .AV_SYMBOLS_PER_WORD (4), + .AV_ADDRESS_SYMBOLS (1), + .AV_BURSTCOUNT_SYMBOLS (0), + .AV_CONSTANT_BURST_BEHAVIOR (0), + .UAV_CONSTANT_BURST_BEHAVIOR (0), + .AV_LINEWRAPBURSTS (0), + .AV_REGISTERINCOMINGSIGNALS (1) + ) cpu_data_master_translator ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // reset.reset + .uav_address (cpu_data_master_translator_avalon_universal_master_0_address), // avalon_universal_master_0.address + .uav_burstcount (cpu_data_master_translator_avalon_universal_master_0_burstcount), // .burstcount + .uav_read (cpu_data_master_translator_avalon_universal_master_0_read), // .read + .uav_write (cpu_data_master_translator_avalon_universal_master_0_write), // .write + .uav_waitrequest (cpu_data_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest + .uav_readdatavalid (cpu_data_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid + .uav_byteenable (cpu_data_master_translator_avalon_universal_master_0_byteenable), // .byteenable + .uav_readdata (cpu_data_master_translator_avalon_universal_master_0_readdata), // .readdata + .uav_writedata (cpu_data_master_translator_avalon_universal_master_0_writedata), // .writedata + .uav_lock (cpu_data_master_translator_avalon_universal_master_0_lock), // .lock + .uav_debugaccess (cpu_data_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess + .av_address (cpu_data_master_address), // avalon_anti_master_0.address + .av_waitrequest (cpu_data_master_waitrequest), // .waitrequest + .av_byteenable (cpu_data_master_byteenable), // .byteenable + .av_read (cpu_data_master_read), // .read + .av_readdata (cpu_data_master_readdata), // .readdata + .av_write (cpu_data_master_write), // .write + .av_writedata (cpu_data_master_writedata), // .writedata + .av_debugaccess (cpu_data_master_debugaccess), // .debugaccess + .av_burstcount (1'b1), // (terminated) + .av_beginbursttransfer (1'b0), // (terminated) + .av_begintransfer (1'b0), // (terminated) + .av_chipselect (1'b0), // (terminated) + .av_readdatavalid (), // (terminated) + .av_lock (1'b0), // (terminated) + .uav_clken (), // (terminated) + .av_clken (1'b1), // (terminated) + .uav_response (2'b00), // (terminated) + .av_response (), // (terminated) + .uav_writeresponsevalid (1'b0), // (terminated) + .av_writeresponsevalid () // (terminated) + ); + + altera_merlin_master_translator #( + .AV_ADDRESS_W (18), + .AV_DATA_W (32), + .AV_BURSTCOUNT_W (1), + .AV_BYTEENABLE_W (4), + .UAV_ADDRESS_W (18), + .UAV_BURSTCOUNT_W (3), + .USE_READ (1), + .USE_WRITE (0), + .USE_BEGINBURSTTRANSFER (0), + .USE_BEGINTRANSFER (0), + .USE_CHIPSELECT (0), + .USE_BURSTCOUNT (0), + .USE_READDATAVALID (0), + .USE_WAITREQUEST (1), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .AV_SYMBOLS_PER_WORD (4), + .AV_ADDRESS_SYMBOLS (1), + .AV_BURSTCOUNT_SYMBOLS (0), + .AV_CONSTANT_BURST_BEHAVIOR (0), + .UAV_CONSTANT_BURST_BEHAVIOR (0), + .AV_LINEWRAPBURSTS (1), + .AV_REGISTERINCOMINGSIGNALS (0) + ) cpu_instruction_master_translator ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // reset.reset + .uav_address (cpu_instruction_master_translator_avalon_universal_master_0_address), // avalon_universal_master_0.address + .uav_burstcount (cpu_instruction_master_translator_avalon_universal_master_0_burstcount), // .burstcount + .uav_read (cpu_instruction_master_translator_avalon_universal_master_0_read), // .read + .uav_write (cpu_instruction_master_translator_avalon_universal_master_0_write), // .write + .uav_waitrequest (cpu_instruction_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest + .uav_readdatavalid (cpu_instruction_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid + .uav_byteenable (cpu_instruction_master_translator_avalon_universal_master_0_byteenable), // .byteenable + .uav_readdata (cpu_instruction_master_translator_avalon_universal_master_0_readdata), // .readdata + .uav_writedata (cpu_instruction_master_translator_avalon_universal_master_0_writedata), // .writedata + .uav_lock (cpu_instruction_master_translator_avalon_universal_master_0_lock), // .lock + .uav_debugaccess (cpu_instruction_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess + .av_address (cpu_instruction_master_address), // avalon_anti_master_0.address + .av_waitrequest (cpu_instruction_master_waitrequest), // .waitrequest + .av_read (cpu_instruction_master_read), // .read + .av_readdata (cpu_instruction_master_readdata), // .readdata + .av_burstcount (1'b1), // (terminated) + .av_byteenable (4'b1111), // (terminated) + .av_beginbursttransfer (1'b0), // (terminated) + .av_begintransfer (1'b0), // (terminated) + .av_chipselect (1'b0), // (terminated) + .av_readdatavalid (), // (terminated) + .av_write (1'b0), // (terminated) + .av_writedata (32'b00000000000000000000000000000000), // (terminated) + .av_lock (1'b0), // (terminated) + .av_debugaccess (1'b0), // (terminated) + .uav_clken (), // (terminated) + .av_clken (1'b1), // (terminated) + .uav_response (2'b00), // (terminated) + .av_response (), // (terminated) + .uav_writeresponsevalid (1'b0), // (terminated) + .av_writeresponsevalid () // (terminated) + ); + + altera_merlin_slave_translator #( + .AV_ADDRESS_W (1), + .AV_DATA_W (32), + .UAV_DATA_W (32), + .AV_BURSTCOUNT_W (1), + .AV_BYTEENABLE_W (1), + .UAV_BYTEENABLE_W (4), + .UAV_ADDRESS_W (18), + .UAV_BURSTCOUNT_W (3), + .AV_READLATENCY (0), + .USE_READDATAVALID (0), + .USE_WAITREQUEST (1), + .USE_UAV_CLKEN (0), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .AV_SYMBOLS_PER_WORD (4), + .AV_ADDRESS_SYMBOLS (0), + .AV_BURSTCOUNT_SYMBOLS (0), + .AV_CONSTANT_BURST_BEHAVIOR (0), + .UAV_CONSTANT_BURST_BEHAVIOR (0), + .AV_REQUIRE_UNALIGNED_ADDRESSES (0), + .CHIPSELECT_THROUGH_READLATENCY (0), + .AV_READ_WAIT_CYCLES (1), + .AV_WRITE_WAIT_CYCLES (0), + .AV_SETUP_WAIT_CYCLES (0), + .AV_DATA_HOLD_CYCLES (0) + ) jtag_uart_avalon_jtag_slave_translator ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // reset.reset + .uav_address (jtag_uart_avalon_jtag_slave_agent_m0_address), // avalon_universal_slave_0.address + .uav_burstcount (jtag_uart_avalon_jtag_slave_agent_m0_burstcount), // .burstcount + .uav_read (jtag_uart_avalon_jtag_slave_agent_m0_read), // .read + .uav_write (jtag_uart_avalon_jtag_slave_agent_m0_write), // .write + .uav_waitrequest (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest), // .waitrequest + .uav_readdatavalid (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid), // .readdatavalid + .uav_byteenable (jtag_uart_avalon_jtag_slave_agent_m0_byteenable), // .byteenable + .uav_readdata (jtag_uart_avalon_jtag_slave_agent_m0_readdata), // .readdata + .uav_writedata (jtag_uart_avalon_jtag_slave_agent_m0_writedata), // .writedata + .uav_lock (jtag_uart_avalon_jtag_slave_agent_m0_lock), // .lock + .uav_debugaccess (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess), // .debugaccess + .av_address (jtag_uart_avalon_jtag_slave_address), // avalon_anti_slave_0.address + .av_write (jtag_uart_avalon_jtag_slave_write), // .write + .av_read (jtag_uart_avalon_jtag_slave_read), // .read + .av_readdata (jtag_uart_avalon_jtag_slave_readdata), // .readdata + .av_writedata (jtag_uart_avalon_jtag_slave_writedata), // .writedata + .av_waitrequest (jtag_uart_avalon_jtag_slave_waitrequest), // .waitrequest + .av_chipselect (jtag_uart_avalon_jtag_slave_chipselect), // .chipselect + .av_begintransfer (), // (terminated) + .av_beginbursttransfer (), // (terminated) + .av_burstcount (), // (terminated) + .av_byteenable (), // (terminated) + .av_readdatavalid (1'b0), // (terminated) + .av_writebyteenable (), // (terminated) + .av_lock (), // (terminated) + .av_clken (), // (terminated) + .uav_clken (1'b0), // (terminated) + .av_debugaccess (), // (terminated) + .av_outputenable (), // (terminated) + .uav_response (), // (terminated) + .av_response (2'b00), // (terminated) + .uav_writeresponsevalid (), // (terminated) + .av_writeresponsevalid (1'b0) // (terminated) + ); + + altera_merlin_slave_translator #( + .AV_ADDRESS_W (1), + .AV_DATA_W (32), + .UAV_DATA_W (32), + .AV_BURSTCOUNT_W (1), + .AV_BYTEENABLE_W (4), + .UAV_BYTEENABLE_W (4), + .UAV_ADDRESS_W (18), + .UAV_BURSTCOUNT_W (3), + .AV_READLATENCY (0), + .USE_READDATAVALID (0), + .USE_WAITREQUEST (0), + .USE_UAV_CLKEN (0), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .AV_SYMBOLS_PER_WORD (4), + .AV_ADDRESS_SYMBOLS (0), + .AV_BURSTCOUNT_SYMBOLS (0), + .AV_CONSTANT_BURST_BEHAVIOR (0), + .UAV_CONSTANT_BURST_BEHAVIOR (0), + .AV_REQUIRE_UNALIGNED_ADDRESSES (0), + .CHIPSELECT_THROUGH_READLATENCY (0), + .AV_READ_WAIT_CYCLES (0), + .AV_WRITE_WAIT_CYCLES (0), + .AV_SETUP_WAIT_CYCLES (0), + .AV_DATA_HOLD_CYCLES (0) + ) sem_ctl_slave_translator ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // reset.reset + .uav_address (sem_ctl_slave_agent_m0_address), // avalon_universal_slave_0.address + .uav_burstcount (sem_ctl_slave_agent_m0_burstcount), // .burstcount + .uav_read (sem_ctl_slave_agent_m0_read), // .read + .uav_write (sem_ctl_slave_agent_m0_write), // .write + .uav_waitrequest (sem_ctl_slave_agent_m0_waitrequest), // .waitrequest + .uav_readdatavalid (sem_ctl_slave_agent_m0_readdatavalid), // .readdatavalid + .uav_byteenable (sem_ctl_slave_agent_m0_byteenable), // .byteenable + .uav_readdata (sem_ctl_slave_agent_m0_readdata), // .readdata + .uav_writedata (sem_ctl_slave_agent_m0_writedata), // .writedata + .uav_lock (sem_ctl_slave_agent_m0_lock), // .lock + .uav_debugaccess (sem_ctl_slave_agent_m0_debugaccess), // .debugaccess + .av_address (sem_ctl_slave_address), // avalon_anti_slave_0.address + .av_write (sem_ctl_slave_write), // .write + .av_read (sem_ctl_slave_read), // .read + .av_readdata (sem_ctl_slave_readdata), // .readdata + .av_writedata (sem_ctl_slave_writedata), // .writedata + .av_begintransfer (), // (terminated) + .av_beginbursttransfer (), // (terminated) + .av_burstcount (), // (terminated) + .av_byteenable (), // (terminated) + .av_readdatavalid (1'b0), // (terminated) + .av_waitrequest (1'b0), // (terminated) + .av_writebyteenable (), // (terminated) + .av_lock (), // (terminated) + .av_chipselect (), // (terminated) + .av_clken (), // (terminated) + .uav_clken (1'b0), // (terminated) + .av_debugaccess (), // (terminated) + .av_outputenable (), // (terminated) + .uav_response (), // (terminated) + .av_response (2'b00), // (terminated) + .uav_writeresponsevalid (), // (terminated) + .av_writeresponsevalid (1'b0) // (terminated) + ); + + altera_merlin_slave_translator #( + .AV_ADDRESS_W (9), + .AV_DATA_W (32), + .UAV_DATA_W (32), + .AV_BURSTCOUNT_W (1), + .AV_BYTEENABLE_W (4), + .UAV_BYTEENABLE_W (4), + .UAV_ADDRESS_W (18), + .UAV_BURSTCOUNT_W (3), + .AV_READLATENCY (0), + .USE_READDATAVALID (0), + .USE_WAITREQUEST (1), + .USE_UAV_CLKEN (0), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .AV_SYMBOLS_PER_WORD (4), + .AV_ADDRESS_SYMBOLS (0), + .AV_BURSTCOUNT_SYMBOLS (0), + .AV_CONSTANT_BURST_BEHAVIOR (0), + .UAV_CONSTANT_BURST_BEHAVIOR (0), + .AV_REQUIRE_UNALIGNED_ADDRESSES (0), + .CHIPSELECT_THROUGH_READLATENCY (0), + .AV_READ_WAIT_CYCLES (1), + .AV_WRITE_WAIT_CYCLES (0), + .AV_SETUP_WAIT_CYCLES (0), + .AV_DATA_HOLD_CYCLES (0) + ) cpu_debug_mem_slave_translator ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // reset.reset + .uav_address (cpu_debug_mem_slave_agent_m0_address), // avalon_universal_slave_0.address + .uav_burstcount (cpu_debug_mem_slave_agent_m0_burstcount), // .burstcount + .uav_read (cpu_debug_mem_slave_agent_m0_read), // .read + .uav_write (cpu_debug_mem_slave_agent_m0_write), // .write + .uav_waitrequest (cpu_debug_mem_slave_agent_m0_waitrequest), // .waitrequest + .uav_readdatavalid (cpu_debug_mem_slave_agent_m0_readdatavalid), // .readdatavalid + .uav_byteenable (cpu_debug_mem_slave_agent_m0_byteenable), // .byteenable + .uav_readdata (cpu_debug_mem_slave_agent_m0_readdata), // .readdata + .uav_writedata (cpu_debug_mem_slave_agent_m0_writedata), // .writedata + .uav_lock (cpu_debug_mem_slave_agent_m0_lock), // .lock + .uav_debugaccess (cpu_debug_mem_slave_agent_m0_debugaccess), // .debugaccess + .av_address (cpu_debug_mem_slave_address), // avalon_anti_slave_0.address + .av_write (cpu_debug_mem_slave_write), // .write + .av_read (cpu_debug_mem_slave_read), // .read + .av_readdata (cpu_debug_mem_slave_readdata), // .readdata + .av_writedata (cpu_debug_mem_slave_writedata), // .writedata + .av_byteenable (cpu_debug_mem_slave_byteenable), // .byteenable + .av_waitrequest (cpu_debug_mem_slave_waitrequest), // .waitrequest + .av_debugaccess (cpu_debug_mem_slave_debugaccess), // .debugaccess + .av_begintransfer (), // (terminated) + .av_beginbursttransfer (), // (terminated) + .av_burstcount (), // (terminated) + .av_readdatavalid (1'b0), // (terminated) + .av_writebyteenable (), // (terminated) + .av_lock (), // (terminated) + .av_chipselect (), // (terminated) + .av_clken (), // (terminated) + .uav_clken (1'b0), // (terminated) + .av_outputenable (), // (terminated) + .uav_response (), // (terminated) + .av_response (2'b00), // (terminated) + .uav_writeresponsevalid (), // (terminated) + .av_writeresponsevalid (1'b0) // (terminated) + ); + + altera_merlin_slave_translator #( + .AV_ADDRESS_W (2), + .AV_DATA_W (32), + .UAV_DATA_W (32), + .AV_BURSTCOUNT_W (1), + .AV_BYTEENABLE_W (4), + .UAV_BYTEENABLE_W (4), + .UAV_ADDRESS_W (18), + .UAV_BURSTCOUNT_W (3), + .AV_READLATENCY (0), + .USE_READDATAVALID (0), + .USE_WAITREQUEST (0), + .USE_UAV_CLKEN (0), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .AV_SYMBOLS_PER_WORD (4), + .AV_ADDRESS_SYMBOLS (0), + .AV_BURSTCOUNT_SYMBOLS (0), + .AV_CONSTANT_BURST_BEHAVIOR (0), + .UAV_CONSTANT_BURST_BEHAVIOR (0), + .AV_REQUIRE_UNALIGNED_ADDRESSES (0), + .CHIPSELECT_THROUGH_READLATENCY (0), + .AV_READ_WAIT_CYCLES (1), + .AV_WRITE_WAIT_CYCLES (0), + .AV_SETUP_WAIT_CYCLES (0), + .AV_DATA_HOLD_CYCLES (0) + ) sem_ram_slave_translator ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // reset.reset + .uav_address (sem_ram_slave_agent_m0_address), // avalon_universal_slave_0.address + .uav_burstcount (sem_ram_slave_agent_m0_burstcount), // .burstcount + .uav_read (sem_ram_slave_agent_m0_read), // .read + .uav_write (sem_ram_slave_agent_m0_write), // .write + .uav_waitrequest (sem_ram_slave_agent_m0_waitrequest), // .waitrequest + .uav_readdatavalid (sem_ram_slave_agent_m0_readdatavalid), // .readdatavalid + .uav_byteenable (sem_ram_slave_agent_m0_byteenable), // .byteenable + .uav_readdata (sem_ram_slave_agent_m0_readdata), // .readdata + .uav_writedata (sem_ram_slave_agent_m0_writedata), // .writedata + .uav_lock (sem_ram_slave_agent_m0_lock), // .lock + .uav_debugaccess (sem_ram_slave_agent_m0_debugaccess), // .debugaccess + .av_address (sem_ram_slave_address), // avalon_anti_slave_0.address + .av_write (sem_ram_slave_write), // .write + .av_writedata (sem_ram_slave_writedata), // .writedata + .av_read (), // (terminated) + .av_readdata (32'b11011110101011011101111010101101), // (terminated) + .av_begintransfer (), // (terminated) + .av_beginbursttransfer (), // (terminated) + .av_burstcount (), // (terminated) + .av_byteenable (), // (terminated) + .av_readdatavalid (1'b0), // (terminated) + .av_waitrequest (1'b0), // (terminated) + .av_writebyteenable (), // (terminated) + .av_lock (), // (terminated) + .av_chipselect (), // (terminated) + .av_clken (), // (terminated) + .uav_clken (1'b0), // (terminated) + .av_debugaccess (), // (terminated) + .av_outputenable (), // (terminated) + .uav_response (), // (terminated) + .av_response (2'b00), // (terminated) + .uav_writeresponsevalid (), // (terminated) + .av_writeresponsevalid (1'b0) // (terminated) + ); + + altera_merlin_slave_translator #( + .AV_ADDRESS_W (3), + .AV_DATA_W (16), + .UAV_DATA_W (32), + .AV_BURSTCOUNT_W (1), + .AV_BYTEENABLE_W (1), + .UAV_BYTEENABLE_W (4), + .UAV_ADDRESS_W (18), + .UAV_BURSTCOUNT_W (3), + .AV_READLATENCY (0), + .USE_READDATAVALID (0), + .USE_WAITREQUEST (0), + .USE_UAV_CLKEN (0), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .AV_SYMBOLS_PER_WORD (4), + .AV_ADDRESS_SYMBOLS (0), + .AV_BURSTCOUNT_SYMBOLS (0), + .AV_CONSTANT_BURST_BEHAVIOR (0), + .UAV_CONSTANT_BURST_BEHAVIOR (0), + .AV_REQUIRE_UNALIGNED_ADDRESSES (0), + .CHIPSELECT_THROUGH_READLATENCY (0), + .AV_READ_WAIT_CYCLES (1), + .AV_WRITE_WAIT_CYCLES (0), + .AV_SETUP_WAIT_CYCLES (0), + .AV_DATA_HOLD_CYCLES (0) + ) sys_clk_timer_s1_translator ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // reset.reset + .uav_address (sys_clk_timer_s1_agent_m0_address), // avalon_universal_slave_0.address + .uav_burstcount (sys_clk_timer_s1_agent_m0_burstcount), // .burstcount + .uav_read (sys_clk_timer_s1_agent_m0_read), // .read + .uav_write (sys_clk_timer_s1_agent_m0_write), // .write + .uav_waitrequest (sys_clk_timer_s1_agent_m0_waitrequest), // .waitrequest + .uav_readdatavalid (sys_clk_timer_s1_agent_m0_readdatavalid), // .readdatavalid + .uav_byteenable (sys_clk_timer_s1_agent_m0_byteenable), // .byteenable + .uav_readdata (sys_clk_timer_s1_agent_m0_readdata), // .readdata + .uav_writedata (sys_clk_timer_s1_agent_m0_writedata), // .writedata + .uav_lock (sys_clk_timer_s1_agent_m0_lock), // .lock + .uav_debugaccess (sys_clk_timer_s1_agent_m0_debugaccess), // .debugaccess + .av_address (sys_clk_timer_s1_address), // avalon_anti_slave_0.address + .av_write (sys_clk_timer_s1_write), // .write + .av_readdata (sys_clk_timer_s1_readdata), // .readdata + .av_writedata (sys_clk_timer_s1_writedata), // .writedata + .av_chipselect (sys_clk_timer_s1_chipselect), // .chipselect + .av_read (), // (terminated) + .av_begintransfer (), // (terminated) + .av_beginbursttransfer (), // (terminated) + .av_burstcount (), // (terminated) + .av_byteenable (), // (terminated) + .av_readdatavalid (1'b0), // (terminated) + .av_waitrequest (1'b0), // (terminated) + .av_writebyteenable (), // (terminated) + .av_lock (), // (terminated) + .av_clken (), // (terminated) + .uav_clken (1'b0), // (terminated) + .av_debugaccess (), // (terminated) + .av_outputenable (), // (terminated) + .uav_response (), // (terminated) + .av_response (2'b00), // (terminated) + .uav_writeresponsevalid (), // (terminated) + .av_writeresponsevalid (1'b0) // (terminated) + ); + + altera_merlin_slave_translator #( + .AV_ADDRESS_W (15), + .AV_DATA_W (32), + .UAV_DATA_W (32), + .AV_BURSTCOUNT_W (1), + .AV_BYTEENABLE_W (4), + .UAV_BYTEENABLE_W (4), + .UAV_ADDRESS_W (18), + .UAV_BURSTCOUNT_W (3), + .AV_READLATENCY (1), + .USE_READDATAVALID (0), + .USE_WAITREQUEST (0), + .USE_UAV_CLKEN (0), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .AV_SYMBOLS_PER_WORD (4), + .AV_ADDRESS_SYMBOLS (0), + .AV_BURSTCOUNT_SYMBOLS (0), + .AV_CONSTANT_BURST_BEHAVIOR (0), + .UAV_CONSTANT_BURST_BEHAVIOR (0), + .AV_REQUIRE_UNALIGNED_ADDRESSES (0), + .CHIPSELECT_THROUGH_READLATENCY (0), + .AV_READ_WAIT_CYCLES (0), + .AV_WRITE_WAIT_CYCLES (0), + .AV_SETUP_WAIT_CYCLES (0), + .AV_DATA_HOLD_CYCLES (0) + ) mem_s2_translator ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // reset.reset + .uav_address (mem_s2_agent_m0_address), // avalon_universal_slave_0.address + .uav_burstcount (mem_s2_agent_m0_burstcount), // .burstcount + .uav_read (mem_s2_agent_m0_read), // .read + .uav_write (mem_s2_agent_m0_write), // .write + .uav_waitrequest (mem_s2_agent_m0_waitrequest), // .waitrequest + .uav_readdatavalid (mem_s2_agent_m0_readdatavalid), // .readdatavalid + .uav_byteenable (mem_s2_agent_m0_byteenable), // .byteenable + .uav_readdata (mem_s2_agent_m0_readdata), // .readdata + .uav_writedata (mem_s2_agent_m0_writedata), // .writedata + .uav_lock (mem_s2_agent_m0_lock), // .lock + .uav_debugaccess (mem_s2_agent_m0_debugaccess), // .debugaccess + .av_address (mem_s2_address), // avalon_anti_slave_0.address + .av_write (mem_s2_write), // .write + .av_readdata (mem_s2_readdata), // .readdata + .av_writedata (mem_s2_writedata), // .writedata + .av_byteenable (mem_s2_byteenable), // .byteenable + .av_chipselect (mem_s2_chipselect), // .chipselect + .av_clken (mem_s2_clken), // .clken + .av_read (), // (terminated) + .av_begintransfer (), // (terminated) + .av_beginbursttransfer (), // (terminated) + .av_burstcount (), // (terminated) + .av_readdatavalid (1'b0), // (terminated) + .av_waitrequest (1'b0), // (terminated) + .av_writebyteenable (), // (terminated) + .av_lock (), // (terminated) + .uav_clken (1'b0), // (terminated) + .av_debugaccess (), // (terminated) + .av_outputenable (), // (terminated) + .uav_response (), // (terminated) + .av_response (2'b00), // (terminated) + .uav_writeresponsevalid (), // (terminated) + .av_writeresponsevalid (1'b0) // (terminated) + ); + + altera_merlin_slave_translator #( + .AV_ADDRESS_W (15), + .AV_DATA_W (32), + .UAV_DATA_W (32), + .AV_BURSTCOUNT_W (1), + .AV_BYTEENABLE_W (4), + .UAV_BYTEENABLE_W (4), + .UAV_ADDRESS_W (18), + .UAV_BURSTCOUNT_W (3), + .AV_READLATENCY (1), + .USE_READDATAVALID (0), + .USE_WAITREQUEST (0), + .USE_UAV_CLKEN (0), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .AV_SYMBOLS_PER_WORD (4), + .AV_ADDRESS_SYMBOLS (0), + .AV_BURSTCOUNT_SYMBOLS (0), + .AV_CONSTANT_BURST_BEHAVIOR (0), + .UAV_CONSTANT_BURST_BEHAVIOR (0), + .AV_REQUIRE_UNALIGNED_ADDRESSES (0), + .CHIPSELECT_THROUGH_READLATENCY (0), + .AV_READ_WAIT_CYCLES (0), + .AV_WRITE_WAIT_CYCLES (0), + .AV_SETUP_WAIT_CYCLES (0), + .AV_DATA_HOLD_CYCLES (0) + ) mem_s1_translator ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // reset.reset + .uav_address (mem_s1_agent_m0_address), // avalon_universal_slave_0.address + .uav_burstcount (mem_s1_agent_m0_burstcount), // .burstcount + .uav_read (mem_s1_agent_m0_read), // .read + .uav_write (mem_s1_agent_m0_write), // .write + .uav_waitrequest (mem_s1_agent_m0_waitrequest), // .waitrequest + .uav_readdatavalid (mem_s1_agent_m0_readdatavalid), // .readdatavalid + .uav_byteenable (mem_s1_agent_m0_byteenable), // .byteenable + .uav_readdata (mem_s1_agent_m0_readdata), // .readdata + .uav_writedata (mem_s1_agent_m0_writedata), // .writedata + .uav_lock (mem_s1_agent_m0_lock), // .lock + .uav_debugaccess (mem_s1_agent_m0_debugaccess), // .debugaccess + .av_address (mem_s1_address), // avalon_anti_slave_0.address + .av_write (mem_s1_write), // .write + .av_readdata (mem_s1_readdata), // .readdata + .av_writedata (mem_s1_writedata), // .writedata + .av_byteenable (mem_s1_byteenable), // .byteenable + .av_chipselect (mem_s1_chipselect), // .chipselect + .av_clken (mem_s1_clken), // .clken + .av_read (), // (terminated) + .av_begintransfer (), // (terminated) + .av_beginbursttransfer (), // (terminated) + .av_burstcount (), // (terminated) + .av_readdatavalid (1'b0), // (terminated) + .av_waitrequest (1'b0), // (terminated) + .av_writebyteenable (), // (terminated) + .av_lock (), // (terminated) + .uav_clken (1'b0), // (terminated) + .av_debugaccess (), // (terminated) + .av_outputenable (), // (terminated) + .uav_response (), // (terminated) + .av_response (2'b00), // (terminated) + .uav_writeresponsevalid (), // (terminated) + .av_writeresponsevalid (1'b0) // (terminated) + ); + + altera_merlin_master_agent #( + .PKT_ORI_BURST_SIZE_H (93), + .PKT_ORI_BURST_SIZE_L (91), + .PKT_RESPONSE_STATUS_H (90), + .PKT_RESPONSE_STATUS_L (89), + .PKT_QOS_H (74), + .PKT_QOS_L (74), + .PKT_DATA_SIDEBAND_H (72), + .PKT_DATA_SIDEBAND_L (72), + .PKT_ADDR_SIDEBAND_H (71), + .PKT_ADDR_SIDEBAND_L (71), + .PKT_BURST_TYPE_H (70), + .PKT_BURST_TYPE_L (69), + .PKT_CACHE_H (88), + .PKT_CACHE_L (85), + .PKT_THREAD_ID_H (81), + .PKT_THREAD_ID_L (81), + .PKT_BURST_SIZE_H (68), + .PKT_BURST_SIZE_L (66), + .PKT_TRANS_EXCLUSIVE (59), + .PKT_TRANS_LOCK (58), + .PKT_BEGIN_BURST (73), + .PKT_PROTECTION_H (84), + .PKT_PROTECTION_L (82), + .PKT_BURSTWRAP_H (65), + .PKT_BURSTWRAP_L (63), + .PKT_BYTE_CNT_H (62), + .PKT_BYTE_CNT_L (60), + .PKT_ADDR_H (53), + .PKT_ADDR_L (36), + .PKT_TRANS_COMPRESSED_READ (54), + .PKT_TRANS_POSTED (55), + .PKT_TRANS_WRITE (56), + .PKT_TRANS_READ (57), + .PKT_DATA_H (31), + .PKT_DATA_L (0), + .PKT_BYTEEN_H (35), + .PKT_BYTEEN_L (32), + .PKT_SRC_ID_H (77), + .PKT_SRC_ID_L (75), + .PKT_DEST_ID_H (80), + .PKT_DEST_ID_L (78), + .ST_DATA_W (94), + .ST_CHANNEL_W (7), + .AV_BURSTCOUNT_W (3), + .SUPPRESS_0_BYTEEN_RSP (0), + .ID (0), + .BURSTWRAP_VALUE (7), + .CACHE_VALUE (0), + .SECURE_ACCESS_BIT (1), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0) + ) cpu_data_master_agent ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .av_address (cpu_data_master_translator_avalon_universal_master_0_address), // av.address + .av_write (cpu_data_master_translator_avalon_universal_master_0_write), // .write + .av_read (cpu_data_master_translator_avalon_universal_master_0_read), // .read + .av_writedata (cpu_data_master_translator_avalon_universal_master_0_writedata), // .writedata + .av_readdata (cpu_data_master_translator_avalon_universal_master_0_readdata), // .readdata + .av_waitrequest (cpu_data_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest + .av_readdatavalid (cpu_data_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid + .av_byteenable (cpu_data_master_translator_avalon_universal_master_0_byteenable), // .byteenable + .av_burstcount (cpu_data_master_translator_avalon_universal_master_0_burstcount), // .burstcount + .av_debugaccess (cpu_data_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess + .av_lock (cpu_data_master_translator_avalon_universal_master_0_lock), // .lock + .cp_valid (cpu_data_master_agent_cp_valid), // cp.valid + .cp_data (cpu_data_master_agent_cp_data), // .data + .cp_startofpacket (cpu_data_master_agent_cp_startofpacket), // .startofpacket + .cp_endofpacket (cpu_data_master_agent_cp_endofpacket), // .endofpacket + .cp_ready (cpu_data_master_agent_cp_ready), // .ready + .rp_valid (rsp_mux_src_valid), // rp.valid + .rp_data (rsp_mux_src_data), // .data + .rp_channel (rsp_mux_src_channel), // .channel + .rp_startofpacket (rsp_mux_src_startofpacket), // .startofpacket + .rp_endofpacket (rsp_mux_src_endofpacket), // .endofpacket + .rp_ready (rsp_mux_src_ready), // .ready + .av_response (), // (terminated) + .av_writeresponsevalid () // (terminated) + ); + + altera_merlin_master_agent #( + .PKT_ORI_BURST_SIZE_H (93), + .PKT_ORI_BURST_SIZE_L (91), + .PKT_RESPONSE_STATUS_H (90), + .PKT_RESPONSE_STATUS_L (89), + .PKT_QOS_H (74), + .PKT_QOS_L (74), + .PKT_DATA_SIDEBAND_H (72), + .PKT_DATA_SIDEBAND_L (72), + .PKT_ADDR_SIDEBAND_H (71), + .PKT_ADDR_SIDEBAND_L (71), + .PKT_BURST_TYPE_H (70), + .PKT_BURST_TYPE_L (69), + .PKT_CACHE_H (88), + .PKT_CACHE_L (85), + .PKT_THREAD_ID_H (81), + .PKT_THREAD_ID_L (81), + .PKT_BURST_SIZE_H (68), + .PKT_BURST_SIZE_L (66), + .PKT_TRANS_EXCLUSIVE (59), + .PKT_TRANS_LOCK (58), + .PKT_BEGIN_BURST (73), + .PKT_PROTECTION_H (84), + .PKT_PROTECTION_L (82), + .PKT_BURSTWRAP_H (65), + .PKT_BURSTWRAP_L (63), + .PKT_BYTE_CNT_H (62), + .PKT_BYTE_CNT_L (60), + .PKT_ADDR_H (53), + .PKT_ADDR_L (36), + .PKT_TRANS_COMPRESSED_READ (54), + .PKT_TRANS_POSTED (55), + .PKT_TRANS_WRITE (56), + .PKT_TRANS_READ (57), + .PKT_DATA_H (31), + .PKT_DATA_L (0), + .PKT_BYTEEN_H (35), + .PKT_BYTEEN_L (32), + .PKT_SRC_ID_H (77), + .PKT_SRC_ID_L (75), + .PKT_DEST_ID_H (80), + .PKT_DEST_ID_L (78), + .ST_DATA_W (94), + .ST_CHANNEL_W (7), + .AV_BURSTCOUNT_W (3), + .SUPPRESS_0_BYTEEN_RSP (0), + .ID (1), + .BURSTWRAP_VALUE (3), + .CACHE_VALUE (0), + .SECURE_ACCESS_BIT (1), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0) + ) cpu_instruction_master_agent ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .av_address (cpu_instruction_master_translator_avalon_universal_master_0_address), // av.address + .av_write (cpu_instruction_master_translator_avalon_universal_master_0_write), // .write + .av_read (cpu_instruction_master_translator_avalon_universal_master_0_read), // .read + .av_writedata (cpu_instruction_master_translator_avalon_universal_master_0_writedata), // .writedata + .av_readdata (cpu_instruction_master_translator_avalon_universal_master_0_readdata), // .readdata + .av_waitrequest (cpu_instruction_master_translator_avalon_universal_master_0_waitrequest), // .waitrequest + .av_readdatavalid (cpu_instruction_master_translator_avalon_universal_master_0_readdatavalid), // .readdatavalid + .av_byteenable (cpu_instruction_master_translator_avalon_universal_master_0_byteenable), // .byteenable + .av_burstcount (cpu_instruction_master_translator_avalon_universal_master_0_burstcount), // .burstcount + .av_debugaccess (cpu_instruction_master_translator_avalon_universal_master_0_debugaccess), // .debugaccess + .av_lock (cpu_instruction_master_translator_avalon_universal_master_0_lock), // .lock + .cp_valid (cpu_instruction_master_agent_cp_valid), // cp.valid + .cp_data (cpu_instruction_master_agent_cp_data), // .data + .cp_startofpacket (cpu_instruction_master_agent_cp_startofpacket), // .startofpacket + .cp_endofpacket (cpu_instruction_master_agent_cp_endofpacket), // .endofpacket + .cp_ready (cpu_instruction_master_agent_cp_ready), // .ready + .rp_valid (rsp_mux_001_src_valid), // rp.valid + .rp_data (rsp_mux_001_src_data), // .data + .rp_channel (rsp_mux_001_src_channel), // .channel + .rp_startofpacket (rsp_mux_001_src_startofpacket), // .startofpacket + .rp_endofpacket (rsp_mux_001_src_endofpacket), // .endofpacket + .rp_ready (rsp_mux_001_src_ready), // .ready + .av_response (), // (terminated) + .av_writeresponsevalid () // (terminated) + ); + + altera_merlin_slave_agent #( + .PKT_ORI_BURST_SIZE_H (93), + .PKT_ORI_BURST_SIZE_L (91), + .PKT_RESPONSE_STATUS_H (90), + .PKT_RESPONSE_STATUS_L (89), + .PKT_BURST_SIZE_H (68), + .PKT_BURST_SIZE_L (66), + .PKT_TRANS_LOCK (58), + .PKT_BEGIN_BURST (73), + .PKT_PROTECTION_H (84), + .PKT_PROTECTION_L (82), + .PKT_BURSTWRAP_H (65), + .PKT_BURSTWRAP_L (63), + .PKT_BYTE_CNT_H (62), + .PKT_BYTE_CNT_L (60), + .PKT_ADDR_H (53), + .PKT_ADDR_L (36), + .PKT_TRANS_COMPRESSED_READ (54), + .PKT_TRANS_POSTED (55), + .PKT_TRANS_WRITE (56), + .PKT_TRANS_READ (57), + .PKT_DATA_H (31), + .PKT_DATA_L (0), + .PKT_BYTEEN_H (35), + .PKT_BYTEEN_L (32), + .PKT_SRC_ID_H (77), + .PKT_SRC_ID_L (75), + .PKT_DEST_ID_H (80), + .PKT_DEST_ID_L (78), + .PKT_SYMBOL_W (8), + .ST_CHANNEL_W (7), + .ST_DATA_W (94), + .AVS_BURSTCOUNT_W (3), + .SUPPRESS_0_BYTEEN_CMD (0), + .PREVENT_FIFO_OVERFLOW (1), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .ECC_ENABLE (0) + ) jtag_uart_avalon_jtag_slave_agent ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .m0_address (jtag_uart_avalon_jtag_slave_agent_m0_address), // m0.address + .m0_burstcount (jtag_uart_avalon_jtag_slave_agent_m0_burstcount), // .burstcount + .m0_byteenable (jtag_uart_avalon_jtag_slave_agent_m0_byteenable), // .byteenable + .m0_debugaccess (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess), // .debugaccess + .m0_lock (jtag_uart_avalon_jtag_slave_agent_m0_lock), // .lock + .m0_readdata (jtag_uart_avalon_jtag_slave_agent_m0_readdata), // .readdata + .m0_readdatavalid (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid), // .readdatavalid + .m0_read (jtag_uart_avalon_jtag_slave_agent_m0_read), // .read + .m0_waitrequest (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest), // .waitrequest + .m0_writedata (jtag_uart_avalon_jtag_slave_agent_m0_writedata), // .writedata + .m0_write (jtag_uart_avalon_jtag_slave_agent_m0_write), // .write + .rp_endofpacket (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket), // rp.endofpacket + .rp_ready (jtag_uart_avalon_jtag_slave_agent_rp_ready), // .ready + .rp_valid (jtag_uart_avalon_jtag_slave_agent_rp_valid), // .valid + .rp_data (jtag_uart_avalon_jtag_slave_agent_rp_data), // .data + .rp_startofpacket (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket), // .startofpacket + .cp_ready (cmd_mux_src_ready), // cp.ready + .cp_valid (cmd_mux_src_valid), // .valid + .cp_data (cmd_mux_src_data), // .data + .cp_startofpacket (cmd_mux_src_startofpacket), // .startofpacket + .cp_endofpacket (cmd_mux_src_endofpacket), // .endofpacket + .cp_channel (cmd_mux_src_channel), // .channel + .rf_sink_ready (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready), // rf_sink.ready + .rf_sink_valid (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid), // .valid + .rf_sink_startofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket + .rf_sink_endofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket + .rf_sink_data (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data), // .data + .rf_source_ready (jtag_uart_avalon_jtag_slave_agent_rf_source_ready), // rf_source.ready + .rf_source_valid (jtag_uart_avalon_jtag_slave_agent_rf_source_valid), // .valid + .rf_source_startofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket), // .startofpacket + .rf_source_endofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket), // .endofpacket + .rf_source_data (jtag_uart_avalon_jtag_slave_agent_rf_source_data), // .data + .rdata_fifo_sink_ready (avalon_st_adapter_out_0_ready), // rdata_fifo_sink.ready + .rdata_fifo_sink_valid (avalon_st_adapter_out_0_valid), // .valid + .rdata_fifo_sink_data (avalon_st_adapter_out_0_data), // .data + .rdata_fifo_sink_error (avalon_st_adapter_out_0_error), // .error + .rdata_fifo_src_ready (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready + .rdata_fifo_src_valid (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid), // .valid + .rdata_fifo_src_data (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data), // .data + .m0_response (2'b00), // (terminated) + .m0_writeresponsevalid (1'b0) // (terminated) + ); + + altera_avalon_sc_fifo #( + .SYMBOLS_PER_BEAT (1), + .BITS_PER_SYMBOL (95), + .FIFO_DEPTH (2), + .CHANNEL_WIDTH (0), + .ERROR_WIDTH (0), + .USE_PACKETS (1), + .USE_FILL_LEVEL (0), + .EMPTY_LATENCY (1), + .USE_MEMORY_BLOCKS (0), + .USE_STORE_FORWARD (0), + .USE_ALMOST_FULL_IF (0), + .USE_ALMOST_EMPTY_IF (0) + ) jtag_uart_avalon_jtag_slave_agent_rsp_fifo ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .in_data (jtag_uart_avalon_jtag_slave_agent_rf_source_data), // in.data + .in_valid (jtag_uart_avalon_jtag_slave_agent_rf_source_valid), // .valid + .in_ready (jtag_uart_avalon_jtag_slave_agent_rf_source_ready), // .ready + .in_startofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket), // .startofpacket + .in_endofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket), // .endofpacket + .out_data (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data), // out.data + .out_valid (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid), // .valid + .out_ready (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready), // .ready + .out_startofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket + .out_endofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket + .csr_address (2'b00), // (terminated) + .csr_read (1'b0), // (terminated) + .csr_write (1'b0), // (terminated) + .csr_readdata (), // (terminated) + .csr_writedata (32'b00000000000000000000000000000000), // (terminated) + .almost_full_data (), // (terminated) + .almost_empty_data (), // (terminated) + .in_empty (1'b0), // (terminated) + .out_empty (), // (terminated) + .in_error (1'b0), // (terminated) + .out_error (), // (terminated) + .in_channel (1'b0), // (terminated) + .out_channel () // (terminated) + ); + + altera_merlin_slave_agent #( + .PKT_ORI_BURST_SIZE_H (93), + .PKT_ORI_BURST_SIZE_L (91), + .PKT_RESPONSE_STATUS_H (90), + .PKT_RESPONSE_STATUS_L (89), + .PKT_BURST_SIZE_H (68), + .PKT_BURST_SIZE_L (66), + .PKT_TRANS_LOCK (58), + .PKT_BEGIN_BURST (73), + .PKT_PROTECTION_H (84), + .PKT_PROTECTION_L (82), + .PKT_BURSTWRAP_H (65), + .PKT_BURSTWRAP_L (63), + .PKT_BYTE_CNT_H (62), + .PKT_BYTE_CNT_L (60), + .PKT_ADDR_H (53), + .PKT_ADDR_L (36), + .PKT_TRANS_COMPRESSED_READ (54), + .PKT_TRANS_POSTED (55), + .PKT_TRANS_WRITE (56), + .PKT_TRANS_READ (57), + .PKT_DATA_H (31), + .PKT_DATA_L (0), + .PKT_BYTEEN_H (35), + .PKT_BYTEEN_L (32), + .PKT_SRC_ID_H (77), + .PKT_SRC_ID_L (75), + .PKT_DEST_ID_H (80), + .PKT_DEST_ID_L (78), + .PKT_SYMBOL_W (8), + .ST_CHANNEL_W (7), + .ST_DATA_W (94), + .AVS_BURSTCOUNT_W (3), + .SUPPRESS_0_BYTEEN_CMD (0), + .PREVENT_FIFO_OVERFLOW (1), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .ECC_ENABLE (0) + ) sem_ctl_slave_agent ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .m0_address (sem_ctl_slave_agent_m0_address), // m0.address + .m0_burstcount (sem_ctl_slave_agent_m0_burstcount), // .burstcount + .m0_byteenable (sem_ctl_slave_agent_m0_byteenable), // .byteenable + .m0_debugaccess (sem_ctl_slave_agent_m0_debugaccess), // .debugaccess + .m0_lock (sem_ctl_slave_agent_m0_lock), // .lock + .m0_readdata (sem_ctl_slave_agent_m0_readdata), // .readdata + .m0_readdatavalid (sem_ctl_slave_agent_m0_readdatavalid), // .readdatavalid + .m0_read (sem_ctl_slave_agent_m0_read), // .read + .m0_waitrequest (sem_ctl_slave_agent_m0_waitrequest), // .waitrequest + .m0_writedata (sem_ctl_slave_agent_m0_writedata), // .writedata + .m0_write (sem_ctl_slave_agent_m0_write), // .write + .rp_endofpacket (sem_ctl_slave_agent_rp_endofpacket), // rp.endofpacket + .rp_ready (sem_ctl_slave_agent_rp_ready), // .ready + .rp_valid (sem_ctl_slave_agent_rp_valid), // .valid + .rp_data (sem_ctl_slave_agent_rp_data), // .data + .rp_startofpacket (sem_ctl_slave_agent_rp_startofpacket), // .startofpacket + .cp_ready (cmd_mux_001_src_ready), // cp.ready + .cp_valid (cmd_mux_001_src_valid), // .valid + .cp_data (cmd_mux_001_src_data), // .data + .cp_startofpacket (cmd_mux_001_src_startofpacket), // .startofpacket + .cp_endofpacket (cmd_mux_001_src_endofpacket), // .endofpacket + .cp_channel (cmd_mux_001_src_channel), // .channel + .rf_sink_ready (sem_ctl_slave_agent_rsp_fifo_out_ready), // rf_sink.ready + .rf_sink_valid (sem_ctl_slave_agent_rsp_fifo_out_valid), // .valid + .rf_sink_startofpacket (sem_ctl_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket + .rf_sink_endofpacket (sem_ctl_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket + .rf_sink_data (sem_ctl_slave_agent_rsp_fifo_out_data), // .data + .rf_source_ready (sem_ctl_slave_agent_rf_source_ready), // rf_source.ready + .rf_source_valid (sem_ctl_slave_agent_rf_source_valid), // .valid + .rf_source_startofpacket (sem_ctl_slave_agent_rf_source_startofpacket), // .startofpacket + .rf_source_endofpacket (sem_ctl_slave_agent_rf_source_endofpacket), // .endofpacket + .rf_source_data (sem_ctl_slave_agent_rf_source_data), // .data + .rdata_fifo_sink_ready (avalon_st_adapter_001_out_0_ready), // rdata_fifo_sink.ready + .rdata_fifo_sink_valid (avalon_st_adapter_001_out_0_valid), // .valid + .rdata_fifo_sink_data (avalon_st_adapter_001_out_0_data), // .data + .rdata_fifo_sink_error (avalon_st_adapter_001_out_0_error), // .error + .rdata_fifo_src_ready (sem_ctl_slave_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready + .rdata_fifo_src_valid (sem_ctl_slave_agent_rdata_fifo_src_valid), // .valid + .rdata_fifo_src_data (sem_ctl_slave_agent_rdata_fifo_src_data), // .data + .m0_response (2'b00), // (terminated) + .m0_writeresponsevalid (1'b0) // (terminated) + ); + + altera_avalon_sc_fifo #( + .SYMBOLS_PER_BEAT (1), + .BITS_PER_SYMBOL (95), + .FIFO_DEPTH (2), + .CHANNEL_WIDTH (0), + .ERROR_WIDTH (0), + .USE_PACKETS (1), + .USE_FILL_LEVEL (0), + .EMPTY_LATENCY (1), + .USE_MEMORY_BLOCKS (0), + .USE_STORE_FORWARD (0), + .USE_ALMOST_FULL_IF (0), + .USE_ALMOST_EMPTY_IF (0) + ) sem_ctl_slave_agent_rsp_fifo ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .in_data (sem_ctl_slave_agent_rf_source_data), // in.data + .in_valid (sem_ctl_slave_agent_rf_source_valid), // .valid + .in_ready (sem_ctl_slave_agent_rf_source_ready), // .ready + .in_startofpacket (sem_ctl_slave_agent_rf_source_startofpacket), // .startofpacket + .in_endofpacket (sem_ctl_slave_agent_rf_source_endofpacket), // .endofpacket + .out_data (sem_ctl_slave_agent_rsp_fifo_out_data), // out.data + .out_valid (sem_ctl_slave_agent_rsp_fifo_out_valid), // .valid + .out_ready (sem_ctl_slave_agent_rsp_fifo_out_ready), // .ready + .out_startofpacket (sem_ctl_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket + .out_endofpacket (sem_ctl_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket + .csr_address (2'b00), // (terminated) + .csr_read (1'b0), // (terminated) + .csr_write (1'b0), // (terminated) + .csr_readdata (), // (terminated) + .csr_writedata (32'b00000000000000000000000000000000), // (terminated) + .almost_full_data (), // (terminated) + .almost_empty_data (), // (terminated) + .in_empty (1'b0), // (terminated) + .out_empty (), // (terminated) + .in_error (1'b0), // (terminated) + .out_error (), // (terminated) + .in_channel (1'b0), // (terminated) + .out_channel () // (terminated) + ); + + altera_merlin_slave_agent #( + .PKT_ORI_BURST_SIZE_H (93), + .PKT_ORI_BURST_SIZE_L (91), + .PKT_RESPONSE_STATUS_H (90), + .PKT_RESPONSE_STATUS_L (89), + .PKT_BURST_SIZE_H (68), + .PKT_BURST_SIZE_L (66), + .PKT_TRANS_LOCK (58), + .PKT_BEGIN_BURST (73), + .PKT_PROTECTION_H (84), + .PKT_PROTECTION_L (82), + .PKT_BURSTWRAP_H (65), + .PKT_BURSTWRAP_L (63), + .PKT_BYTE_CNT_H (62), + .PKT_BYTE_CNT_L (60), + .PKT_ADDR_H (53), + .PKT_ADDR_L (36), + .PKT_TRANS_COMPRESSED_READ (54), + .PKT_TRANS_POSTED (55), + .PKT_TRANS_WRITE (56), + .PKT_TRANS_READ (57), + .PKT_DATA_H (31), + .PKT_DATA_L (0), + .PKT_BYTEEN_H (35), + .PKT_BYTEEN_L (32), + .PKT_SRC_ID_H (77), + .PKT_SRC_ID_L (75), + .PKT_DEST_ID_H (80), + .PKT_DEST_ID_L (78), + .PKT_SYMBOL_W (8), + .ST_CHANNEL_W (7), + .ST_DATA_W (94), + .AVS_BURSTCOUNT_W (3), + .SUPPRESS_0_BYTEEN_CMD (0), + .PREVENT_FIFO_OVERFLOW (1), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .ECC_ENABLE (0) + ) cpu_debug_mem_slave_agent ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .m0_address (cpu_debug_mem_slave_agent_m0_address), // m0.address + .m0_burstcount (cpu_debug_mem_slave_agent_m0_burstcount), // .burstcount + .m0_byteenable (cpu_debug_mem_slave_agent_m0_byteenable), // .byteenable + .m0_debugaccess (cpu_debug_mem_slave_agent_m0_debugaccess), // .debugaccess + .m0_lock (cpu_debug_mem_slave_agent_m0_lock), // .lock + .m0_readdata (cpu_debug_mem_slave_agent_m0_readdata), // .readdata + .m0_readdatavalid (cpu_debug_mem_slave_agent_m0_readdatavalid), // .readdatavalid + .m0_read (cpu_debug_mem_slave_agent_m0_read), // .read + .m0_waitrequest (cpu_debug_mem_slave_agent_m0_waitrequest), // .waitrequest + .m0_writedata (cpu_debug_mem_slave_agent_m0_writedata), // .writedata + .m0_write (cpu_debug_mem_slave_agent_m0_write), // .write + .rp_endofpacket (cpu_debug_mem_slave_agent_rp_endofpacket), // rp.endofpacket + .rp_ready (cpu_debug_mem_slave_agent_rp_ready), // .ready + .rp_valid (cpu_debug_mem_slave_agent_rp_valid), // .valid + .rp_data (cpu_debug_mem_slave_agent_rp_data), // .data + .rp_startofpacket (cpu_debug_mem_slave_agent_rp_startofpacket), // .startofpacket + .cp_ready (cmd_mux_002_src_ready), // cp.ready + .cp_valid (cmd_mux_002_src_valid), // .valid + .cp_data (cmd_mux_002_src_data), // .data + .cp_startofpacket (cmd_mux_002_src_startofpacket), // .startofpacket + .cp_endofpacket (cmd_mux_002_src_endofpacket), // .endofpacket + .cp_channel (cmd_mux_002_src_channel), // .channel + .rf_sink_ready (cpu_debug_mem_slave_agent_rsp_fifo_out_ready), // rf_sink.ready + .rf_sink_valid (cpu_debug_mem_slave_agent_rsp_fifo_out_valid), // .valid + .rf_sink_startofpacket (cpu_debug_mem_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket + .rf_sink_endofpacket (cpu_debug_mem_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket + .rf_sink_data (cpu_debug_mem_slave_agent_rsp_fifo_out_data), // .data + .rf_source_ready (cpu_debug_mem_slave_agent_rf_source_ready), // rf_source.ready + .rf_source_valid (cpu_debug_mem_slave_agent_rf_source_valid), // .valid + .rf_source_startofpacket (cpu_debug_mem_slave_agent_rf_source_startofpacket), // .startofpacket + .rf_source_endofpacket (cpu_debug_mem_slave_agent_rf_source_endofpacket), // .endofpacket + .rf_source_data (cpu_debug_mem_slave_agent_rf_source_data), // .data + .rdata_fifo_sink_ready (avalon_st_adapter_002_out_0_ready), // rdata_fifo_sink.ready + .rdata_fifo_sink_valid (avalon_st_adapter_002_out_0_valid), // .valid + .rdata_fifo_sink_data (avalon_st_adapter_002_out_0_data), // .data + .rdata_fifo_sink_error (avalon_st_adapter_002_out_0_error), // .error + .rdata_fifo_src_ready (cpu_debug_mem_slave_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready + .rdata_fifo_src_valid (cpu_debug_mem_slave_agent_rdata_fifo_src_valid), // .valid + .rdata_fifo_src_data (cpu_debug_mem_slave_agent_rdata_fifo_src_data), // .data + .m0_response (2'b00), // (terminated) + .m0_writeresponsevalid (1'b0) // (terminated) + ); + + altera_avalon_sc_fifo #( + .SYMBOLS_PER_BEAT (1), + .BITS_PER_SYMBOL (95), + .FIFO_DEPTH (2), + .CHANNEL_WIDTH (0), + .ERROR_WIDTH (0), + .USE_PACKETS (1), + .USE_FILL_LEVEL (0), + .EMPTY_LATENCY (1), + .USE_MEMORY_BLOCKS (0), + .USE_STORE_FORWARD (0), + .USE_ALMOST_FULL_IF (0), + .USE_ALMOST_EMPTY_IF (0) + ) cpu_debug_mem_slave_agent_rsp_fifo ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .in_data (cpu_debug_mem_slave_agent_rf_source_data), // in.data + .in_valid (cpu_debug_mem_slave_agent_rf_source_valid), // .valid + .in_ready (cpu_debug_mem_slave_agent_rf_source_ready), // .ready + .in_startofpacket (cpu_debug_mem_slave_agent_rf_source_startofpacket), // .startofpacket + .in_endofpacket (cpu_debug_mem_slave_agent_rf_source_endofpacket), // .endofpacket + .out_data (cpu_debug_mem_slave_agent_rsp_fifo_out_data), // out.data + .out_valid (cpu_debug_mem_slave_agent_rsp_fifo_out_valid), // .valid + .out_ready (cpu_debug_mem_slave_agent_rsp_fifo_out_ready), // .ready + .out_startofpacket (cpu_debug_mem_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket + .out_endofpacket (cpu_debug_mem_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket + .csr_address (2'b00), // (terminated) + .csr_read (1'b0), // (terminated) + .csr_write (1'b0), // (terminated) + .csr_readdata (), // (terminated) + .csr_writedata (32'b00000000000000000000000000000000), // (terminated) + .almost_full_data (), // (terminated) + .almost_empty_data (), // (terminated) + .in_empty (1'b0), // (terminated) + .out_empty (), // (terminated) + .in_error (1'b0), // (terminated) + .out_error (), // (terminated) + .in_channel (1'b0), // (terminated) + .out_channel () // (terminated) + ); + + altera_merlin_slave_agent #( + .PKT_ORI_BURST_SIZE_H (93), + .PKT_ORI_BURST_SIZE_L (91), + .PKT_RESPONSE_STATUS_H (90), + .PKT_RESPONSE_STATUS_L (89), + .PKT_BURST_SIZE_H (68), + .PKT_BURST_SIZE_L (66), + .PKT_TRANS_LOCK (58), + .PKT_BEGIN_BURST (73), + .PKT_PROTECTION_H (84), + .PKT_PROTECTION_L (82), + .PKT_BURSTWRAP_H (65), + .PKT_BURSTWRAP_L (63), + .PKT_BYTE_CNT_H (62), + .PKT_BYTE_CNT_L (60), + .PKT_ADDR_H (53), + .PKT_ADDR_L (36), + .PKT_TRANS_COMPRESSED_READ (54), + .PKT_TRANS_POSTED (55), + .PKT_TRANS_WRITE (56), + .PKT_TRANS_READ (57), + .PKT_DATA_H (31), + .PKT_DATA_L (0), + .PKT_BYTEEN_H (35), + .PKT_BYTEEN_L (32), + .PKT_SRC_ID_H (77), + .PKT_SRC_ID_L (75), + .PKT_DEST_ID_H (80), + .PKT_DEST_ID_L (78), + .PKT_SYMBOL_W (8), + .ST_CHANNEL_W (7), + .ST_DATA_W (94), + .AVS_BURSTCOUNT_W (3), + .SUPPRESS_0_BYTEEN_CMD (0), + .PREVENT_FIFO_OVERFLOW (1), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .ECC_ENABLE (0) + ) sem_ram_slave_agent ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .m0_address (sem_ram_slave_agent_m0_address), // m0.address + .m0_burstcount (sem_ram_slave_agent_m0_burstcount), // .burstcount + .m0_byteenable (sem_ram_slave_agent_m0_byteenable), // .byteenable + .m0_debugaccess (sem_ram_slave_agent_m0_debugaccess), // .debugaccess + .m0_lock (sem_ram_slave_agent_m0_lock), // .lock + .m0_readdata (sem_ram_slave_agent_m0_readdata), // .readdata + .m0_readdatavalid (sem_ram_slave_agent_m0_readdatavalid), // .readdatavalid + .m0_read (sem_ram_slave_agent_m0_read), // .read + .m0_waitrequest (sem_ram_slave_agent_m0_waitrequest), // .waitrequest + .m0_writedata (sem_ram_slave_agent_m0_writedata), // .writedata + .m0_write (sem_ram_slave_agent_m0_write), // .write + .rp_endofpacket (sem_ram_slave_agent_rp_endofpacket), // rp.endofpacket + .rp_ready (sem_ram_slave_agent_rp_ready), // .ready + .rp_valid (sem_ram_slave_agent_rp_valid), // .valid + .rp_data (sem_ram_slave_agent_rp_data), // .data + .rp_startofpacket (sem_ram_slave_agent_rp_startofpacket), // .startofpacket + .cp_ready (cmd_mux_003_src_ready), // cp.ready + .cp_valid (cmd_mux_003_src_valid), // .valid + .cp_data (cmd_mux_003_src_data), // .data + .cp_startofpacket (cmd_mux_003_src_startofpacket), // .startofpacket + .cp_endofpacket (cmd_mux_003_src_endofpacket), // .endofpacket + .cp_channel (cmd_mux_003_src_channel), // .channel + .rf_sink_ready (sem_ram_slave_agent_rsp_fifo_out_ready), // rf_sink.ready + .rf_sink_valid (sem_ram_slave_agent_rsp_fifo_out_valid), // .valid + .rf_sink_startofpacket (sem_ram_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket + .rf_sink_endofpacket (sem_ram_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket + .rf_sink_data (sem_ram_slave_agent_rsp_fifo_out_data), // .data + .rf_source_ready (sem_ram_slave_agent_rf_source_ready), // rf_source.ready + .rf_source_valid (sem_ram_slave_agent_rf_source_valid), // .valid + .rf_source_startofpacket (sem_ram_slave_agent_rf_source_startofpacket), // .startofpacket + .rf_source_endofpacket (sem_ram_slave_agent_rf_source_endofpacket), // .endofpacket + .rf_source_data (sem_ram_slave_agent_rf_source_data), // .data + .rdata_fifo_sink_ready (avalon_st_adapter_003_out_0_ready), // rdata_fifo_sink.ready + .rdata_fifo_sink_valid (avalon_st_adapter_003_out_0_valid), // .valid + .rdata_fifo_sink_data (avalon_st_adapter_003_out_0_data), // .data + .rdata_fifo_sink_error (avalon_st_adapter_003_out_0_error), // .error + .rdata_fifo_src_ready (sem_ram_slave_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready + .rdata_fifo_src_valid (sem_ram_slave_agent_rdata_fifo_src_valid), // .valid + .rdata_fifo_src_data (sem_ram_slave_agent_rdata_fifo_src_data), // .data + .m0_response (2'b00), // (terminated) + .m0_writeresponsevalid (1'b0) // (terminated) + ); + + altera_avalon_sc_fifo #( + .SYMBOLS_PER_BEAT (1), + .BITS_PER_SYMBOL (95), + .FIFO_DEPTH (2), + .CHANNEL_WIDTH (0), + .ERROR_WIDTH (0), + .USE_PACKETS (1), + .USE_FILL_LEVEL (0), + .EMPTY_LATENCY (1), + .USE_MEMORY_BLOCKS (0), + .USE_STORE_FORWARD (0), + .USE_ALMOST_FULL_IF (0), + .USE_ALMOST_EMPTY_IF (0) + ) sem_ram_slave_agent_rsp_fifo ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .in_data (sem_ram_slave_agent_rf_source_data), // in.data + .in_valid (sem_ram_slave_agent_rf_source_valid), // .valid + .in_ready (sem_ram_slave_agent_rf_source_ready), // .ready + .in_startofpacket (sem_ram_slave_agent_rf_source_startofpacket), // .startofpacket + .in_endofpacket (sem_ram_slave_agent_rf_source_endofpacket), // .endofpacket + .out_data (sem_ram_slave_agent_rsp_fifo_out_data), // out.data + .out_valid (sem_ram_slave_agent_rsp_fifo_out_valid), // .valid + .out_ready (sem_ram_slave_agent_rsp_fifo_out_ready), // .ready + .out_startofpacket (sem_ram_slave_agent_rsp_fifo_out_startofpacket), // .startofpacket + .out_endofpacket (sem_ram_slave_agent_rsp_fifo_out_endofpacket), // .endofpacket + .csr_address (2'b00), // (terminated) + .csr_read (1'b0), // (terminated) + .csr_write (1'b0), // (terminated) + .csr_readdata (), // (terminated) + .csr_writedata (32'b00000000000000000000000000000000), // (terminated) + .almost_full_data (), // (terminated) + .almost_empty_data (), // (terminated) + .in_empty (1'b0), // (terminated) + .out_empty (), // (terminated) + .in_error (1'b0), // (terminated) + .out_error (), // (terminated) + .in_channel (1'b0), // (terminated) + .out_channel () // (terminated) + ); + + altera_merlin_slave_agent #( + .PKT_ORI_BURST_SIZE_H (93), + .PKT_ORI_BURST_SIZE_L (91), + .PKT_RESPONSE_STATUS_H (90), + .PKT_RESPONSE_STATUS_L (89), + .PKT_BURST_SIZE_H (68), + .PKT_BURST_SIZE_L (66), + .PKT_TRANS_LOCK (58), + .PKT_BEGIN_BURST (73), + .PKT_PROTECTION_H (84), + .PKT_PROTECTION_L (82), + .PKT_BURSTWRAP_H (65), + .PKT_BURSTWRAP_L (63), + .PKT_BYTE_CNT_H (62), + .PKT_BYTE_CNT_L (60), + .PKT_ADDR_H (53), + .PKT_ADDR_L (36), + .PKT_TRANS_COMPRESSED_READ (54), + .PKT_TRANS_POSTED (55), + .PKT_TRANS_WRITE (56), + .PKT_TRANS_READ (57), + .PKT_DATA_H (31), + .PKT_DATA_L (0), + .PKT_BYTEEN_H (35), + .PKT_BYTEEN_L (32), + .PKT_SRC_ID_H (77), + .PKT_SRC_ID_L (75), + .PKT_DEST_ID_H (80), + .PKT_DEST_ID_L (78), + .PKT_SYMBOL_W (8), + .ST_CHANNEL_W (7), + .ST_DATA_W (94), + .AVS_BURSTCOUNT_W (3), + .SUPPRESS_0_BYTEEN_CMD (0), + .PREVENT_FIFO_OVERFLOW (1), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .ECC_ENABLE (0) + ) sys_clk_timer_s1_agent ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .m0_address (sys_clk_timer_s1_agent_m0_address), // m0.address + .m0_burstcount (sys_clk_timer_s1_agent_m0_burstcount), // .burstcount + .m0_byteenable (sys_clk_timer_s1_agent_m0_byteenable), // .byteenable + .m0_debugaccess (sys_clk_timer_s1_agent_m0_debugaccess), // .debugaccess + .m0_lock (sys_clk_timer_s1_agent_m0_lock), // .lock + .m0_readdata (sys_clk_timer_s1_agent_m0_readdata), // .readdata + .m0_readdatavalid (sys_clk_timer_s1_agent_m0_readdatavalid), // .readdatavalid + .m0_read (sys_clk_timer_s1_agent_m0_read), // .read + .m0_waitrequest (sys_clk_timer_s1_agent_m0_waitrequest), // .waitrequest + .m0_writedata (sys_clk_timer_s1_agent_m0_writedata), // .writedata + .m0_write (sys_clk_timer_s1_agent_m0_write), // .write + .rp_endofpacket (sys_clk_timer_s1_agent_rp_endofpacket), // rp.endofpacket + .rp_ready (sys_clk_timer_s1_agent_rp_ready), // .ready + .rp_valid (sys_clk_timer_s1_agent_rp_valid), // .valid + .rp_data (sys_clk_timer_s1_agent_rp_data), // .data + .rp_startofpacket (sys_clk_timer_s1_agent_rp_startofpacket), // .startofpacket + .cp_ready (cmd_mux_004_src_ready), // cp.ready + .cp_valid (cmd_mux_004_src_valid), // .valid + .cp_data (cmd_mux_004_src_data), // .data + .cp_startofpacket (cmd_mux_004_src_startofpacket), // .startofpacket + .cp_endofpacket (cmd_mux_004_src_endofpacket), // .endofpacket + .cp_channel (cmd_mux_004_src_channel), // .channel + .rf_sink_ready (sys_clk_timer_s1_agent_rsp_fifo_out_ready), // rf_sink.ready + .rf_sink_valid (sys_clk_timer_s1_agent_rsp_fifo_out_valid), // .valid + .rf_sink_startofpacket (sys_clk_timer_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket + .rf_sink_endofpacket (sys_clk_timer_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket + .rf_sink_data (sys_clk_timer_s1_agent_rsp_fifo_out_data), // .data + .rf_source_ready (sys_clk_timer_s1_agent_rf_source_ready), // rf_source.ready + .rf_source_valid (sys_clk_timer_s1_agent_rf_source_valid), // .valid + .rf_source_startofpacket (sys_clk_timer_s1_agent_rf_source_startofpacket), // .startofpacket + .rf_source_endofpacket (sys_clk_timer_s1_agent_rf_source_endofpacket), // .endofpacket + .rf_source_data (sys_clk_timer_s1_agent_rf_source_data), // .data + .rdata_fifo_sink_ready (avalon_st_adapter_004_out_0_ready), // rdata_fifo_sink.ready + .rdata_fifo_sink_valid (avalon_st_adapter_004_out_0_valid), // .valid + .rdata_fifo_sink_data (avalon_st_adapter_004_out_0_data), // .data + .rdata_fifo_sink_error (avalon_st_adapter_004_out_0_error), // .error + .rdata_fifo_src_ready (sys_clk_timer_s1_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready + .rdata_fifo_src_valid (sys_clk_timer_s1_agent_rdata_fifo_src_valid), // .valid + .rdata_fifo_src_data (sys_clk_timer_s1_agent_rdata_fifo_src_data), // .data + .m0_response (2'b00), // (terminated) + .m0_writeresponsevalid (1'b0) // (terminated) + ); + + altera_avalon_sc_fifo #( + .SYMBOLS_PER_BEAT (1), + .BITS_PER_SYMBOL (95), + .FIFO_DEPTH (2), + .CHANNEL_WIDTH (0), + .ERROR_WIDTH (0), + .USE_PACKETS (1), + .USE_FILL_LEVEL (0), + .EMPTY_LATENCY (1), + .USE_MEMORY_BLOCKS (0), + .USE_STORE_FORWARD (0), + .USE_ALMOST_FULL_IF (0), + .USE_ALMOST_EMPTY_IF (0) + ) sys_clk_timer_s1_agent_rsp_fifo ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .in_data (sys_clk_timer_s1_agent_rf_source_data), // in.data + .in_valid (sys_clk_timer_s1_agent_rf_source_valid), // .valid + .in_ready (sys_clk_timer_s1_agent_rf_source_ready), // .ready + .in_startofpacket (sys_clk_timer_s1_agent_rf_source_startofpacket), // .startofpacket + .in_endofpacket (sys_clk_timer_s1_agent_rf_source_endofpacket), // .endofpacket + .out_data (sys_clk_timer_s1_agent_rsp_fifo_out_data), // out.data + .out_valid (sys_clk_timer_s1_agent_rsp_fifo_out_valid), // .valid + .out_ready (sys_clk_timer_s1_agent_rsp_fifo_out_ready), // .ready + .out_startofpacket (sys_clk_timer_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket + .out_endofpacket (sys_clk_timer_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket + .csr_address (2'b00), // (terminated) + .csr_read (1'b0), // (terminated) + .csr_write (1'b0), // (terminated) + .csr_readdata (), // (terminated) + .csr_writedata (32'b00000000000000000000000000000000), // (terminated) + .almost_full_data (), // (terminated) + .almost_empty_data (), // (terminated) + .in_empty (1'b0), // (terminated) + .out_empty (), // (terminated) + .in_error (1'b0), // (terminated) + .out_error (), // (terminated) + .in_channel (1'b0), // (terminated) + .out_channel () // (terminated) + ); + + altera_merlin_slave_agent #( + .PKT_ORI_BURST_SIZE_H (93), + .PKT_ORI_BURST_SIZE_L (91), + .PKT_RESPONSE_STATUS_H (90), + .PKT_RESPONSE_STATUS_L (89), + .PKT_BURST_SIZE_H (68), + .PKT_BURST_SIZE_L (66), + .PKT_TRANS_LOCK (58), + .PKT_BEGIN_BURST (73), + .PKT_PROTECTION_H (84), + .PKT_PROTECTION_L (82), + .PKT_BURSTWRAP_H (65), + .PKT_BURSTWRAP_L (63), + .PKT_BYTE_CNT_H (62), + .PKT_BYTE_CNT_L (60), + .PKT_ADDR_H (53), + .PKT_ADDR_L (36), + .PKT_TRANS_COMPRESSED_READ (54), + .PKT_TRANS_POSTED (55), + .PKT_TRANS_WRITE (56), + .PKT_TRANS_READ (57), + .PKT_DATA_H (31), + .PKT_DATA_L (0), + .PKT_BYTEEN_H (35), + .PKT_BYTEEN_L (32), + .PKT_SRC_ID_H (77), + .PKT_SRC_ID_L (75), + .PKT_DEST_ID_H (80), + .PKT_DEST_ID_L (78), + .PKT_SYMBOL_W (8), + .ST_CHANNEL_W (7), + .ST_DATA_W (94), + .AVS_BURSTCOUNT_W (3), + .SUPPRESS_0_BYTEEN_CMD (0), + .PREVENT_FIFO_OVERFLOW (1), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .ECC_ENABLE (0) + ) mem_s2_agent ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .m0_address (mem_s2_agent_m0_address), // m0.address + .m0_burstcount (mem_s2_agent_m0_burstcount), // .burstcount + .m0_byteenable (mem_s2_agent_m0_byteenable), // .byteenable + .m0_debugaccess (mem_s2_agent_m0_debugaccess), // .debugaccess + .m0_lock (mem_s2_agent_m0_lock), // .lock + .m0_readdata (mem_s2_agent_m0_readdata), // .readdata + .m0_readdatavalid (mem_s2_agent_m0_readdatavalid), // .readdatavalid + .m0_read (mem_s2_agent_m0_read), // .read + .m0_waitrequest (mem_s2_agent_m0_waitrequest), // .waitrequest + .m0_writedata (mem_s2_agent_m0_writedata), // .writedata + .m0_write (mem_s2_agent_m0_write), // .write + .rp_endofpacket (mem_s2_agent_rp_endofpacket), // rp.endofpacket + .rp_ready (mem_s2_agent_rp_ready), // .ready + .rp_valid (mem_s2_agent_rp_valid), // .valid + .rp_data (mem_s2_agent_rp_data), // .data + .rp_startofpacket (mem_s2_agent_rp_startofpacket), // .startofpacket + .cp_ready (cmd_mux_005_src_ready), // cp.ready + .cp_valid (cmd_mux_005_src_valid), // .valid + .cp_data (cmd_mux_005_src_data), // .data + .cp_startofpacket (cmd_mux_005_src_startofpacket), // .startofpacket + .cp_endofpacket (cmd_mux_005_src_endofpacket), // .endofpacket + .cp_channel (cmd_mux_005_src_channel), // .channel + .rf_sink_ready (mem_s2_agent_rsp_fifo_out_ready), // rf_sink.ready + .rf_sink_valid (mem_s2_agent_rsp_fifo_out_valid), // .valid + .rf_sink_startofpacket (mem_s2_agent_rsp_fifo_out_startofpacket), // .startofpacket + .rf_sink_endofpacket (mem_s2_agent_rsp_fifo_out_endofpacket), // .endofpacket + .rf_sink_data (mem_s2_agent_rsp_fifo_out_data), // .data + .rf_source_ready (mem_s2_agent_rf_source_ready), // rf_source.ready + .rf_source_valid (mem_s2_agent_rf_source_valid), // .valid + .rf_source_startofpacket (mem_s2_agent_rf_source_startofpacket), // .startofpacket + .rf_source_endofpacket (mem_s2_agent_rf_source_endofpacket), // .endofpacket + .rf_source_data (mem_s2_agent_rf_source_data), // .data + .rdata_fifo_sink_ready (avalon_st_adapter_005_out_0_ready), // rdata_fifo_sink.ready + .rdata_fifo_sink_valid (avalon_st_adapter_005_out_0_valid), // .valid + .rdata_fifo_sink_data (avalon_st_adapter_005_out_0_data), // .data + .rdata_fifo_sink_error (avalon_st_adapter_005_out_0_error), // .error + .rdata_fifo_src_ready (mem_s2_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready + .rdata_fifo_src_valid (mem_s2_agent_rdata_fifo_src_valid), // .valid + .rdata_fifo_src_data (mem_s2_agent_rdata_fifo_src_data), // .data + .m0_response (2'b00), // (terminated) + .m0_writeresponsevalid (1'b0) // (terminated) + ); + + altera_avalon_sc_fifo #( + .SYMBOLS_PER_BEAT (1), + .BITS_PER_SYMBOL (95), + .FIFO_DEPTH (2), + .CHANNEL_WIDTH (0), + .ERROR_WIDTH (0), + .USE_PACKETS (1), + .USE_FILL_LEVEL (0), + .EMPTY_LATENCY (1), + .USE_MEMORY_BLOCKS (0), + .USE_STORE_FORWARD (0), + .USE_ALMOST_FULL_IF (0), + .USE_ALMOST_EMPTY_IF (0) + ) mem_s2_agent_rsp_fifo ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .in_data (mem_s2_agent_rf_source_data), // in.data + .in_valid (mem_s2_agent_rf_source_valid), // .valid + .in_ready (mem_s2_agent_rf_source_ready), // .ready + .in_startofpacket (mem_s2_agent_rf_source_startofpacket), // .startofpacket + .in_endofpacket (mem_s2_agent_rf_source_endofpacket), // .endofpacket + .out_data (mem_s2_agent_rsp_fifo_out_data), // out.data + .out_valid (mem_s2_agent_rsp_fifo_out_valid), // .valid + .out_ready (mem_s2_agent_rsp_fifo_out_ready), // .ready + .out_startofpacket (mem_s2_agent_rsp_fifo_out_startofpacket), // .startofpacket + .out_endofpacket (mem_s2_agent_rsp_fifo_out_endofpacket), // .endofpacket + .csr_address (2'b00), // (terminated) + .csr_read (1'b0), // (terminated) + .csr_write (1'b0), // (terminated) + .csr_readdata (), // (terminated) + .csr_writedata (32'b00000000000000000000000000000000), // (terminated) + .almost_full_data (), // (terminated) + .almost_empty_data (), // (terminated) + .in_empty (1'b0), // (terminated) + .out_empty (), // (terminated) + .in_error (1'b0), // (terminated) + .out_error (), // (terminated) + .in_channel (1'b0), // (terminated) + .out_channel () // (terminated) + ); + + altera_merlin_slave_agent #( + .PKT_ORI_BURST_SIZE_H (93), + .PKT_ORI_BURST_SIZE_L (91), + .PKT_RESPONSE_STATUS_H (90), + .PKT_RESPONSE_STATUS_L (89), + .PKT_BURST_SIZE_H (68), + .PKT_BURST_SIZE_L (66), + .PKT_TRANS_LOCK (58), + .PKT_BEGIN_BURST (73), + .PKT_PROTECTION_H (84), + .PKT_PROTECTION_L (82), + .PKT_BURSTWRAP_H (65), + .PKT_BURSTWRAP_L (63), + .PKT_BYTE_CNT_H (62), + .PKT_BYTE_CNT_L (60), + .PKT_ADDR_H (53), + .PKT_ADDR_L (36), + .PKT_TRANS_COMPRESSED_READ (54), + .PKT_TRANS_POSTED (55), + .PKT_TRANS_WRITE (56), + .PKT_TRANS_READ (57), + .PKT_DATA_H (31), + .PKT_DATA_L (0), + .PKT_BYTEEN_H (35), + .PKT_BYTEEN_L (32), + .PKT_SRC_ID_H (77), + .PKT_SRC_ID_L (75), + .PKT_DEST_ID_H (80), + .PKT_DEST_ID_L (78), + .PKT_SYMBOL_W (8), + .ST_CHANNEL_W (7), + .ST_DATA_W (94), + .AVS_BURSTCOUNT_W (3), + .SUPPRESS_0_BYTEEN_CMD (0), + .PREVENT_FIFO_OVERFLOW (1), + .USE_READRESPONSE (0), + .USE_WRITERESPONSE (0), + .ECC_ENABLE (0) + ) mem_s1_agent ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .m0_address (mem_s1_agent_m0_address), // m0.address + .m0_burstcount (mem_s1_agent_m0_burstcount), // .burstcount + .m0_byteenable (mem_s1_agent_m0_byteenable), // .byteenable + .m0_debugaccess (mem_s1_agent_m0_debugaccess), // .debugaccess + .m0_lock (mem_s1_agent_m0_lock), // .lock + .m0_readdata (mem_s1_agent_m0_readdata), // .readdata + .m0_readdatavalid (mem_s1_agent_m0_readdatavalid), // .readdatavalid + .m0_read (mem_s1_agent_m0_read), // .read + .m0_waitrequest (mem_s1_agent_m0_waitrequest), // .waitrequest + .m0_writedata (mem_s1_agent_m0_writedata), // .writedata + .m0_write (mem_s1_agent_m0_write), // .write + .rp_endofpacket (mem_s1_agent_rp_endofpacket), // rp.endofpacket + .rp_ready (mem_s1_agent_rp_ready), // .ready + .rp_valid (mem_s1_agent_rp_valid), // .valid + .rp_data (mem_s1_agent_rp_data), // .data + .rp_startofpacket (mem_s1_agent_rp_startofpacket), // .startofpacket + .cp_ready (cmd_mux_006_src_ready), // cp.ready + .cp_valid (cmd_mux_006_src_valid), // .valid + .cp_data (cmd_mux_006_src_data), // .data + .cp_startofpacket (cmd_mux_006_src_startofpacket), // .startofpacket + .cp_endofpacket (cmd_mux_006_src_endofpacket), // .endofpacket + .cp_channel (cmd_mux_006_src_channel), // .channel + .rf_sink_ready (mem_s1_agent_rsp_fifo_out_ready), // rf_sink.ready + .rf_sink_valid (mem_s1_agent_rsp_fifo_out_valid), // .valid + .rf_sink_startofpacket (mem_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket + .rf_sink_endofpacket (mem_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket + .rf_sink_data (mem_s1_agent_rsp_fifo_out_data), // .data + .rf_source_ready (mem_s1_agent_rf_source_ready), // rf_source.ready + .rf_source_valid (mem_s1_agent_rf_source_valid), // .valid + .rf_source_startofpacket (mem_s1_agent_rf_source_startofpacket), // .startofpacket + .rf_source_endofpacket (mem_s1_agent_rf_source_endofpacket), // .endofpacket + .rf_source_data (mem_s1_agent_rf_source_data), // .data + .rdata_fifo_sink_ready (avalon_st_adapter_006_out_0_ready), // rdata_fifo_sink.ready + .rdata_fifo_sink_valid (avalon_st_adapter_006_out_0_valid), // .valid + .rdata_fifo_sink_data (avalon_st_adapter_006_out_0_data), // .data + .rdata_fifo_sink_error (avalon_st_adapter_006_out_0_error), // .error + .rdata_fifo_src_ready (mem_s1_agent_rdata_fifo_src_ready), // rdata_fifo_src.ready + .rdata_fifo_src_valid (mem_s1_agent_rdata_fifo_src_valid), // .valid + .rdata_fifo_src_data (mem_s1_agent_rdata_fifo_src_data), // .data + .m0_response (2'b00), // (terminated) + .m0_writeresponsevalid (1'b0) // (terminated) + ); + + altera_avalon_sc_fifo #( + .SYMBOLS_PER_BEAT (1), + .BITS_PER_SYMBOL (95), + .FIFO_DEPTH (2), + .CHANNEL_WIDTH (0), + .ERROR_WIDTH (0), + .USE_PACKETS (1), + .USE_FILL_LEVEL (0), + .EMPTY_LATENCY (1), + .USE_MEMORY_BLOCKS (0), + .USE_STORE_FORWARD (0), + .USE_ALMOST_FULL_IF (0), + .USE_ALMOST_EMPTY_IF (0) + ) mem_s1_agent_rsp_fifo ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .in_data (mem_s1_agent_rf_source_data), // in.data + .in_valid (mem_s1_agent_rf_source_valid), // .valid + .in_ready (mem_s1_agent_rf_source_ready), // .ready + .in_startofpacket (mem_s1_agent_rf_source_startofpacket), // .startofpacket + .in_endofpacket (mem_s1_agent_rf_source_endofpacket), // .endofpacket + .out_data (mem_s1_agent_rsp_fifo_out_data), // out.data + .out_valid (mem_s1_agent_rsp_fifo_out_valid), // .valid + .out_ready (mem_s1_agent_rsp_fifo_out_ready), // .ready + .out_startofpacket (mem_s1_agent_rsp_fifo_out_startofpacket), // .startofpacket + .out_endofpacket (mem_s1_agent_rsp_fifo_out_endofpacket), // .endofpacket + .csr_address (2'b00), // (terminated) + .csr_read (1'b0), // (terminated) + .csr_write (1'b0), // (terminated) + .csr_readdata (), // (terminated) + .csr_writedata (32'b00000000000000000000000000000000), // (terminated) + .almost_full_data (), // (terminated) + .almost_empty_data (), // (terminated) + .in_empty (1'b0), // (terminated) + .out_empty (), // (terminated) + .in_error (1'b0), // (terminated) + .out_error (), // (terminated) + .in_channel (1'b0), // (terminated) + .out_channel () // (terminated) + ); + + niosII_mm_interconnect_0_router router ( + .sink_ready (cpu_data_master_agent_cp_ready), // sink.ready + .sink_valid (cpu_data_master_agent_cp_valid), // .valid + .sink_data (cpu_data_master_agent_cp_data), // .data + .sink_startofpacket (cpu_data_master_agent_cp_startofpacket), // .startofpacket + .sink_endofpacket (cpu_data_master_agent_cp_endofpacket), // .endofpacket + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (router_src_ready), // src.ready + .src_valid (router_src_valid), // .valid + .src_data (router_src_data), // .data + .src_channel (router_src_channel), // .channel + .src_startofpacket (router_src_startofpacket), // .startofpacket + .src_endofpacket (router_src_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_router_001 router_001 ( + .sink_ready (cpu_instruction_master_agent_cp_ready), // sink.ready + .sink_valid (cpu_instruction_master_agent_cp_valid), // .valid + .sink_data (cpu_instruction_master_agent_cp_data), // .data + .sink_startofpacket (cpu_instruction_master_agent_cp_startofpacket), // .startofpacket + .sink_endofpacket (cpu_instruction_master_agent_cp_endofpacket), // .endofpacket + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (router_001_src_ready), // src.ready + .src_valid (router_001_src_valid), // .valid + .src_data (router_001_src_data), // .data + .src_channel (router_001_src_channel), // .channel + .src_startofpacket (router_001_src_startofpacket), // .startofpacket + .src_endofpacket (router_001_src_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_router_002 router_002 ( + .sink_ready (jtag_uart_avalon_jtag_slave_agent_rp_ready), // sink.ready + .sink_valid (jtag_uart_avalon_jtag_slave_agent_rp_valid), // .valid + .sink_data (jtag_uart_avalon_jtag_slave_agent_rp_data), // .data + .sink_startofpacket (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket), // .startofpacket + .sink_endofpacket (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket), // .endofpacket + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (router_002_src_ready), // src.ready + .src_valid (router_002_src_valid), // .valid + .src_data (router_002_src_data), // .data + .src_channel (router_002_src_channel), // .channel + .src_startofpacket (router_002_src_startofpacket), // .startofpacket + .src_endofpacket (router_002_src_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_router_002 router_003 ( + .sink_ready (sem_ctl_slave_agent_rp_ready), // sink.ready + .sink_valid (sem_ctl_slave_agent_rp_valid), // .valid + .sink_data (sem_ctl_slave_agent_rp_data), // .data + .sink_startofpacket (sem_ctl_slave_agent_rp_startofpacket), // .startofpacket + .sink_endofpacket (sem_ctl_slave_agent_rp_endofpacket), // .endofpacket + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (router_003_src_ready), // src.ready + .src_valid (router_003_src_valid), // .valid + .src_data (router_003_src_data), // .data + .src_channel (router_003_src_channel), // .channel + .src_startofpacket (router_003_src_startofpacket), // .startofpacket + .src_endofpacket (router_003_src_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_router_004 router_004 ( + .sink_ready (cpu_debug_mem_slave_agent_rp_ready), // sink.ready + .sink_valid (cpu_debug_mem_slave_agent_rp_valid), // .valid + .sink_data (cpu_debug_mem_slave_agent_rp_data), // .data + .sink_startofpacket (cpu_debug_mem_slave_agent_rp_startofpacket), // .startofpacket + .sink_endofpacket (cpu_debug_mem_slave_agent_rp_endofpacket), // .endofpacket + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (router_004_src_ready), // src.ready + .src_valid (router_004_src_valid), // .valid + .src_data (router_004_src_data), // .data + .src_channel (router_004_src_channel), // .channel + .src_startofpacket (router_004_src_startofpacket), // .startofpacket + .src_endofpacket (router_004_src_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_router_002 router_005 ( + .sink_ready (sem_ram_slave_agent_rp_ready), // sink.ready + .sink_valid (sem_ram_slave_agent_rp_valid), // .valid + .sink_data (sem_ram_slave_agent_rp_data), // .data + .sink_startofpacket (sem_ram_slave_agent_rp_startofpacket), // .startofpacket + .sink_endofpacket (sem_ram_slave_agent_rp_endofpacket), // .endofpacket + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (router_005_src_ready), // src.ready + .src_valid (router_005_src_valid), // .valid + .src_data (router_005_src_data), // .data + .src_channel (router_005_src_channel), // .channel + .src_startofpacket (router_005_src_startofpacket), // .startofpacket + .src_endofpacket (router_005_src_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_router_002 router_006 ( + .sink_ready (sys_clk_timer_s1_agent_rp_ready), // sink.ready + .sink_valid (sys_clk_timer_s1_agent_rp_valid), // .valid + .sink_data (sys_clk_timer_s1_agent_rp_data), // .data + .sink_startofpacket (sys_clk_timer_s1_agent_rp_startofpacket), // .startofpacket + .sink_endofpacket (sys_clk_timer_s1_agent_rp_endofpacket), // .endofpacket + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (router_006_src_ready), // src.ready + .src_valid (router_006_src_valid), // .valid + .src_data (router_006_src_data), // .data + .src_channel (router_006_src_channel), // .channel + .src_startofpacket (router_006_src_startofpacket), // .startofpacket + .src_endofpacket (router_006_src_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_router_002 router_007 ( + .sink_ready (mem_s2_agent_rp_ready), // sink.ready + .sink_valid (mem_s2_agent_rp_valid), // .valid + .sink_data (mem_s2_agent_rp_data), // .data + .sink_startofpacket (mem_s2_agent_rp_startofpacket), // .startofpacket + .sink_endofpacket (mem_s2_agent_rp_endofpacket), // .endofpacket + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (router_007_src_ready), // src.ready + .src_valid (router_007_src_valid), // .valid + .src_data (router_007_src_data), // .data + .src_channel (router_007_src_channel), // .channel + .src_startofpacket (router_007_src_startofpacket), // .startofpacket + .src_endofpacket (router_007_src_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_router_008 router_008 ( + .sink_ready (mem_s1_agent_rp_ready), // sink.ready + .sink_valid (mem_s1_agent_rp_valid), // .valid + .sink_data (mem_s1_agent_rp_data), // .data + .sink_startofpacket (mem_s1_agent_rp_startofpacket), // .startofpacket + .sink_endofpacket (mem_s1_agent_rp_endofpacket), // .endofpacket + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (router_008_src_ready), // src.ready + .src_valid (router_008_src_valid), // .valid + .src_data (router_008_src_data), // .data + .src_channel (router_008_src_channel), // .channel + .src_startofpacket (router_008_src_startofpacket), // .startofpacket + .src_endofpacket (router_008_src_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_cmd_demux cmd_demux ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .sink_ready (router_src_ready), // sink.ready + .sink_channel (router_src_channel), // .channel + .sink_data (router_src_data), // .data + .sink_startofpacket (router_src_startofpacket), // .startofpacket + .sink_endofpacket (router_src_endofpacket), // .endofpacket + .sink_valid (router_src_valid), // .valid + .src0_ready (cmd_demux_src0_ready), // src0.ready + .src0_valid (cmd_demux_src0_valid), // .valid + .src0_data (cmd_demux_src0_data), // .data + .src0_channel (cmd_demux_src0_channel), // .channel + .src0_startofpacket (cmd_demux_src0_startofpacket), // .startofpacket + .src0_endofpacket (cmd_demux_src0_endofpacket), // .endofpacket + .src1_ready (cmd_demux_src1_ready), // src1.ready + .src1_valid (cmd_demux_src1_valid), // .valid + .src1_data (cmd_demux_src1_data), // .data + .src1_channel (cmd_demux_src1_channel), // .channel + .src1_startofpacket (cmd_demux_src1_startofpacket), // .startofpacket + .src1_endofpacket (cmd_demux_src1_endofpacket), // .endofpacket + .src2_ready (cmd_demux_src2_ready), // src2.ready + .src2_valid (cmd_demux_src2_valid), // .valid + .src2_data (cmd_demux_src2_data), // .data + .src2_channel (cmd_demux_src2_channel), // .channel + .src2_startofpacket (cmd_demux_src2_startofpacket), // .startofpacket + .src2_endofpacket (cmd_demux_src2_endofpacket), // .endofpacket + .src3_ready (cmd_demux_src3_ready), // src3.ready + .src3_valid (cmd_demux_src3_valid), // .valid + .src3_data (cmd_demux_src3_data), // .data + .src3_channel (cmd_demux_src3_channel), // .channel + .src3_startofpacket (cmd_demux_src3_startofpacket), // .startofpacket + .src3_endofpacket (cmd_demux_src3_endofpacket), // .endofpacket + .src4_ready (cmd_demux_src4_ready), // src4.ready + .src4_valid (cmd_demux_src4_valid), // .valid + .src4_data (cmd_demux_src4_data), // .data + .src4_channel (cmd_demux_src4_channel), // .channel + .src4_startofpacket (cmd_demux_src4_startofpacket), // .startofpacket + .src4_endofpacket (cmd_demux_src4_endofpacket), // .endofpacket + .src5_ready (cmd_demux_src5_ready), // src5.ready + .src5_valid (cmd_demux_src5_valid), // .valid + .src5_data (cmd_demux_src5_data), // .data + .src5_channel (cmd_demux_src5_channel), // .channel + .src5_startofpacket (cmd_demux_src5_startofpacket), // .startofpacket + .src5_endofpacket (cmd_demux_src5_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_cmd_demux_001 cmd_demux_001 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .sink_ready (router_001_src_ready), // sink.ready + .sink_channel (router_001_src_channel), // .channel + .sink_data (router_001_src_data), // .data + .sink_startofpacket (router_001_src_startofpacket), // .startofpacket + .sink_endofpacket (router_001_src_endofpacket), // .endofpacket + .sink_valid (router_001_src_valid), // .valid + .src0_ready (cmd_demux_001_src0_ready), // src0.ready + .src0_valid (cmd_demux_001_src0_valid), // .valid + .src0_data (cmd_demux_001_src0_data), // .data + .src0_channel (cmd_demux_001_src0_channel), // .channel + .src0_startofpacket (cmd_demux_001_src0_startofpacket), // .startofpacket + .src0_endofpacket (cmd_demux_001_src0_endofpacket), // .endofpacket + .src1_ready (cmd_demux_001_src1_ready), // src1.ready + .src1_valid (cmd_demux_001_src1_valid), // .valid + .src1_data (cmd_demux_001_src1_data), // .data + .src1_channel (cmd_demux_001_src1_channel), // .channel + .src1_startofpacket (cmd_demux_001_src1_startofpacket), // .startofpacket + .src1_endofpacket (cmd_demux_001_src1_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_cmd_mux cmd_mux ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (cmd_mux_src_ready), // src.ready + .src_valid (cmd_mux_src_valid), // .valid + .src_data (cmd_mux_src_data), // .data + .src_channel (cmd_mux_src_channel), // .channel + .src_startofpacket (cmd_mux_src_startofpacket), // .startofpacket + .src_endofpacket (cmd_mux_src_endofpacket), // .endofpacket + .sink0_ready (cmd_demux_src0_ready), // sink0.ready + .sink0_valid (cmd_demux_src0_valid), // .valid + .sink0_channel (cmd_demux_src0_channel), // .channel + .sink0_data (cmd_demux_src0_data), // .data + .sink0_startofpacket (cmd_demux_src0_startofpacket), // .startofpacket + .sink0_endofpacket (cmd_demux_src0_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_cmd_mux cmd_mux_001 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (cmd_mux_001_src_ready), // src.ready + .src_valid (cmd_mux_001_src_valid), // .valid + .src_data (cmd_mux_001_src_data), // .data + .src_channel (cmd_mux_001_src_channel), // .channel + .src_startofpacket (cmd_mux_001_src_startofpacket), // .startofpacket + .src_endofpacket (cmd_mux_001_src_endofpacket), // .endofpacket + .sink0_ready (cmd_demux_src1_ready), // sink0.ready + .sink0_valid (cmd_demux_src1_valid), // .valid + .sink0_channel (cmd_demux_src1_channel), // .channel + .sink0_data (cmd_demux_src1_data), // .data + .sink0_startofpacket (cmd_demux_src1_startofpacket), // .startofpacket + .sink0_endofpacket (cmd_demux_src1_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_cmd_mux_002 cmd_mux_002 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (cmd_mux_002_src_ready), // src.ready + .src_valid (cmd_mux_002_src_valid), // .valid + .src_data (cmd_mux_002_src_data), // .data + .src_channel (cmd_mux_002_src_channel), // .channel + .src_startofpacket (cmd_mux_002_src_startofpacket), // .startofpacket + .src_endofpacket (cmd_mux_002_src_endofpacket), // .endofpacket + .sink0_ready (cmd_demux_src2_ready), // sink0.ready + .sink0_valid (cmd_demux_src2_valid), // .valid + .sink0_channel (cmd_demux_src2_channel), // .channel + .sink0_data (cmd_demux_src2_data), // .data + .sink0_startofpacket (cmd_demux_src2_startofpacket), // .startofpacket + .sink0_endofpacket (cmd_demux_src2_endofpacket), // .endofpacket + .sink1_ready (cmd_demux_001_src0_ready), // sink1.ready + .sink1_valid (cmd_demux_001_src0_valid), // .valid + .sink1_channel (cmd_demux_001_src0_channel), // .channel + .sink1_data (cmd_demux_001_src0_data), // .data + .sink1_startofpacket (cmd_demux_001_src0_startofpacket), // .startofpacket + .sink1_endofpacket (cmd_demux_001_src0_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_cmd_mux cmd_mux_003 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (cmd_mux_003_src_ready), // src.ready + .src_valid (cmd_mux_003_src_valid), // .valid + .src_data (cmd_mux_003_src_data), // .data + .src_channel (cmd_mux_003_src_channel), // .channel + .src_startofpacket (cmd_mux_003_src_startofpacket), // .startofpacket + .src_endofpacket (cmd_mux_003_src_endofpacket), // .endofpacket + .sink0_ready (cmd_demux_src3_ready), // sink0.ready + .sink0_valid (cmd_demux_src3_valid), // .valid + .sink0_channel (cmd_demux_src3_channel), // .channel + .sink0_data (cmd_demux_src3_data), // .data + .sink0_startofpacket (cmd_demux_src3_startofpacket), // .startofpacket + .sink0_endofpacket (cmd_demux_src3_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_cmd_mux cmd_mux_004 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (cmd_mux_004_src_ready), // src.ready + .src_valid (cmd_mux_004_src_valid), // .valid + .src_data (cmd_mux_004_src_data), // .data + .src_channel (cmd_mux_004_src_channel), // .channel + .src_startofpacket (cmd_mux_004_src_startofpacket), // .startofpacket + .src_endofpacket (cmd_mux_004_src_endofpacket), // .endofpacket + .sink0_ready (cmd_demux_src4_ready), // sink0.ready + .sink0_valid (cmd_demux_src4_valid), // .valid + .sink0_channel (cmd_demux_src4_channel), // .channel + .sink0_data (cmd_demux_src4_data), // .data + .sink0_startofpacket (cmd_demux_src4_startofpacket), // .startofpacket + .sink0_endofpacket (cmd_demux_src4_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_cmd_mux cmd_mux_005 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (cmd_mux_005_src_ready), // src.ready + .src_valid (cmd_mux_005_src_valid), // .valid + .src_data (cmd_mux_005_src_data), // .data + .src_channel (cmd_mux_005_src_channel), // .channel + .src_startofpacket (cmd_mux_005_src_startofpacket), // .startofpacket + .src_endofpacket (cmd_mux_005_src_endofpacket), // .endofpacket + .sink0_ready (cmd_demux_src5_ready), // sink0.ready + .sink0_valid (cmd_demux_src5_valid), // .valid + .sink0_channel (cmd_demux_src5_channel), // .channel + .sink0_data (cmd_demux_src5_data), // .data + .sink0_startofpacket (cmd_demux_src5_startofpacket), // .startofpacket + .sink0_endofpacket (cmd_demux_src5_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_cmd_mux cmd_mux_006 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (cmd_mux_006_src_ready), // src.ready + .src_valid (cmd_mux_006_src_valid), // .valid + .src_data (cmd_mux_006_src_data), // .data + .src_channel (cmd_mux_006_src_channel), // .channel + .src_startofpacket (cmd_mux_006_src_startofpacket), // .startofpacket + .src_endofpacket (cmd_mux_006_src_endofpacket), // .endofpacket + .sink0_ready (cmd_demux_001_src1_ready), // sink0.ready + .sink0_valid (cmd_demux_001_src1_valid), // .valid + .sink0_channel (cmd_demux_001_src1_channel), // .channel + .sink0_data (cmd_demux_001_src1_data), // .data + .sink0_startofpacket (cmd_demux_001_src1_startofpacket), // .startofpacket + .sink0_endofpacket (cmd_demux_001_src1_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_rsp_demux rsp_demux ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .sink_ready (router_002_src_ready), // sink.ready + .sink_channel (router_002_src_channel), // .channel + .sink_data (router_002_src_data), // .data + .sink_startofpacket (router_002_src_startofpacket), // .startofpacket + .sink_endofpacket (router_002_src_endofpacket), // .endofpacket + .sink_valid (router_002_src_valid), // .valid + .src0_ready (rsp_demux_src0_ready), // src0.ready + .src0_valid (rsp_demux_src0_valid), // .valid + .src0_data (rsp_demux_src0_data), // .data + .src0_channel (rsp_demux_src0_channel), // .channel + .src0_startofpacket (rsp_demux_src0_startofpacket), // .startofpacket + .src0_endofpacket (rsp_demux_src0_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_rsp_demux rsp_demux_001 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .sink_ready (router_003_src_ready), // sink.ready + .sink_channel (router_003_src_channel), // .channel + .sink_data (router_003_src_data), // .data + .sink_startofpacket (router_003_src_startofpacket), // .startofpacket + .sink_endofpacket (router_003_src_endofpacket), // .endofpacket + .sink_valid (router_003_src_valid), // .valid + .src0_ready (rsp_demux_001_src0_ready), // src0.ready + .src0_valid (rsp_demux_001_src0_valid), // .valid + .src0_data (rsp_demux_001_src0_data), // .data + .src0_channel (rsp_demux_001_src0_channel), // .channel + .src0_startofpacket (rsp_demux_001_src0_startofpacket), // .startofpacket + .src0_endofpacket (rsp_demux_001_src0_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_cmd_demux_001 rsp_demux_002 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .sink_ready (router_004_src_ready), // sink.ready + .sink_channel (router_004_src_channel), // .channel + .sink_data (router_004_src_data), // .data + .sink_startofpacket (router_004_src_startofpacket), // .startofpacket + .sink_endofpacket (router_004_src_endofpacket), // .endofpacket + .sink_valid (router_004_src_valid), // .valid + .src0_ready (rsp_demux_002_src0_ready), // src0.ready + .src0_valid (rsp_demux_002_src0_valid), // .valid + .src0_data (rsp_demux_002_src0_data), // .data + .src0_channel (rsp_demux_002_src0_channel), // .channel + .src0_startofpacket (rsp_demux_002_src0_startofpacket), // .startofpacket + .src0_endofpacket (rsp_demux_002_src0_endofpacket), // .endofpacket + .src1_ready (rsp_demux_002_src1_ready), // src1.ready + .src1_valid (rsp_demux_002_src1_valid), // .valid + .src1_data (rsp_demux_002_src1_data), // .data + .src1_channel (rsp_demux_002_src1_channel), // .channel + .src1_startofpacket (rsp_demux_002_src1_startofpacket), // .startofpacket + .src1_endofpacket (rsp_demux_002_src1_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_rsp_demux rsp_demux_003 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .sink_ready (router_005_src_ready), // sink.ready + .sink_channel (router_005_src_channel), // .channel + .sink_data (router_005_src_data), // .data + .sink_startofpacket (router_005_src_startofpacket), // .startofpacket + .sink_endofpacket (router_005_src_endofpacket), // .endofpacket + .sink_valid (router_005_src_valid), // .valid + .src0_ready (rsp_demux_003_src0_ready), // src0.ready + .src0_valid (rsp_demux_003_src0_valid), // .valid + .src0_data (rsp_demux_003_src0_data), // .data + .src0_channel (rsp_demux_003_src0_channel), // .channel + .src0_startofpacket (rsp_demux_003_src0_startofpacket), // .startofpacket + .src0_endofpacket (rsp_demux_003_src0_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_rsp_demux rsp_demux_004 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .sink_ready (router_006_src_ready), // sink.ready + .sink_channel (router_006_src_channel), // .channel + .sink_data (router_006_src_data), // .data + .sink_startofpacket (router_006_src_startofpacket), // .startofpacket + .sink_endofpacket (router_006_src_endofpacket), // .endofpacket + .sink_valid (router_006_src_valid), // .valid + .src0_ready (rsp_demux_004_src0_ready), // src0.ready + .src0_valid (rsp_demux_004_src0_valid), // .valid + .src0_data (rsp_demux_004_src0_data), // .data + .src0_channel (rsp_demux_004_src0_channel), // .channel + .src0_startofpacket (rsp_demux_004_src0_startofpacket), // .startofpacket + .src0_endofpacket (rsp_demux_004_src0_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_rsp_demux rsp_demux_005 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .sink_ready (router_007_src_ready), // sink.ready + .sink_channel (router_007_src_channel), // .channel + .sink_data (router_007_src_data), // .data + .sink_startofpacket (router_007_src_startofpacket), // .startofpacket + .sink_endofpacket (router_007_src_endofpacket), // .endofpacket + .sink_valid (router_007_src_valid), // .valid + .src0_ready (rsp_demux_005_src0_ready), // src0.ready + .src0_valid (rsp_demux_005_src0_valid), // .valid + .src0_data (rsp_demux_005_src0_data), // .data + .src0_channel (rsp_demux_005_src0_channel), // .channel + .src0_startofpacket (rsp_demux_005_src0_startofpacket), // .startofpacket + .src0_endofpacket (rsp_demux_005_src0_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_rsp_demux rsp_demux_006 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .sink_ready (router_008_src_ready), // sink.ready + .sink_channel (router_008_src_channel), // .channel + .sink_data (router_008_src_data), // .data + .sink_startofpacket (router_008_src_startofpacket), // .startofpacket + .sink_endofpacket (router_008_src_endofpacket), // .endofpacket + .sink_valid (router_008_src_valid), // .valid + .src0_ready (rsp_demux_006_src0_ready), // src0.ready + .src0_valid (rsp_demux_006_src0_valid), // .valid + .src0_data (rsp_demux_006_src0_data), // .data + .src0_channel (rsp_demux_006_src0_channel), // .channel + .src0_startofpacket (rsp_demux_006_src0_startofpacket), // .startofpacket + .src0_endofpacket (rsp_demux_006_src0_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_rsp_mux rsp_mux ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (rsp_mux_src_ready), // src.ready + .src_valid (rsp_mux_src_valid), // .valid + .src_data (rsp_mux_src_data), // .data + .src_channel (rsp_mux_src_channel), // .channel + .src_startofpacket (rsp_mux_src_startofpacket), // .startofpacket + .src_endofpacket (rsp_mux_src_endofpacket), // .endofpacket + .sink0_ready (rsp_demux_src0_ready), // sink0.ready + .sink0_valid (rsp_demux_src0_valid), // .valid + .sink0_channel (rsp_demux_src0_channel), // .channel + .sink0_data (rsp_demux_src0_data), // .data + .sink0_startofpacket (rsp_demux_src0_startofpacket), // .startofpacket + .sink0_endofpacket (rsp_demux_src0_endofpacket), // .endofpacket + .sink1_ready (rsp_demux_001_src0_ready), // sink1.ready + .sink1_valid (rsp_demux_001_src0_valid), // .valid + .sink1_channel (rsp_demux_001_src0_channel), // .channel + .sink1_data (rsp_demux_001_src0_data), // .data + .sink1_startofpacket (rsp_demux_001_src0_startofpacket), // .startofpacket + .sink1_endofpacket (rsp_demux_001_src0_endofpacket), // .endofpacket + .sink2_ready (rsp_demux_002_src0_ready), // sink2.ready + .sink2_valid (rsp_demux_002_src0_valid), // .valid + .sink2_channel (rsp_demux_002_src0_channel), // .channel + .sink2_data (rsp_demux_002_src0_data), // .data + .sink2_startofpacket (rsp_demux_002_src0_startofpacket), // .startofpacket + .sink2_endofpacket (rsp_demux_002_src0_endofpacket), // .endofpacket + .sink3_ready (rsp_demux_003_src0_ready), // sink3.ready + .sink3_valid (rsp_demux_003_src0_valid), // .valid + .sink3_channel (rsp_demux_003_src0_channel), // .channel + .sink3_data (rsp_demux_003_src0_data), // .data + .sink3_startofpacket (rsp_demux_003_src0_startofpacket), // .startofpacket + .sink3_endofpacket (rsp_demux_003_src0_endofpacket), // .endofpacket + .sink4_ready (rsp_demux_004_src0_ready), // sink4.ready + .sink4_valid (rsp_demux_004_src0_valid), // .valid + .sink4_channel (rsp_demux_004_src0_channel), // .channel + .sink4_data (rsp_demux_004_src0_data), // .data + .sink4_startofpacket (rsp_demux_004_src0_startofpacket), // .startofpacket + .sink4_endofpacket (rsp_demux_004_src0_endofpacket), // .endofpacket + .sink5_ready (rsp_demux_005_src0_ready), // sink5.ready + .sink5_valid (rsp_demux_005_src0_valid), // .valid + .sink5_channel (rsp_demux_005_src0_channel), // .channel + .sink5_data (rsp_demux_005_src0_data), // .data + .sink5_startofpacket (rsp_demux_005_src0_startofpacket), // .startofpacket + .sink5_endofpacket (rsp_demux_005_src0_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_rsp_mux_001 rsp_mux_001 ( + .clk (clk_clk_clk), // clk.clk + .reset (cpu_reset_reset_bridge_in_reset_reset), // clk_reset.reset + .src_ready (rsp_mux_001_src_ready), // src.ready + .src_valid (rsp_mux_001_src_valid), // .valid + .src_data (rsp_mux_001_src_data), // .data + .src_channel (rsp_mux_001_src_channel), // .channel + .src_startofpacket (rsp_mux_001_src_startofpacket), // .startofpacket + .src_endofpacket (rsp_mux_001_src_endofpacket), // .endofpacket + .sink0_ready (rsp_demux_002_src1_ready), // sink0.ready + .sink0_valid (rsp_demux_002_src1_valid), // .valid + .sink0_channel (rsp_demux_002_src1_channel), // .channel + .sink0_data (rsp_demux_002_src1_data), // .data + .sink0_startofpacket (rsp_demux_002_src1_startofpacket), // .startofpacket + .sink0_endofpacket (rsp_demux_002_src1_endofpacket), // .endofpacket + .sink1_ready (rsp_demux_006_src0_ready), // sink1.ready + .sink1_valid (rsp_demux_006_src0_valid), // .valid + .sink1_channel (rsp_demux_006_src0_channel), // .channel + .sink1_data (rsp_demux_006_src0_data), // .data + .sink1_startofpacket (rsp_demux_006_src0_startofpacket), // .startofpacket + .sink1_endofpacket (rsp_demux_006_src0_endofpacket) // .endofpacket + ); + + niosII_mm_interconnect_0_avalon_st_adapter #( + .inBitsPerSymbol (34), + .inUsePackets (0), + .inDataWidth (34), + .inChannelWidth (0), + .inErrorWidth (0), + .inUseEmptyPort (0), + .inUseValid (1), + .inUseReady (1), + .inReadyLatency (0), + .outDataWidth (34), + .outChannelWidth (0), + .outErrorWidth (1), + .outUseEmptyPort (0), + .outUseValid (1), + .outUseReady (1), + .outReadyLatency (0) + ) avalon_st_adapter ( + .in_clk_0_clk (clk_clk_clk), // in_clk_0.clk + .in_rst_0_reset (cpu_reset_reset_bridge_in_reset_reset), // in_rst_0.reset + .in_0_data (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data), // in_0.data + .in_0_valid (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid), // .valid + .in_0_ready (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready), // .ready + .out_0_data (avalon_st_adapter_out_0_data), // out_0.data + .out_0_valid (avalon_st_adapter_out_0_valid), // .valid + .out_0_ready (avalon_st_adapter_out_0_ready), // .ready + .out_0_error (avalon_st_adapter_out_0_error) // .error + ); + + niosII_mm_interconnect_0_avalon_st_adapter #( + .inBitsPerSymbol (34), + .inUsePackets (0), + .inDataWidth (34), + .inChannelWidth (0), + .inErrorWidth (0), + .inUseEmptyPort (0), + .inUseValid (1), + .inUseReady (1), + .inReadyLatency (0), + .outDataWidth (34), + .outChannelWidth (0), + .outErrorWidth (1), + .outUseEmptyPort (0), + .outUseValid (1), + .outUseReady (1), + .outReadyLatency (0) + ) avalon_st_adapter_001 ( + .in_clk_0_clk (clk_clk_clk), // in_clk_0.clk + .in_rst_0_reset (cpu_reset_reset_bridge_in_reset_reset), // in_rst_0.reset + .in_0_data (sem_ctl_slave_agent_rdata_fifo_src_data), // in_0.data + .in_0_valid (sem_ctl_slave_agent_rdata_fifo_src_valid), // .valid + .in_0_ready (sem_ctl_slave_agent_rdata_fifo_src_ready), // .ready + .out_0_data (avalon_st_adapter_001_out_0_data), // out_0.data + .out_0_valid (avalon_st_adapter_001_out_0_valid), // .valid + .out_0_ready (avalon_st_adapter_001_out_0_ready), // .ready + .out_0_error (avalon_st_adapter_001_out_0_error) // .error + ); + + niosII_mm_interconnect_0_avalon_st_adapter #( + .inBitsPerSymbol (34), + .inUsePackets (0), + .inDataWidth (34), + .inChannelWidth (0), + .inErrorWidth (0), + .inUseEmptyPort (0), + .inUseValid (1), + .inUseReady (1), + .inReadyLatency (0), + .outDataWidth (34), + .outChannelWidth (0), + .outErrorWidth (1), + .outUseEmptyPort (0), + .outUseValid (1), + .outUseReady (1), + .outReadyLatency (0) + ) avalon_st_adapter_002 ( + .in_clk_0_clk (clk_clk_clk), // in_clk_0.clk + .in_rst_0_reset (cpu_reset_reset_bridge_in_reset_reset), // in_rst_0.reset + .in_0_data (cpu_debug_mem_slave_agent_rdata_fifo_src_data), // in_0.data + .in_0_valid (cpu_debug_mem_slave_agent_rdata_fifo_src_valid), // .valid + .in_0_ready (cpu_debug_mem_slave_agent_rdata_fifo_src_ready), // .ready + .out_0_data (avalon_st_adapter_002_out_0_data), // out_0.data + .out_0_valid (avalon_st_adapter_002_out_0_valid), // .valid + .out_0_ready (avalon_st_adapter_002_out_0_ready), // .ready + .out_0_error (avalon_st_adapter_002_out_0_error) // .error + ); + + niosII_mm_interconnect_0_avalon_st_adapter #( + .inBitsPerSymbol (34), + .inUsePackets (0), + .inDataWidth (34), + .inChannelWidth (0), + .inErrorWidth (0), + .inUseEmptyPort (0), + .inUseValid (1), + .inUseReady (1), + .inReadyLatency (0), + .outDataWidth (34), + .outChannelWidth (0), + .outErrorWidth (1), + .outUseEmptyPort (0), + .outUseValid (1), + .outUseReady (1), + .outReadyLatency (0) + ) avalon_st_adapter_003 ( + .in_clk_0_clk (clk_clk_clk), // in_clk_0.clk + .in_rst_0_reset (cpu_reset_reset_bridge_in_reset_reset), // in_rst_0.reset + .in_0_data (sem_ram_slave_agent_rdata_fifo_src_data), // in_0.data + .in_0_valid (sem_ram_slave_agent_rdata_fifo_src_valid), // .valid + .in_0_ready (sem_ram_slave_agent_rdata_fifo_src_ready), // .ready + .out_0_data (avalon_st_adapter_003_out_0_data), // out_0.data + .out_0_valid (avalon_st_adapter_003_out_0_valid), // .valid + .out_0_ready (avalon_st_adapter_003_out_0_ready), // .ready + .out_0_error (avalon_st_adapter_003_out_0_error) // .error + ); + + niosII_mm_interconnect_0_avalon_st_adapter #( + .inBitsPerSymbol (34), + .inUsePackets (0), + .inDataWidth (34), + .inChannelWidth (0), + .inErrorWidth (0), + .inUseEmptyPort (0), + .inUseValid (1), + .inUseReady (1), + .inReadyLatency (0), + .outDataWidth (34), + .outChannelWidth (0), + .outErrorWidth (1), + .outUseEmptyPort (0), + .outUseValid (1), + .outUseReady (1), + .outReadyLatency (0) + ) avalon_st_adapter_004 ( + .in_clk_0_clk (clk_clk_clk), // in_clk_0.clk + .in_rst_0_reset (cpu_reset_reset_bridge_in_reset_reset), // in_rst_0.reset + .in_0_data (sys_clk_timer_s1_agent_rdata_fifo_src_data), // in_0.data + .in_0_valid (sys_clk_timer_s1_agent_rdata_fifo_src_valid), // .valid + .in_0_ready (sys_clk_timer_s1_agent_rdata_fifo_src_ready), // .ready + .out_0_data (avalon_st_adapter_004_out_0_data), // out_0.data + .out_0_valid (avalon_st_adapter_004_out_0_valid), // .valid + .out_0_ready (avalon_st_adapter_004_out_0_ready), // .ready + .out_0_error (avalon_st_adapter_004_out_0_error) // .error + ); + + niosII_mm_interconnect_0_avalon_st_adapter #( + .inBitsPerSymbol (34), + .inUsePackets (0), + .inDataWidth (34), + .inChannelWidth (0), + .inErrorWidth (0), + .inUseEmptyPort (0), + .inUseValid (1), + .inUseReady (1), + .inReadyLatency (0), + .outDataWidth (34), + .outChannelWidth (0), + .outErrorWidth (1), + .outUseEmptyPort (0), + .outUseValid (1), + .outUseReady (1), + .outReadyLatency (0) + ) avalon_st_adapter_005 ( + .in_clk_0_clk (clk_clk_clk), // in_clk_0.clk + .in_rst_0_reset (cpu_reset_reset_bridge_in_reset_reset), // in_rst_0.reset + .in_0_data (mem_s2_agent_rdata_fifo_src_data), // in_0.data + .in_0_valid (mem_s2_agent_rdata_fifo_src_valid), // .valid + .in_0_ready (mem_s2_agent_rdata_fifo_src_ready), // .ready + .out_0_data (avalon_st_adapter_005_out_0_data), // out_0.data + .out_0_valid (avalon_st_adapter_005_out_0_valid), // .valid + .out_0_ready (avalon_st_adapter_005_out_0_ready), // .ready + .out_0_error (avalon_st_adapter_005_out_0_error) // .error + ); + + niosII_mm_interconnect_0_avalon_st_adapter #( + .inBitsPerSymbol (34), + .inUsePackets (0), + .inDataWidth (34), + .inChannelWidth (0), + .inErrorWidth (0), + .inUseEmptyPort (0), + .inUseValid (1), + .inUseReady (1), + .inReadyLatency (0), + .outDataWidth (34), + .outChannelWidth (0), + .outErrorWidth (1), + .outUseEmptyPort (0), + .outUseValid (1), + .outUseReady (1), + .outReadyLatency (0) + ) avalon_st_adapter_006 ( + .in_clk_0_clk (clk_clk_clk), // in_clk_0.clk + .in_rst_0_reset (cpu_reset_reset_bridge_in_reset_reset), // in_rst_0.reset + .in_0_data (mem_s1_agent_rdata_fifo_src_data), // in_0.data + .in_0_valid (mem_s1_agent_rdata_fifo_src_valid), // .valid + .in_0_ready (mem_s1_agent_rdata_fifo_src_ready), // .ready + .out_0_data (avalon_st_adapter_006_out_0_data), // out_0.data + .out_0_valid (avalon_st_adapter_006_out_0_valid), // .valid + .out_0_ready (avalon_st_adapter_006_out_0_ready), // .ready + .out_0_error (avalon_st_adapter_006_out_0_error) // .error + ); + +endmodule diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_avalon_st_adapter.v b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_avalon_st_adapter.v new file mode 100644 index 0000000..e548fe7 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_avalon_st_adapter.v @@ -0,0 +1,202 @@ +// niosII_mm_interconnect_0_avalon_st_adapter.v + +// This file was auto-generated from altera_avalon_st_adapter_hw.tcl. If you edit it your changes +// will probably be lost. +// +// Generated using ACDS version 18.1 625 + +`timescale 1 ps / 1 ps +module niosII_mm_interconnect_0_avalon_st_adapter #( + parameter inBitsPerSymbol = 34, + parameter inUsePackets = 0, + parameter inDataWidth = 34, + parameter inChannelWidth = 0, + parameter inErrorWidth = 0, + parameter inUseEmptyPort = 0, + parameter inUseValid = 1, + parameter inUseReady = 1, + parameter inReadyLatency = 0, + parameter outDataWidth = 34, + parameter outChannelWidth = 0, + parameter outErrorWidth = 1, + parameter outUseEmptyPort = 0, + parameter outUseValid = 1, + parameter outUseReady = 1, + parameter outReadyLatency = 0 + ) ( + input wire in_clk_0_clk, // in_clk_0.clk + input wire in_rst_0_reset, // in_rst_0.reset + input wire [33:0] in_0_data, // in_0.data + input wire in_0_valid, // .valid + output wire in_0_ready, // .ready + output wire [33:0] out_0_data, // out_0.data + output wire out_0_valid, // .valid + input wire out_0_ready, // .ready + output wire [0:0] out_0_error // .error + ); + + generate + // If any of the display statements (or deliberately broken + // instantiations) within this generate block triggers then this module + // has been instantiated this module with a set of parameters different + // from those it was generated for. This will usually result in a + // non-functioning system. + if (inBitsPerSymbol != 34) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + inbitspersymbol_check ( .error(1'b1) ); + end + if (inUsePackets != 0) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + inusepackets_check ( .error(1'b1) ); + end + if (inDataWidth != 34) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + indatawidth_check ( .error(1'b1) ); + end + if (inChannelWidth != 0) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + inchannelwidth_check ( .error(1'b1) ); + end + if (inErrorWidth != 0) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + inerrorwidth_check ( .error(1'b1) ); + end + if (inUseEmptyPort != 0) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + inuseemptyport_check ( .error(1'b1) ); + end + if (inUseValid != 1) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + inusevalid_check ( .error(1'b1) ); + end + if (inUseReady != 1) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + inuseready_check ( .error(1'b1) ); + end + if (inReadyLatency != 0) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + inreadylatency_check ( .error(1'b1) ); + end + if (outDataWidth != 34) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + outdatawidth_check ( .error(1'b1) ); + end + if (outChannelWidth != 0) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + outchannelwidth_check ( .error(1'b1) ); + end + if (outErrorWidth != 1) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + outerrorwidth_check ( .error(1'b1) ); + end + if (outUseEmptyPort != 0) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + outuseemptyport_check ( .error(1'b1) ); + end + if (outUseValid != 1) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + outusevalid_check ( .error(1'b1) ); + end + if (outUseReady != 1) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + outuseready_check ( .error(1'b1) ); + end + if (outReadyLatency != 0) + begin + initial begin + $display("Generated module instantiated with wrong parameters"); + $stop; + end + instantiated_with_wrong_parameters_error_see_comment_above + outreadylatency_check ( .error(1'b1) ); + end + endgenerate + + niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0 error_adapter_0 ( + .clk (in_clk_0_clk), // clk.clk + .reset_n (~in_rst_0_reset), // reset.reset_n + .in_data (in_0_data), // in.data + .in_valid (in_0_valid), // .valid + .in_ready (in_0_ready), // .ready + .out_data (out_0_data), // out.data + .out_valid (out_0_valid), // .valid + .out_ready (out_0_ready), // .ready + .out_error (out_0_error) // .error + ); + +endmodule diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv new file mode 100644 index 0000000..72182ff --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv @@ -0,0 +1,107 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// (C) 2001-2013 Altera Corporation. All rights reserved. +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/13.1/ip/.../avalon-st_error_adapter.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2013/09/09 $ +// $Author: dmunday $ + + +// -------------------------------------------------------------------------------- +//| Avalon Streaming Error Adapter +// -------------------------------------------------------------------------------- + +`timescale 1ns / 100ps + +// ------------------------------------------ +// Generation parameters: +// output_name: niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0 +// use_ready: true +// use_packets: false +// use_empty: 0 +// empty_width: 0 +// data_width: 34 +// channel_width: 0 +// in_error_width: 0 +// out_error_width: 1 +// in_errors_list +// in_errors_indices 0 +// out_errors_list +// has_in_error_desc: FALSE +// has_out_error_desc: FALSE +// out_has_other: FALSE +// out_other_index: -1 +// dumpVar: +// inString: in_error[ +// closeString: ] | + +// ------------------------------------------ + + + + +module niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0 +( + // Interface: in + output reg in_ready, + input in_valid, + input [34-1: 0] in_data, + // Interface: out + input out_ready, + output reg out_valid, + output reg [34-1: 0] out_data, + output reg [0:0] out_error, + // Interface: clk + input clk, + // Interface: reset + input reset_n + + /*AUTOARG*/); + + reg in_error = 0; + initial in_error = 0; + + // --------------------------------------------------------------------- + //| Pass-through Mapping + // --------------------------------------------------------------------- + always_comb begin + in_ready = out_ready; + out_valid = in_valid; + out_data = in_data; + + end + + // --------------------------------------------------------------------- + //| Error Mapping + // --------------------------------------------------------------------- + always_comb begin + out_error = 0; + + out_error = in_error; + + end //always @* +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_demux.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_demux.sv new file mode 100644 index 0000000..14c3fcd --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_demux.sv @@ -0,0 +1,175 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------- +// Merlin Demultiplexer +// +// Asserts valid on the appropriate output +// given a one-hot channel signal. +// ------------------------------------- + +`timescale 1 ns / 1 ns + +// ------------------------------------------ +// Generation parameters: +// output_name: niosII_mm_interconnect_0_cmd_demux +// ST_DATA_W: 94 +// ST_CHANNEL_W: 7 +// NUM_OUTPUTS: 6 +// VALID_WIDTH: 1 +// ------------------------------------------ + +//------------------------------------------ +// Message Supression Used +// QIS Warnings +// 15610 - Warning: Design contains x input pin(s) that do not drive logic +//------------------------------------------ + +module niosII_mm_interconnect_0_cmd_demux +( + // ------------------- + // Sink + // ------------------- + input [1-1 : 0] sink_valid, + input [94-1 : 0] sink_data, // ST_DATA_W=94 + input [7-1 : 0] sink_channel, // ST_CHANNEL_W=7 + input sink_startofpacket, + input sink_endofpacket, + output sink_ready, + + // ------------------- + // Sources + // ------------------- + output reg src0_valid, + output reg [94-1 : 0] src0_data, // ST_DATA_W=94 + output reg [7-1 : 0] src0_channel, // ST_CHANNEL_W=7 + output reg src0_startofpacket, + output reg src0_endofpacket, + input src0_ready, + + output reg src1_valid, + output reg [94-1 : 0] src1_data, // ST_DATA_W=94 + output reg [7-1 : 0] src1_channel, // ST_CHANNEL_W=7 + output reg src1_startofpacket, + output reg src1_endofpacket, + input src1_ready, + + output reg src2_valid, + output reg [94-1 : 0] src2_data, // ST_DATA_W=94 + output reg [7-1 : 0] src2_channel, // ST_CHANNEL_W=7 + output reg src2_startofpacket, + output reg src2_endofpacket, + input src2_ready, + + output reg src3_valid, + output reg [94-1 : 0] src3_data, // ST_DATA_W=94 + output reg [7-1 : 0] src3_channel, // ST_CHANNEL_W=7 + output reg src3_startofpacket, + output reg src3_endofpacket, + input src3_ready, + + output reg src4_valid, + output reg [94-1 : 0] src4_data, // ST_DATA_W=94 + output reg [7-1 : 0] src4_channel, // ST_CHANNEL_W=7 + output reg src4_startofpacket, + output reg src4_endofpacket, + input src4_ready, + + output reg src5_valid, + output reg [94-1 : 0] src5_data, // ST_DATA_W=94 + output reg [7-1 : 0] src5_channel, // ST_CHANNEL_W=7 + output reg src5_startofpacket, + output reg src5_endofpacket, + input src5_ready, + + + // ------------------- + // Clock & Reset + // ------------------- + (*altera_attribute = "-name MESSAGE_DISABLE 15610" *) // setting message suppression on clk + input clk, + (*altera_attribute = "-name MESSAGE_DISABLE 15610" *) // setting message suppression on reset + input reset + +); + + localparam NUM_OUTPUTS = 6; + wire [NUM_OUTPUTS - 1 : 0] ready_vector; + + // ------------------- + // Demux + // ------------------- + always @* begin + src0_data = sink_data; + src0_startofpacket = sink_startofpacket; + src0_endofpacket = sink_endofpacket; + src0_channel = sink_channel >> NUM_OUTPUTS; + + src0_valid = sink_channel[0] && sink_valid; + + src1_data = sink_data; + src1_startofpacket = sink_startofpacket; + src1_endofpacket = sink_endofpacket; + src1_channel = sink_channel >> NUM_OUTPUTS; + + src1_valid = sink_channel[1] && sink_valid; + + src2_data = sink_data; + src2_startofpacket = sink_startofpacket; + src2_endofpacket = sink_endofpacket; + src2_channel = sink_channel >> NUM_OUTPUTS; + + src2_valid = sink_channel[2] && sink_valid; + + src3_data = sink_data; + src3_startofpacket = sink_startofpacket; + src3_endofpacket = sink_endofpacket; + src3_channel = sink_channel >> NUM_OUTPUTS; + + src3_valid = sink_channel[3] && sink_valid; + + src4_data = sink_data; + src4_startofpacket = sink_startofpacket; + src4_endofpacket = sink_endofpacket; + src4_channel = sink_channel >> NUM_OUTPUTS; + + src4_valid = sink_channel[4] && sink_valid; + + src5_data = sink_data; + src5_startofpacket = sink_startofpacket; + src5_endofpacket = sink_endofpacket; + src5_channel = sink_channel >> NUM_OUTPUTS; + + src5_valid = sink_channel[5] && sink_valid; + + end + + // ------------------- + // Backpressure + // ------------------- + assign ready_vector[0] = src0_ready; + assign ready_vector[1] = src1_ready; + assign ready_vector[2] = src2_ready; + assign ready_vector[3] = src3_ready; + assign ready_vector[4] = src4_ready; + assign ready_vector[5] = src5_ready; + + assign sink_ready = |(sink_channel & {{1{1'b0}},{ready_vector[NUM_OUTPUTS - 1 : 0]}}); + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_demux_001.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_demux_001.sv new file mode 100644 index 0000000..34b17f2 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_demux_001.sv @@ -0,0 +1,115 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------- +// Merlin Demultiplexer +// +// Asserts valid on the appropriate output +// given a one-hot channel signal. +// ------------------------------------- + +`timescale 1 ns / 1 ns + +// ------------------------------------------ +// Generation parameters: +// output_name: niosII_mm_interconnect_0_cmd_demux_001 +// ST_DATA_W: 94 +// ST_CHANNEL_W: 7 +// NUM_OUTPUTS: 2 +// VALID_WIDTH: 1 +// ------------------------------------------ + +//------------------------------------------ +// Message Supression Used +// QIS Warnings +// 15610 - Warning: Design contains x input pin(s) that do not drive logic +//------------------------------------------ + +module niosII_mm_interconnect_0_cmd_demux_001 +( + // ------------------- + // Sink + // ------------------- + input [1-1 : 0] sink_valid, + input [94-1 : 0] sink_data, // ST_DATA_W=94 + input [7-1 : 0] sink_channel, // ST_CHANNEL_W=7 + input sink_startofpacket, + input sink_endofpacket, + output sink_ready, + + // ------------------- + // Sources + // ------------------- + output reg src0_valid, + output reg [94-1 : 0] src0_data, // ST_DATA_W=94 + output reg [7-1 : 0] src0_channel, // ST_CHANNEL_W=7 + output reg src0_startofpacket, + output reg src0_endofpacket, + input src0_ready, + + output reg src1_valid, + output reg [94-1 : 0] src1_data, // ST_DATA_W=94 + output reg [7-1 : 0] src1_channel, // ST_CHANNEL_W=7 + output reg src1_startofpacket, + output reg src1_endofpacket, + input src1_ready, + + + // ------------------- + // Clock & Reset + // ------------------- + (*altera_attribute = "-name MESSAGE_DISABLE 15610" *) // setting message suppression on clk + input clk, + (*altera_attribute = "-name MESSAGE_DISABLE 15610" *) // setting message suppression on reset + input reset + +); + + localparam NUM_OUTPUTS = 2; + wire [NUM_OUTPUTS - 1 : 0] ready_vector; + + // ------------------- + // Demux + // ------------------- + always @* begin + src0_data = sink_data; + src0_startofpacket = sink_startofpacket; + src0_endofpacket = sink_endofpacket; + src0_channel = sink_channel >> NUM_OUTPUTS; + + src0_valid = sink_channel[0] && sink_valid; + + src1_data = sink_data; + src1_startofpacket = sink_startofpacket; + src1_endofpacket = sink_endofpacket; + src1_channel = sink_channel >> NUM_OUTPUTS; + + src1_valid = sink_channel[1] && sink_valid; + + end + + // ------------------- + // Backpressure + // ------------------- + assign ready_vector[0] = src0_ready; + assign ready_vector[1] = src1_ready; + + assign sink_ready = |(sink_channel & {{5{1'b0}},{ready_vector[NUM_OUTPUTS - 1 : 0]}}); + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_mux.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_mux.sv new file mode 100644 index 0000000..b2f14c8 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_mux.sv @@ -0,0 +1,96 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// (C) 2001-2014 Altera Corporation. All rights reserved. +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------------ +// Merlin Multiplexer +// ------------------------------------------ + +`timescale 1 ns / 1 ns + + +// ------------------------------------------ +// Generation parameters: +// output_name: niosII_mm_interconnect_0_cmd_mux +// NUM_INPUTS: 1 +// ARBITRATION_SHARES: 1 +// ARBITRATION_SCHEME "round-robin" +// PIPELINE_ARB: 1 +// PKT_TRANS_LOCK: 58 (arbitration locking enabled) +// ST_DATA_W: 94 +// ST_CHANNEL_W: 7 +// ------------------------------------------ + +module niosII_mm_interconnect_0_cmd_mux +( + // ---------------------- + // Sinks + // ---------------------- + input sink0_valid, + input [94-1 : 0] sink0_data, + input [7-1: 0] sink0_channel, + input sink0_startofpacket, + input sink0_endofpacket, + output sink0_ready, + + + // ---------------------- + // Source + // ---------------------- + output src_valid, + output [94-1 : 0] src_data, + output [7-1 : 0] src_channel, + output src_startofpacket, + output src_endofpacket, + input src_ready, + + // ---------------------- + // Clock & Reset + // ---------------------- + input clk, + input reset +); + localparam PAYLOAD_W = 94 + 7 + 2; + localparam NUM_INPUTS = 1; + localparam SHARE_COUNTER_W = 1; + localparam PIPELINE_ARB = 1; + localparam ST_DATA_W = 94; + localparam ST_CHANNEL_W = 7; + localparam PKT_TRANS_LOCK = 58; + + assign src_valid = sink0_valid; + assign src_data = sink0_data; + assign src_channel = sink0_channel; + assign src_startofpacket = sink0_startofpacket; + assign src_endofpacket = sink0_endofpacket; + assign sink0_ready = src_ready; +endmodule + + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_mux_002.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_mux_002.sv new file mode 100644 index 0000000..36266b4 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_cmd_mux_002.sv @@ -0,0 +1,322 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// (C) 2001-2014 Altera Corporation. All rights reserved. +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------------ +// Merlin Multiplexer +// ------------------------------------------ + +`timescale 1 ns / 1 ns + + +// ------------------------------------------ +// Generation parameters: +// output_name: niosII_mm_interconnect_0_cmd_mux_002 +// NUM_INPUTS: 2 +// ARBITRATION_SHARES: 1 1 +// ARBITRATION_SCHEME "round-robin" +// PIPELINE_ARB: 1 +// PKT_TRANS_LOCK: 58 (arbitration locking enabled) +// ST_DATA_W: 94 +// ST_CHANNEL_W: 7 +// ------------------------------------------ + +module niosII_mm_interconnect_0_cmd_mux_002 +( + // ---------------------- + // Sinks + // ---------------------- + input sink0_valid, + input [94-1 : 0] sink0_data, + input [7-1: 0] sink0_channel, + input sink0_startofpacket, + input sink0_endofpacket, + output sink0_ready, + + input sink1_valid, + input [94-1 : 0] sink1_data, + input [7-1: 0] sink1_channel, + input sink1_startofpacket, + input sink1_endofpacket, + output sink1_ready, + + + // ---------------------- + // Source + // ---------------------- + output src_valid, + output [94-1 : 0] src_data, + output [7-1 : 0] src_channel, + output src_startofpacket, + output src_endofpacket, + input src_ready, + + // ---------------------- + // Clock & Reset + // ---------------------- + input clk, + input reset +); + localparam PAYLOAD_W = 94 + 7 + 2; + localparam NUM_INPUTS = 2; + localparam SHARE_COUNTER_W = 1; + localparam PIPELINE_ARB = 1; + localparam ST_DATA_W = 94; + localparam ST_CHANNEL_W = 7; + localparam PKT_TRANS_LOCK = 58; + + // ------------------------------------------ + // Signals + // ------------------------------------------ + wire [NUM_INPUTS - 1 : 0] request; + wire [NUM_INPUTS - 1 : 0] valid; + wire [NUM_INPUTS - 1 : 0] grant; + wire [NUM_INPUTS - 1 : 0] next_grant; + reg [NUM_INPUTS - 1 : 0] saved_grant; + reg [PAYLOAD_W - 1 : 0] src_payload; + wire last_cycle; + reg packet_in_progress; + reg update_grant; + + wire [PAYLOAD_W - 1 : 0] sink0_payload; + wire [PAYLOAD_W - 1 : 0] sink1_payload; + + assign valid[0] = sink0_valid; + assign valid[1] = sink1_valid; + + wire [NUM_INPUTS - 1 : 0] eop; + assign eop[0] = sink0_endofpacket; + assign eop[1] = sink1_endofpacket; + + // ------------------------------------------ + // ------------------------------------------ + // Grant Logic & Updates + // ------------------------------------------ + // ------------------------------------------ + reg [NUM_INPUTS - 1 : 0] lock; + always @* begin + lock[0] = sink0_data[58]; + lock[1] = sink1_data[58]; + end + reg [NUM_INPUTS - 1 : 0] locked = '0; + always @(posedge clk or posedge reset) begin + if (reset) begin + locked <= '0; + end + else begin + locked <= next_grant & lock; + end + end + + assign last_cycle = src_valid & src_ready & src_endofpacket & ~(|(lock & grant)); + + // ------------------------------------------ + // We're working on a packet at any time valid is high, except + // when this is the endofpacket. + // ------------------------------------------ + always @(posedge clk or posedge reset) begin + if (reset) begin + packet_in_progress <= 1'b0; + end + else begin + if (last_cycle) + packet_in_progress <= 1'b0; + else if (src_valid) + packet_in_progress <= 1'b1; + end + end + + + // ------------------------------------------ + // Shares + // + // Special case: all-equal shares _should_ be optimized into assigning a + // constant to next_grant_share. + // Special case: all-1's shares _should_ result in the share counter + // being optimized away. + // ------------------------------------------ + // Input | arb shares | counter load value + // 0 | 1 | 0 + // 1 | 1 | 0 + wire [SHARE_COUNTER_W - 1 : 0] share_0 = 1'd0; + wire [SHARE_COUNTER_W - 1 : 0] share_1 = 1'd0; + + // ------------------------------------------ + // Choose the share value corresponding to the grant. + // ------------------------------------------ + reg [SHARE_COUNTER_W - 1 : 0] next_grant_share; + always @* begin + next_grant_share = + share_0 & { SHARE_COUNTER_W {next_grant[0]} } | + share_1 & { SHARE_COUNTER_W {next_grant[1]} }; + end + + // ------------------------------------------ + // Flag to indicate first packet of an arb sequence. + // ------------------------------------------ + + // ------------------------------------------ + // Compute the next share-count value. + // ------------------------------------------ + reg [SHARE_COUNTER_W - 1 : 0] p1_share_count; + reg [SHARE_COUNTER_W - 1 : 0] share_count; + reg share_count_zero_flag; + + always @* begin + // Update the counter, but don't decrement below 0. + p1_share_count = share_count_zero_flag ? '0 : share_count - 1'b1; + end + + // ------------------------------------------ + // Update the share counter and share-counter=zero flag. + // ------------------------------------------ + always @(posedge clk or posedge reset) begin + if (reset) begin + share_count <= '0; + share_count_zero_flag <= 1'b1; + end + else begin + if (update_grant) begin + share_count <= next_grant_share; + share_count_zero_flag <= (next_grant_share == '0); + end + else if (last_cycle) begin + share_count <= p1_share_count; + share_count_zero_flag <= (p1_share_count == '0); + end + end + end + + + always @* begin + update_grant = 0; + + // ------------------------------------------ + // The pipeline delays grant by one cycle, so + // we have to calculate the update_grant signal + // one cycle ahead of time. + // + // Possible optimization: omit the first clause + // "if (!packet_in_progress & ~src_valid) ..." + // cost: one idle cycle at the the beginning of each + // grant cycle. + // benefit: save a small amount of logic. + // ------------------------------------------ + if (!packet_in_progress & !src_valid) + update_grant = 1; + if (last_cycle && share_count_zero_flag) + update_grant = 1; + end + + wire save_grant; + assign save_grant = update_grant; + assign grant = saved_grant; + + always @(posedge clk, posedge reset) begin + if (reset) + saved_grant <= '0; + else if (save_grant) + saved_grant <= next_grant; + end + + // ------------------------------------------ + // ------------------------------------------ + // Arbitrator + // ------------------------------------------ + // ------------------------------------------ + + // ------------------------------------------ + // Create a request vector that stays high during + // the packet for unpipelined arbitration. + // + // The pipelined arbitration scheme does not require + // request to be held high during the packet. + // ------------------------------------------ + reg [NUM_INPUTS - 1 : 0] prev_request; + always @(posedge clk, posedge reset) begin + if (reset) + prev_request <= '0; + else + prev_request <= request & ~(valid & eop); + end + + assign request = (PIPELINE_ARB == 1) ? valid | locked : + prev_request | valid | locked; + + wire [NUM_INPUTS - 1 : 0] next_grant_from_arb; + + altera_merlin_arbitrator + #( + .NUM_REQUESTERS(NUM_INPUTS), + .SCHEME ("round-robin"), + .PIPELINE (1) + ) arb ( + .clk (clk), + .reset (reset), + .request (request), + .grant (next_grant_from_arb), + .save_top_priority (src_valid), + .increment_top_priority (update_grant) + ); + + assign next_grant = next_grant_from_arb; + + // ------------------------------------------ + // ------------------------------------------ + // Mux + // + // Implemented as a sum of products. + // ------------------------------------------ + // ------------------------------------------ + + assign sink0_ready = src_ready && grant[0]; + assign sink1_ready = src_ready && grant[1]; + + assign src_valid = |(grant & valid); + + always @* begin + src_payload = + sink0_payload & {PAYLOAD_W {grant[0]} } | + sink1_payload & {PAYLOAD_W {grant[1]} }; + end + + // ------------------------------------------ + // Mux Payload Mapping + // ------------------------------------------ + + assign sink0_payload = {sink0_channel,sink0_data, + sink0_startofpacket,sink0_endofpacket}; + assign sink1_payload = {sink1_channel,sink1_data, + sink1_startofpacket,sink1_endofpacket}; + + assign {src_channel,src_data,src_startofpacket,src_endofpacket} = src_payload; +endmodule + + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router.sv new file mode 100644 index 0000000..1d9d063 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router.sv @@ -0,0 +1,260 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + + +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_router/altera_merlin_router.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------------------------- +// Merlin Router +// +// Asserts the appropriate one-hot encoded channel based on +// either (a) the address or (b) the dest id. The DECODER_TYPE +// parameter controls this behaviour. 0 means address decoder, +// 1 means dest id decoder. +// +// In the case of (a), it also sets the destination id. +// ------------------------------------------------------- + +`timescale 1 ns / 1 ns + +module niosII_mm_interconnect_0_router_default_decode + #( + parameter DEFAULT_CHANNEL = 5, + DEFAULT_WR_CHANNEL = -1, + DEFAULT_RD_CHANNEL = -1, + DEFAULT_DESTID = 3 + ) + (output [80 - 78 : 0] default_destination_id, + output [7-1 : 0] default_wr_channel, + output [7-1 : 0] default_rd_channel, + output [7-1 : 0] default_src_channel + ); + + assign default_destination_id = + DEFAULT_DESTID[80 - 78 : 0]; + + generate + if (DEFAULT_CHANNEL == -1) begin : no_default_channel_assignment + assign default_src_channel = '0; + end + else begin : default_channel_assignment + assign default_src_channel = 7'b1 << DEFAULT_CHANNEL; + end + endgenerate + + generate + if (DEFAULT_RD_CHANNEL == -1) begin : no_default_rw_channel_assignment + assign default_wr_channel = '0; + assign default_rd_channel = '0; + end + else begin : default_rw_channel_assignment + assign default_wr_channel = 7'b1 << DEFAULT_WR_CHANNEL; + assign default_rd_channel = 7'b1 << DEFAULT_RD_CHANNEL; + end + endgenerate + +endmodule + + +module niosII_mm_interconnect_0_router +( + // ------------------- + // Clock & Reset + // ------------------- + input clk, + input reset, + + // ------------------- + // Command Sink (Input) + // ------------------- + input sink_valid, + input [94-1 : 0] sink_data, + input sink_startofpacket, + input sink_endofpacket, + output sink_ready, + + // ------------------- + // Command Source (Output) + // ------------------- + output src_valid, + output reg [94-1 : 0] src_data, + output reg [7-1 : 0] src_channel, + output src_startofpacket, + output src_endofpacket, + input src_ready +); + + // ------------------------------------------------------- + // Local parameters and variables + // ------------------------------------------------------- + localparam PKT_ADDR_H = 53; + localparam PKT_ADDR_L = 36; + localparam PKT_DEST_ID_H = 80; + localparam PKT_DEST_ID_L = 78; + localparam PKT_PROTECTION_H = 84; + localparam PKT_PROTECTION_L = 82; + localparam ST_DATA_W = 94; + localparam ST_CHANNEL_W = 7; + localparam DECODER_TYPE = 0; + + localparam PKT_TRANS_WRITE = 56; + localparam PKT_TRANS_READ = 57; + + localparam PKT_ADDR_W = PKT_ADDR_H-PKT_ADDR_L + 1; + localparam PKT_DEST_ID_W = PKT_DEST_ID_H-PKT_DEST_ID_L + 1; + + + + // ------------------------------------------------------- + // Figure out the number of bits to mask off for each slave span + // during address decoding + // ------------------------------------------------------- + localparam PAD0 = log2ceil(64'h20000 - 64'h0); + localparam PAD1 = log2ceil(64'h21000 - 64'h20800); + localparam PAD2 = log2ceil(64'h21020 - 64'h21000); + localparam PAD3 = log2ceil(64'h21030 - 64'h21020); + localparam PAD4 = log2ceil(64'h21038 - 64'h21030); + localparam PAD5 = log2ceil(64'h21040 - 64'h21038); + // ------------------------------------------------------- + // Work out which address bits are significant based on the + // address range of the slaves. If the required width is too + // large or too small, we use the address field width instead. + // ------------------------------------------------------- + localparam ADDR_RANGE = 64'h21040; + localparam RANGE_ADDR_WIDTH = log2ceil(ADDR_RANGE); + localparam OPTIMIZED_ADDR_H = (RANGE_ADDR_WIDTH > PKT_ADDR_W) || + (RANGE_ADDR_WIDTH == 0) ? + PKT_ADDR_H : + PKT_ADDR_L + RANGE_ADDR_WIDTH - 1; + + localparam RG = RANGE_ADDR_WIDTH-1; + localparam REAL_ADDRESS_RANGE = OPTIMIZED_ADDR_H - PKT_ADDR_L; + + reg [PKT_ADDR_W-1 : 0] address; + always @* begin + address = {PKT_ADDR_W{1'b0}}; + address [REAL_ADDRESS_RANGE:0] = sink_data[OPTIMIZED_ADDR_H : PKT_ADDR_L]; + end + + // ------------------------------------------------------- + // Pass almost everything through, untouched + // ------------------------------------------------------- + assign sink_ready = src_ready; + assign src_valid = sink_valid; + assign src_startofpacket = sink_startofpacket; + assign src_endofpacket = sink_endofpacket; + wire [PKT_DEST_ID_W-1:0] default_destid; + wire [7-1 : 0] default_src_channel; + + + + + // ------------------------------------------------------- + // Write and read transaction signals + // ------------------------------------------------------- + wire write_transaction; + assign write_transaction = sink_data[PKT_TRANS_WRITE]; + + + niosII_mm_interconnect_0_router_default_decode the_default_decode( + .default_destination_id (default_destid), + .default_wr_channel (), + .default_rd_channel (), + .default_src_channel (default_src_channel) + ); + + always @* begin + src_data = sink_data; + src_channel = default_src_channel; + src_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = default_destid; + + // -------------------------------------------------- + // Address Decoder + // Sets the channel and destination ID based on the address + // -------------------------------------------------- + + // ( 0x0 .. 0x20000 ) + if ( {address[RG:PAD0],{PAD0{1'b0}}} == 18'h0 ) begin + src_channel = 7'b100000; + src_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = 3; + end + + // ( 0x20800 .. 0x21000 ) + if ( {address[RG:PAD1],{PAD1{1'b0}}} == 18'h20800 ) begin + src_channel = 7'b000100; + src_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = 0; + end + + // ( 0x21000 .. 0x21020 ) + if ( {address[RG:PAD2],{PAD2{1'b0}}} == 18'h21000 ) begin + src_channel = 7'b010000; + src_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = 6; + end + + // ( 0x21020 .. 0x21030 ) + if ( {address[RG:PAD3],{PAD3{1'b0}}} == 18'h21020 && write_transaction ) begin + src_channel = 7'b001000; + src_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = 5; + end + + // ( 0x21030 .. 0x21038 ) + if ( {address[RG:PAD4],{PAD4{1'b0}}} == 18'h21030 ) begin + src_channel = 7'b000010; + src_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = 4; + end + + // ( 0x21038 .. 0x21040 ) + if ( {address[RG:PAD5],{PAD5{1'b0}}} == 18'h21038 ) begin + src_channel = 7'b000001; + src_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = 1; + end + +end + + + // -------------------------------------------------- + // Ceil(log2()) function + // -------------------------------------------------- + function integer log2ceil; + input reg[65:0] val; + reg [65:0] i; + + begin + i = 1; + log2ceil = 0; + + while (i < val) begin + log2ceil = log2ceil + 1; + i = i << 1; + end + end + endfunction + +endmodule + + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_001.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_001.sv new file mode 100644 index 0000000..91db8fd --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_001.sv @@ -0,0 +1,227 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + + +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_router/altera_merlin_router.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------------------------- +// Merlin Router +// +// Asserts the appropriate one-hot encoded channel based on +// either (a) the address or (b) the dest id. The DECODER_TYPE +// parameter controls this behaviour. 0 means address decoder, +// 1 means dest id decoder. +// +// In the case of (a), it also sets the destination id. +// ------------------------------------------------------- + +`timescale 1 ns / 1 ns + +module niosII_mm_interconnect_0_router_001_default_decode + #( + parameter DEFAULT_CHANNEL = 1, + DEFAULT_WR_CHANNEL = -1, + DEFAULT_RD_CHANNEL = -1, + DEFAULT_DESTID = 2 + ) + (output [80 - 78 : 0] default_destination_id, + output [7-1 : 0] default_wr_channel, + output [7-1 : 0] default_rd_channel, + output [7-1 : 0] default_src_channel + ); + + assign default_destination_id = + DEFAULT_DESTID[80 - 78 : 0]; + + generate + if (DEFAULT_CHANNEL == -1) begin : no_default_channel_assignment + assign default_src_channel = '0; + end + else begin : default_channel_assignment + assign default_src_channel = 7'b1 << DEFAULT_CHANNEL; + end + endgenerate + + generate + if (DEFAULT_RD_CHANNEL == -1) begin : no_default_rw_channel_assignment + assign default_wr_channel = '0; + assign default_rd_channel = '0; + end + else begin : default_rw_channel_assignment + assign default_wr_channel = 7'b1 << DEFAULT_WR_CHANNEL; + assign default_rd_channel = 7'b1 << DEFAULT_RD_CHANNEL; + end + endgenerate + +endmodule + + +module niosII_mm_interconnect_0_router_001 +( + // ------------------- + // Clock & Reset + // ------------------- + input clk, + input reset, + + // ------------------- + // Command Sink (Input) + // ------------------- + input sink_valid, + input [94-1 : 0] sink_data, + input sink_startofpacket, + input sink_endofpacket, + output sink_ready, + + // ------------------- + // Command Source (Output) + // ------------------- + output src_valid, + output reg [94-1 : 0] src_data, + output reg [7-1 : 0] src_channel, + output src_startofpacket, + output src_endofpacket, + input src_ready +); + + // ------------------------------------------------------- + // Local parameters and variables + // ------------------------------------------------------- + localparam PKT_ADDR_H = 53; + localparam PKT_ADDR_L = 36; + localparam PKT_DEST_ID_H = 80; + localparam PKT_DEST_ID_L = 78; + localparam PKT_PROTECTION_H = 84; + localparam PKT_PROTECTION_L = 82; + localparam ST_DATA_W = 94; + localparam ST_CHANNEL_W = 7; + localparam DECODER_TYPE = 0; + + localparam PKT_TRANS_WRITE = 56; + localparam PKT_TRANS_READ = 57; + + localparam PKT_ADDR_W = PKT_ADDR_H-PKT_ADDR_L + 1; + localparam PKT_DEST_ID_W = PKT_DEST_ID_H-PKT_DEST_ID_L + 1; + + + + // ------------------------------------------------------- + // Figure out the number of bits to mask off for each slave span + // during address decoding + // ------------------------------------------------------- + localparam PAD0 = log2ceil(64'h20000 - 64'h0); + localparam PAD1 = log2ceil(64'h21000 - 64'h20800); + // ------------------------------------------------------- + // Work out which address bits are significant based on the + // address range of the slaves. If the required width is too + // large or too small, we use the address field width instead. + // ------------------------------------------------------- + localparam ADDR_RANGE = 64'h21000; + localparam RANGE_ADDR_WIDTH = log2ceil(ADDR_RANGE); + localparam OPTIMIZED_ADDR_H = (RANGE_ADDR_WIDTH > PKT_ADDR_W) || + (RANGE_ADDR_WIDTH == 0) ? + PKT_ADDR_H : + PKT_ADDR_L + RANGE_ADDR_WIDTH - 1; + + localparam RG = RANGE_ADDR_WIDTH-1; + localparam REAL_ADDRESS_RANGE = OPTIMIZED_ADDR_H - PKT_ADDR_L; + + reg [PKT_ADDR_W-1 : 0] address; + always @* begin + address = {PKT_ADDR_W{1'b0}}; + address [REAL_ADDRESS_RANGE:0] = sink_data[OPTIMIZED_ADDR_H : PKT_ADDR_L]; + end + + // ------------------------------------------------------- + // Pass almost everything through, untouched + // ------------------------------------------------------- + assign sink_ready = src_ready; + assign src_valid = sink_valid; + assign src_startofpacket = sink_startofpacket; + assign src_endofpacket = sink_endofpacket; + wire [PKT_DEST_ID_W-1:0] default_destid; + wire [7-1 : 0] default_src_channel; + + + + + + + niosII_mm_interconnect_0_router_001_default_decode the_default_decode( + .default_destination_id (default_destid), + .default_wr_channel (), + .default_rd_channel (), + .default_src_channel (default_src_channel) + ); + + always @* begin + src_data = sink_data; + src_channel = default_src_channel; + src_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = default_destid; + + // -------------------------------------------------- + // Address Decoder + // Sets the channel and destination ID based on the address + // -------------------------------------------------- + + // ( 0x0 .. 0x20000 ) + if ( {address[RG:PAD0],{PAD0{1'b0}}} == 18'h0 ) begin + src_channel = 7'b10; + src_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = 2; + end + + // ( 0x20800 .. 0x21000 ) + if ( {address[RG:PAD1],{PAD1{1'b0}}} == 18'h20800 ) begin + src_channel = 7'b01; + src_data[PKT_DEST_ID_H:PKT_DEST_ID_L] = 0; + end + +end + + + // -------------------------------------------------- + // Ceil(log2()) function + // -------------------------------------------------- + function integer log2ceil; + input reg[65:0] val; + reg [65:0] i; + + begin + i = 1; + log2ceil = 0; + + while (i < val) begin + log2ceil = log2ceil + 1; + i = i << 1; + end + end + endfunction + +endmodule + + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_002.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_002.sv new file mode 100644 index 0000000..dc8ad68 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_002.sv @@ -0,0 +1,215 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + + +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_router/altera_merlin_router.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------------------------- +// Merlin Router +// +// Asserts the appropriate one-hot encoded channel based on +// either (a) the address or (b) the dest id. The DECODER_TYPE +// parameter controls this behaviour. 0 means address decoder, +// 1 means dest id decoder. +// +// In the case of (a), it also sets the destination id. +// ------------------------------------------------------- + +`timescale 1 ns / 1 ns + +module niosII_mm_interconnect_0_router_002_default_decode + #( + parameter DEFAULT_CHANNEL = 0, + DEFAULT_WR_CHANNEL = -1, + DEFAULT_RD_CHANNEL = -1, + DEFAULT_DESTID = 0 + ) + (output [80 - 78 : 0] default_destination_id, + output [7-1 : 0] default_wr_channel, + output [7-1 : 0] default_rd_channel, + output [7-1 : 0] default_src_channel + ); + + assign default_destination_id = + DEFAULT_DESTID[80 - 78 : 0]; + + generate + if (DEFAULT_CHANNEL == -1) begin : no_default_channel_assignment + assign default_src_channel = '0; + end + else begin : default_channel_assignment + assign default_src_channel = 7'b1 << DEFAULT_CHANNEL; + end + endgenerate + + generate + if (DEFAULT_RD_CHANNEL == -1) begin : no_default_rw_channel_assignment + assign default_wr_channel = '0; + assign default_rd_channel = '0; + end + else begin : default_rw_channel_assignment + assign default_wr_channel = 7'b1 << DEFAULT_WR_CHANNEL; + assign default_rd_channel = 7'b1 << DEFAULT_RD_CHANNEL; + end + endgenerate + +endmodule + + +module niosII_mm_interconnect_0_router_002 +( + // ------------------- + // Clock & Reset + // ------------------- + input clk, + input reset, + + // ------------------- + // Command Sink (Input) + // ------------------- + input sink_valid, + input [94-1 : 0] sink_data, + input sink_startofpacket, + input sink_endofpacket, + output sink_ready, + + // ------------------- + // Command Source (Output) + // ------------------- + output src_valid, + output reg [94-1 : 0] src_data, + output reg [7-1 : 0] src_channel, + output src_startofpacket, + output src_endofpacket, + input src_ready +); + + // ------------------------------------------------------- + // Local parameters and variables + // ------------------------------------------------------- + localparam PKT_ADDR_H = 53; + localparam PKT_ADDR_L = 36; + localparam PKT_DEST_ID_H = 80; + localparam PKT_DEST_ID_L = 78; + localparam PKT_PROTECTION_H = 84; + localparam PKT_PROTECTION_L = 82; + localparam ST_DATA_W = 94; + localparam ST_CHANNEL_W = 7; + localparam DECODER_TYPE = 1; + + localparam PKT_TRANS_WRITE = 56; + localparam PKT_TRANS_READ = 57; + + localparam PKT_ADDR_W = PKT_ADDR_H-PKT_ADDR_L + 1; + localparam PKT_DEST_ID_W = PKT_DEST_ID_H-PKT_DEST_ID_L + 1; + + + + // ------------------------------------------------------- + // Figure out the number of bits to mask off for each slave span + // during address decoding + // ------------------------------------------------------- + // ------------------------------------------------------- + // Work out which address bits are significant based on the + // address range of the slaves. If the required width is too + // large or too small, we use the address field width instead. + // ------------------------------------------------------- + localparam ADDR_RANGE = 64'h0; + localparam RANGE_ADDR_WIDTH = log2ceil(ADDR_RANGE); + localparam OPTIMIZED_ADDR_H = (RANGE_ADDR_WIDTH > PKT_ADDR_W) || + (RANGE_ADDR_WIDTH == 0) ? + PKT_ADDR_H : + PKT_ADDR_L + RANGE_ADDR_WIDTH - 1; + + localparam RG = RANGE_ADDR_WIDTH; + localparam REAL_ADDRESS_RANGE = OPTIMIZED_ADDR_H - PKT_ADDR_L; + + reg [PKT_DEST_ID_W-1 : 0] destid; + + // ------------------------------------------------------- + // Pass almost everything through, untouched + // ------------------------------------------------------- + assign sink_ready = src_ready; + assign src_valid = sink_valid; + assign src_startofpacket = sink_startofpacket; + assign src_endofpacket = sink_endofpacket; + wire [7-1 : 0] default_src_channel; + + + + + + + niosII_mm_interconnect_0_router_002_default_decode the_default_decode( + .default_destination_id (), + .default_wr_channel (), + .default_rd_channel (), + .default_src_channel (default_src_channel) + ); + + always @* begin + src_data = sink_data; + src_channel = default_src_channel; + + // -------------------------------------------------- + // DestinationID Decoder + // Sets the channel based on the destination ID. + // -------------------------------------------------- + destid = sink_data[PKT_DEST_ID_H : PKT_DEST_ID_L]; + + + + if (destid == 0 ) begin + src_channel = 7'b1; + end + + +end + + + // -------------------------------------------------- + // Ceil(log2()) function + // -------------------------------------------------- + function integer log2ceil; + input reg[65:0] val; + reg [65:0] i; + + begin + i = 1; + log2ceil = 0; + + while (i < val) begin + log2ceil = log2ceil + 1; + i = i << 1; + end + end + endfunction + +endmodule + + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_004.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_004.sv new file mode 100644 index 0000000..0f2308d --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_004.sv @@ -0,0 +1,224 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + + +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_router/altera_merlin_router.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------------------------- +// Merlin Router +// +// Asserts the appropriate one-hot encoded channel based on +// either (a) the address or (b) the dest id. The DECODER_TYPE +// parameter controls this behaviour. 0 means address decoder, +// 1 means dest id decoder. +// +// In the case of (a), it also sets the destination id. +// ------------------------------------------------------- + +`timescale 1 ns / 1 ns + +module niosII_mm_interconnect_0_router_004_default_decode + #( + parameter DEFAULT_CHANNEL = 0, + DEFAULT_WR_CHANNEL = -1, + DEFAULT_RD_CHANNEL = -1, + DEFAULT_DESTID = 0 + ) + (output [80 - 78 : 0] default_destination_id, + output [7-1 : 0] default_wr_channel, + output [7-1 : 0] default_rd_channel, + output [7-1 : 0] default_src_channel + ); + + assign default_destination_id = + DEFAULT_DESTID[80 - 78 : 0]; + + generate + if (DEFAULT_CHANNEL == -1) begin : no_default_channel_assignment + assign default_src_channel = '0; + end + else begin : default_channel_assignment + assign default_src_channel = 7'b1 << DEFAULT_CHANNEL; + end + endgenerate + + generate + if (DEFAULT_RD_CHANNEL == -1) begin : no_default_rw_channel_assignment + assign default_wr_channel = '0; + assign default_rd_channel = '0; + end + else begin : default_rw_channel_assignment + assign default_wr_channel = 7'b1 << DEFAULT_WR_CHANNEL; + assign default_rd_channel = 7'b1 << DEFAULT_RD_CHANNEL; + end + endgenerate + +endmodule + + +module niosII_mm_interconnect_0_router_004 +( + // ------------------- + // Clock & Reset + // ------------------- + input clk, + input reset, + + // ------------------- + // Command Sink (Input) + // ------------------- + input sink_valid, + input [94-1 : 0] sink_data, + input sink_startofpacket, + input sink_endofpacket, + output sink_ready, + + // ------------------- + // Command Source (Output) + // ------------------- + output src_valid, + output reg [94-1 : 0] src_data, + output reg [7-1 : 0] src_channel, + output src_startofpacket, + output src_endofpacket, + input src_ready +); + + // ------------------------------------------------------- + // Local parameters and variables + // ------------------------------------------------------- + localparam PKT_ADDR_H = 53; + localparam PKT_ADDR_L = 36; + localparam PKT_DEST_ID_H = 80; + localparam PKT_DEST_ID_L = 78; + localparam PKT_PROTECTION_H = 84; + localparam PKT_PROTECTION_L = 82; + localparam ST_DATA_W = 94; + localparam ST_CHANNEL_W = 7; + localparam DECODER_TYPE = 1; + + localparam PKT_TRANS_WRITE = 56; + localparam PKT_TRANS_READ = 57; + + localparam PKT_ADDR_W = PKT_ADDR_H-PKT_ADDR_L + 1; + localparam PKT_DEST_ID_W = PKT_DEST_ID_H-PKT_DEST_ID_L + 1; + + + + // ------------------------------------------------------- + // Figure out the number of bits to mask off for each slave span + // during address decoding + // ------------------------------------------------------- + // ------------------------------------------------------- + // Work out which address bits are significant based on the + // address range of the slaves. If the required width is too + // large or too small, we use the address field width instead. + // ------------------------------------------------------- + localparam ADDR_RANGE = 64'h0; + localparam RANGE_ADDR_WIDTH = log2ceil(ADDR_RANGE); + localparam OPTIMIZED_ADDR_H = (RANGE_ADDR_WIDTH > PKT_ADDR_W) || + (RANGE_ADDR_WIDTH == 0) ? + PKT_ADDR_H : + PKT_ADDR_L + RANGE_ADDR_WIDTH - 1; + + localparam RG = RANGE_ADDR_WIDTH; + localparam REAL_ADDRESS_RANGE = OPTIMIZED_ADDR_H - PKT_ADDR_L; + + reg [PKT_DEST_ID_W-1 : 0] destid; + + // ------------------------------------------------------- + // Pass almost everything through, untouched + // ------------------------------------------------------- + assign sink_ready = src_ready; + assign src_valid = sink_valid; + assign src_startofpacket = sink_startofpacket; + assign src_endofpacket = sink_endofpacket; + wire [7-1 : 0] default_src_channel; + + + + + // ------------------------------------------------------- + // Write and read transaction signals + // ------------------------------------------------------- + wire read_transaction; + assign read_transaction = sink_data[PKT_TRANS_READ]; + + + niosII_mm_interconnect_0_router_004_default_decode the_default_decode( + .default_destination_id (), + .default_wr_channel (), + .default_rd_channel (), + .default_src_channel (default_src_channel) + ); + + always @* begin + src_data = sink_data; + src_channel = default_src_channel; + + // -------------------------------------------------- + // DestinationID Decoder + // Sets the channel based on the destination ID. + // -------------------------------------------------- + destid = sink_data[PKT_DEST_ID_H : PKT_DEST_ID_L]; + + + + if (destid == 0 ) begin + src_channel = 7'b01; + end + + if (destid == 1 && read_transaction) begin + src_channel = 7'b10; + end + + +end + + + // -------------------------------------------------- + // Ceil(log2()) function + // -------------------------------------------------- + function integer log2ceil; + input reg[65:0] val; + reg [65:0] i; + + begin + i = 1; + log2ceil = 0; + + while (i < val) begin + log2ceil = log2ceil + 1; + i = i << 1; + end + end + endfunction + +endmodule + + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_008.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_008.sv new file mode 100644 index 0000000..ee03f6e --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_router_008.sv @@ -0,0 +1,220 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + + +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_router/altera_merlin_router.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------------------------- +// Merlin Router +// +// Asserts the appropriate one-hot encoded channel based on +// either (a) the address or (b) the dest id. The DECODER_TYPE +// parameter controls this behaviour. 0 means address decoder, +// 1 means dest id decoder. +// +// In the case of (a), it also sets the destination id. +// ------------------------------------------------------- + +`timescale 1 ns / 1 ns + +module niosII_mm_interconnect_0_router_008_default_decode + #( + parameter DEFAULT_CHANNEL = 0, + DEFAULT_WR_CHANNEL = -1, + DEFAULT_RD_CHANNEL = -1, + DEFAULT_DESTID = 1 + ) + (output [80 - 78 : 0] default_destination_id, + output [7-1 : 0] default_wr_channel, + output [7-1 : 0] default_rd_channel, + output [7-1 : 0] default_src_channel + ); + + assign default_destination_id = + DEFAULT_DESTID[80 - 78 : 0]; + + generate + if (DEFAULT_CHANNEL == -1) begin : no_default_channel_assignment + assign default_src_channel = '0; + end + else begin : default_channel_assignment + assign default_src_channel = 7'b1 << DEFAULT_CHANNEL; + end + endgenerate + + generate + if (DEFAULT_RD_CHANNEL == -1) begin : no_default_rw_channel_assignment + assign default_wr_channel = '0; + assign default_rd_channel = '0; + end + else begin : default_rw_channel_assignment + assign default_wr_channel = 7'b1 << DEFAULT_WR_CHANNEL; + assign default_rd_channel = 7'b1 << DEFAULT_RD_CHANNEL; + end + endgenerate + +endmodule + + +module niosII_mm_interconnect_0_router_008 +( + // ------------------- + // Clock & Reset + // ------------------- + input clk, + input reset, + + // ------------------- + // Command Sink (Input) + // ------------------- + input sink_valid, + input [94-1 : 0] sink_data, + input sink_startofpacket, + input sink_endofpacket, + output sink_ready, + + // ------------------- + // Command Source (Output) + // ------------------- + output src_valid, + output reg [94-1 : 0] src_data, + output reg [7-1 : 0] src_channel, + output src_startofpacket, + output src_endofpacket, + input src_ready +); + + // ------------------------------------------------------- + // Local parameters and variables + // ------------------------------------------------------- + localparam PKT_ADDR_H = 53; + localparam PKT_ADDR_L = 36; + localparam PKT_DEST_ID_H = 80; + localparam PKT_DEST_ID_L = 78; + localparam PKT_PROTECTION_H = 84; + localparam PKT_PROTECTION_L = 82; + localparam ST_DATA_W = 94; + localparam ST_CHANNEL_W = 7; + localparam DECODER_TYPE = 1; + + localparam PKT_TRANS_WRITE = 56; + localparam PKT_TRANS_READ = 57; + + localparam PKT_ADDR_W = PKT_ADDR_H-PKT_ADDR_L + 1; + localparam PKT_DEST_ID_W = PKT_DEST_ID_H-PKT_DEST_ID_L + 1; + + + + // ------------------------------------------------------- + // Figure out the number of bits to mask off for each slave span + // during address decoding + // ------------------------------------------------------- + // ------------------------------------------------------- + // Work out which address bits are significant based on the + // address range of the slaves. If the required width is too + // large or too small, we use the address field width instead. + // ------------------------------------------------------- + localparam ADDR_RANGE = 64'h0; + localparam RANGE_ADDR_WIDTH = log2ceil(ADDR_RANGE); + localparam OPTIMIZED_ADDR_H = (RANGE_ADDR_WIDTH > PKT_ADDR_W) || + (RANGE_ADDR_WIDTH == 0) ? + PKT_ADDR_H : + PKT_ADDR_L + RANGE_ADDR_WIDTH - 1; + + localparam RG = RANGE_ADDR_WIDTH; + localparam REAL_ADDRESS_RANGE = OPTIMIZED_ADDR_H - PKT_ADDR_L; + + reg [PKT_DEST_ID_W-1 : 0] destid; + + // ------------------------------------------------------- + // Pass almost everything through, untouched + // ------------------------------------------------------- + assign sink_ready = src_ready; + assign src_valid = sink_valid; + assign src_startofpacket = sink_startofpacket; + assign src_endofpacket = sink_endofpacket; + wire [7-1 : 0] default_src_channel; + + + + + // ------------------------------------------------------- + // Write and read transaction signals + // ------------------------------------------------------- + wire read_transaction; + assign read_transaction = sink_data[PKT_TRANS_READ]; + + + niosII_mm_interconnect_0_router_008_default_decode the_default_decode( + .default_destination_id (), + .default_wr_channel (), + .default_rd_channel (), + .default_src_channel (default_src_channel) + ); + + always @* begin + src_data = sink_data; + src_channel = default_src_channel; + + // -------------------------------------------------- + // DestinationID Decoder + // Sets the channel based on the destination ID. + // -------------------------------------------------- + destid = sink_data[PKT_DEST_ID_H : PKT_DEST_ID_L]; + + + + if (destid == 1 && read_transaction) begin + src_channel = 7'b1; + end + + +end + + + // -------------------------------------------------- + // Ceil(log2()) function + // -------------------------------------------------- + function integer log2ceil; + input reg[65:0] val; + reg [65:0] i; + + begin + i = 1; + log2ceil = 0; + + while (i < val) begin + log2ceil = log2ceil + 1; + i = i << 1; + end + end + endfunction + +endmodule + + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_demux.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_demux.sv new file mode 100644 index 0000000..f46f1ba --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_demux.sv @@ -0,0 +1,100 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------- +// Merlin Demultiplexer +// +// Asserts valid on the appropriate output +// given a one-hot channel signal. +// ------------------------------------- + +`timescale 1 ns / 1 ns + +// ------------------------------------------ +// Generation parameters: +// output_name: niosII_mm_interconnect_0_rsp_demux +// ST_DATA_W: 94 +// ST_CHANNEL_W: 7 +// NUM_OUTPUTS: 1 +// VALID_WIDTH: 1 +// ------------------------------------------ + +//------------------------------------------ +// Message Supression Used +// QIS Warnings +// 15610 - Warning: Design contains x input pin(s) that do not drive logic +//------------------------------------------ + +module niosII_mm_interconnect_0_rsp_demux +( + // ------------------- + // Sink + // ------------------- + input [1-1 : 0] sink_valid, + input [94-1 : 0] sink_data, // ST_DATA_W=94 + input [7-1 : 0] sink_channel, // ST_CHANNEL_W=7 + input sink_startofpacket, + input sink_endofpacket, + output sink_ready, + + // ------------------- + // Sources + // ------------------- + output reg src0_valid, + output reg [94-1 : 0] src0_data, // ST_DATA_W=94 + output reg [7-1 : 0] src0_channel, // ST_CHANNEL_W=7 + output reg src0_startofpacket, + output reg src0_endofpacket, + input src0_ready, + + + // ------------------- + // Clock & Reset + // ------------------- + (*altera_attribute = "-name MESSAGE_DISABLE 15610" *) // setting message suppression on clk + input clk, + (*altera_attribute = "-name MESSAGE_DISABLE 15610" *) // setting message suppression on reset + input reset + +); + + localparam NUM_OUTPUTS = 1; + wire [NUM_OUTPUTS - 1 : 0] ready_vector; + + // ------------------- + // Demux + // ------------------- + always @* begin + src0_data = sink_data; + src0_startofpacket = sink_startofpacket; + src0_endofpacket = sink_endofpacket; + src0_channel = sink_channel >> NUM_OUTPUTS; + + src0_valid = sink_channel[0] && sink_valid; + + end + + // ------------------- + // Backpressure + // ------------------- + assign ready_vector[0] = src0_ready; + + assign sink_ready = |(sink_channel & {{6{1'b0}},{ready_vector[NUM_OUTPUTS - 1 : 0]}}); + +endmodule + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_mux.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_mux.sv new file mode 100644 index 0000000..a370648 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_mux.sv @@ -0,0 +1,425 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// (C) 2001-2014 Altera Corporation. All rights reserved. +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------------ +// Merlin Multiplexer +// ------------------------------------------ + +`timescale 1 ns / 1 ns + + +// ------------------------------------------ +// Generation parameters: +// output_name: niosII_mm_interconnect_0_rsp_mux +// NUM_INPUTS: 6 +// ARBITRATION_SHARES: 1 1 1 1 1 1 +// ARBITRATION_SCHEME "no-arb" +// PIPELINE_ARB: 0 +// PKT_TRANS_LOCK: 58 (arbitration locking enabled) +// ST_DATA_W: 94 +// ST_CHANNEL_W: 7 +// ------------------------------------------ + +module niosII_mm_interconnect_0_rsp_mux +( + // ---------------------- + // Sinks + // ---------------------- + input sink0_valid, + input [94-1 : 0] sink0_data, + input [7-1: 0] sink0_channel, + input sink0_startofpacket, + input sink0_endofpacket, + output sink0_ready, + + input sink1_valid, + input [94-1 : 0] sink1_data, + input [7-1: 0] sink1_channel, + input sink1_startofpacket, + input sink1_endofpacket, + output sink1_ready, + + input sink2_valid, + input [94-1 : 0] sink2_data, + input [7-1: 0] sink2_channel, + input sink2_startofpacket, + input sink2_endofpacket, + output sink2_ready, + + input sink3_valid, + input [94-1 : 0] sink3_data, + input [7-1: 0] sink3_channel, + input sink3_startofpacket, + input sink3_endofpacket, + output sink3_ready, + + input sink4_valid, + input [94-1 : 0] sink4_data, + input [7-1: 0] sink4_channel, + input sink4_startofpacket, + input sink4_endofpacket, + output sink4_ready, + + input sink5_valid, + input [94-1 : 0] sink5_data, + input [7-1: 0] sink5_channel, + input sink5_startofpacket, + input sink5_endofpacket, + output sink5_ready, + + + // ---------------------- + // Source + // ---------------------- + output src_valid, + output [94-1 : 0] src_data, + output [7-1 : 0] src_channel, + output src_startofpacket, + output src_endofpacket, + input src_ready, + + // ---------------------- + // Clock & Reset + // ---------------------- + input clk, + input reset +); + localparam PAYLOAD_W = 94 + 7 + 2; + localparam NUM_INPUTS = 6; + localparam SHARE_COUNTER_W = 1; + localparam PIPELINE_ARB = 0; + localparam ST_DATA_W = 94; + localparam ST_CHANNEL_W = 7; + localparam PKT_TRANS_LOCK = 58; + + // ------------------------------------------ + // Signals + // ------------------------------------------ + wire [NUM_INPUTS - 1 : 0] request; + wire [NUM_INPUTS - 1 : 0] valid; + wire [NUM_INPUTS - 1 : 0] grant; + wire [NUM_INPUTS - 1 : 0] next_grant; + reg [NUM_INPUTS - 1 : 0] saved_grant; + reg [PAYLOAD_W - 1 : 0] src_payload; + wire last_cycle; + reg packet_in_progress; + reg update_grant; + + wire [PAYLOAD_W - 1 : 0] sink0_payload; + wire [PAYLOAD_W - 1 : 0] sink1_payload; + wire [PAYLOAD_W - 1 : 0] sink2_payload; + wire [PAYLOAD_W - 1 : 0] sink3_payload; + wire [PAYLOAD_W - 1 : 0] sink4_payload; + wire [PAYLOAD_W - 1 : 0] sink5_payload; + + assign valid[0] = sink0_valid; + assign valid[1] = sink1_valid; + assign valid[2] = sink2_valid; + assign valid[3] = sink3_valid; + assign valid[4] = sink4_valid; + assign valid[5] = sink5_valid; + + + // ------------------------------------------ + // ------------------------------------------ + // Grant Logic & Updates + // ------------------------------------------ + // ------------------------------------------ + reg [NUM_INPUTS - 1 : 0] lock; + always @* begin + lock[0] = sink0_data[58]; + lock[1] = sink1_data[58]; + lock[2] = sink2_data[58]; + lock[3] = sink3_data[58]; + lock[4] = sink4_data[58]; + lock[5] = sink5_data[58]; + end + + assign last_cycle = src_valid & src_ready & src_endofpacket & ~(|(lock & grant)); + + // ------------------------------------------ + // We're working on a packet at any time valid is high, except + // when this is the endofpacket. + // ------------------------------------------ + always @(posedge clk or posedge reset) begin + if (reset) begin + packet_in_progress <= 1'b0; + end + else begin + if (last_cycle) + packet_in_progress <= 1'b0; + else if (src_valid) + packet_in_progress <= 1'b1; + end + end + + + // ------------------------------------------ + // Shares + // + // Special case: all-equal shares _should_ be optimized into assigning a + // constant to next_grant_share. + // Special case: all-1's shares _should_ result in the share counter + // being optimized away. + // ------------------------------------------ + // Input | arb shares | counter load value + // 0 | 1 | 0 + // 1 | 1 | 0 + // 2 | 1 | 0 + // 3 | 1 | 0 + // 4 | 1 | 0 + // 5 | 1 | 0 + wire [SHARE_COUNTER_W - 1 : 0] share_0 = 1'd0; + wire [SHARE_COUNTER_W - 1 : 0] share_1 = 1'd0; + wire [SHARE_COUNTER_W - 1 : 0] share_2 = 1'd0; + wire [SHARE_COUNTER_W - 1 : 0] share_3 = 1'd0; + wire [SHARE_COUNTER_W - 1 : 0] share_4 = 1'd0; + wire [SHARE_COUNTER_W - 1 : 0] share_5 = 1'd0; + + // ------------------------------------------ + // Choose the share value corresponding to the grant. + // ------------------------------------------ + reg [SHARE_COUNTER_W - 1 : 0] next_grant_share; + always @* begin + next_grant_share = + share_0 & { SHARE_COUNTER_W {next_grant[0]} } | + share_1 & { SHARE_COUNTER_W {next_grant[1]} } | + share_2 & { SHARE_COUNTER_W {next_grant[2]} } | + share_3 & { SHARE_COUNTER_W {next_grant[3]} } | + share_4 & { SHARE_COUNTER_W {next_grant[4]} } | + share_5 & { SHARE_COUNTER_W {next_grant[5]} }; + end + + // ------------------------------------------ + // Flag to indicate first packet of an arb sequence. + // ------------------------------------------ + wire grant_changed = ~packet_in_progress && ~(|(saved_grant & valid)); + reg first_packet_r; + wire first_packet = grant_changed | first_packet_r; + always @(posedge clk or posedge reset) begin + if (reset) begin + first_packet_r <= 1'b0; + end + else begin + if (update_grant) + first_packet_r <= 1'b1; + else if (last_cycle) + first_packet_r <= 1'b0; + else if (grant_changed) + first_packet_r <= 1'b1; + end + end + + // ------------------------------------------ + // Compute the next share-count value. + // ------------------------------------------ + reg [SHARE_COUNTER_W - 1 : 0] p1_share_count; + reg [SHARE_COUNTER_W - 1 : 0] share_count; + reg share_count_zero_flag; + + always @* begin + if (first_packet) begin + p1_share_count = next_grant_share; + end + else begin + // Update the counter, but don't decrement below 0. + p1_share_count = share_count_zero_flag ? '0 : share_count - 1'b1; + end + end + + // ------------------------------------------ + // Update the share counter and share-counter=zero flag. + // ------------------------------------------ + always @(posedge clk or posedge reset) begin + if (reset) begin + share_count <= '0; + share_count_zero_flag <= 1'b1; + end + else begin + if (last_cycle) begin + share_count <= p1_share_count; + share_count_zero_flag <= (p1_share_count == '0); + end + end + end + + // ------------------------------------------ + // For each input, maintain a final_packet signal which goes active for the + // last packet of a full-share packet sequence. Example: if I have 4 + // shares and I'm continuously requesting, final_packet is active in the + // 4th packet. + // ------------------------------------------ + wire final_packet_0 = 1'b1; + + wire final_packet_1 = 1'b1; + + wire final_packet_2 = 1'b1; + + wire final_packet_3 = 1'b1; + + wire final_packet_4 = 1'b1; + + wire final_packet_5 = 1'b1; + + + // ------------------------------------------ + // Concatenate all final_packet signals (wire or reg) into a handy vector. + // ------------------------------------------ + wire [NUM_INPUTS - 1 : 0] final_packet = { + final_packet_5, + final_packet_4, + final_packet_3, + final_packet_2, + final_packet_1, + final_packet_0 + }; + + // ------------------------------------------ + // ------------------------------------------ + wire p1_done = |(final_packet & grant); + + // ------------------------------------------ + // Flag for the first cycle of packets within an + // arb sequence + // ------------------------------------------ + reg first_cycle; + always @(posedge clk, posedge reset) begin + if (reset) + first_cycle <= 0; + else + first_cycle <= last_cycle && ~p1_done; + end + + + always @* begin + update_grant = 0; + + // ------------------------------------------ + // No arbitration pipeline, update grant whenever + // the current arb winner has consumed all shares, + // or all requests are low + // ------------------------------------------ + update_grant = (last_cycle && p1_done) || (first_cycle && ~(|valid)); + update_grant = last_cycle; + end + + wire save_grant; + assign save_grant = 1; + assign grant = next_grant; + + always @(posedge clk, posedge reset) begin + if (reset) + saved_grant <= '0; + else if (save_grant) + saved_grant <= next_grant; + end + + // ------------------------------------------ + // ------------------------------------------ + // Arbitrator + // ------------------------------------------ + // ------------------------------------------ + + // ------------------------------------------ + // Create a request vector that stays high during + // the packet for unpipelined arbitration. + // + // The pipelined arbitration scheme does not require + // request to be held high during the packet. + // ------------------------------------------ + assign request = valid; + + wire [NUM_INPUTS - 1 : 0] next_grant_from_arb; + + altera_merlin_arbitrator + #( + .NUM_REQUESTERS(NUM_INPUTS), + .SCHEME ("no-arb"), + .PIPELINE (0) + ) arb ( + .clk (clk), + .reset (reset), + .request (request), + .grant (next_grant_from_arb), + .save_top_priority (src_valid), + .increment_top_priority (update_grant) + ); + + assign next_grant = next_grant_from_arb; + + // ------------------------------------------ + // ------------------------------------------ + // Mux + // + // Implemented as a sum of products. + // ------------------------------------------ + // ------------------------------------------ + + assign sink0_ready = src_ready && grant[0]; + assign sink1_ready = src_ready && grant[1]; + assign sink2_ready = src_ready && grant[2]; + assign sink3_ready = src_ready && grant[3]; + assign sink4_ready = src_ready && grant[4]; + assign sink5_ready = src_ready && grant[5]; + + assign src_valid = |(grant & valid); + + always @* begin + src_payload = + sink0_payload & {PAYLOAD_W {grant[0]} } | + sink1_payload & {PAYLOAD_W {grant[1]} } | + sink2_payload & {PAYLOAD_W {grant[2]} } | + sink3_payload & {PAYLOAD_W {grant[3]} } | + sink4_payload & {PAYLOAD_W {grant[4]} } | + sink5_payload & {PAYLOAD_W {grant[5]} }; + end + + // ------------------------------------------ + // Mux Payload Mapping + // ------------------------------------------ + + assign sink0_payload = {sink0_channel,sink0_data, + sink0_startofpacket,sink0_endofpacket}; + assign sink1_payload = {sink1_channel,sink1_data, + sink1_startofpacket,sink1_endofpacket}; + assign sink2_payload = {sink2_channel,sink2_data, + sink2_startofpacket,sink2_endofpacket}; + assign sink3_payload = {sink3_channel,sink3_data, + sink3_startofpacket,sink3_endofpacket}; + assign sink4_payload = {sink4_channel,sink4_data, + sink4_startofpacket,sink4_endofpacket}; + assign sink5_payload = {sink5_channel,sink5_data, + sink5_startofpacket,sink5_endofpacket}; + + assign {src_channel,src_data,src_startofpacket,src_endofpacket} = src_payload; +endmodule + + diff --git a/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_mux_001.sv b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_mux_001.sv new file mode 100644 index 0000000..bde1d55 --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_mm_interconnect_0_rsp_mux_001.sv @@ -0,0 +1,345 @@ +// (C) 2001-2018 Intel Corporation. All rights reserved. +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// (C) 2001-2014 Altera Corporation. All rights reserved. +// Your use of Altera Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Altera Program License Subscription +// Agreement, Altera MegaCore Function License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Altera and sold by +// Altera or its authorized distributors. Please refer to the applicable +// agreement for further details. + + +// $Id: //acds/rel/18.1std/ip/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer.sv.terp#1 $ +// $Revision: #1 $ +// $Date: 2018/07/18 $ +// $Author: psgswbuild $ + +// ------------------------------------------ +// Merlin Multiplexer +// ------------------------------------------ + +`timescale 1 ns / 1 ns + + +// ------------------------------------------ +// Generation parameters: +// output_name: niosII_mm_interconnect_0_rsp_mux_001 +// NUM_INPUTS: 2 +// ARBITRATION_SHARES: 1 1 +// ARBITRATION_SCHEME "no-arb" +// PIPELINE_ARB: 0 +// PKT_TRANS_LOCK: 58 (arbitration locking enabled) +// ST_DATA_W: 94 +// ST_CHANNEL_W: 7 +// ------------------------------------------ + +module niosII_mm_interconnect_0_rsp_mux_001 +( + // ---------------------- + // Sinks + // ---------------------- + input sink0_valid, + input [94-1 : 0] sink0_data, + input [7-1: 0] sink0_channel, + input sink0_startofpacket, + input sink0_endofpacket, + output sink0_ready, + + input sink1_valid, + input [94-1 : 0] sink1_data, + input [7-1: 0] sink1_channel, + input sink1_startofpacket, + input sink1_endofpacket, + output sink1_ready, + + + // ---------------------- + // Source + // ---------------------- + output src_valid, + output [94-1 : 0] src_data, + output [7-1 : 0] src_channel, + output src_startofpacket, + output src_endofpacket, + input src_ready, + + // ---------------------- + // Clock & Reset + // ---------------------- + input clk, + input reset +); + localparam PAYLOAD_W = 94 + 7 + 2; + localparam NUM_INPUTS = 2; + localparam SHARE_COUNTER_W = 1; + localparam PIPELINE_ARB = 0; + localparam ST_DATA_W = 94; + localparam ST_CHANNEL_W = 7; + localparam PKT_TRANS_LOCK = 58; + + // ------------------------------------------ + // Signals + // ------------------------------------------ + wire [NUM_INPUTS - 1 : 0] request; + wire [NUM_INPUTS - 1 : 0] valid; + wire [NUM_INPUTS - 1 : 0] grant; + wire [NUM_INPUTS - 1 : 0] next_grant; + reg [NUM_INPUTS - 1 : 0] saved_grant; + reg [PAYLOAD_W - 1 : 0] src_payload; + wire last_cycle; + reg packet_in_progress; + reg update_grant; + + wire [PAYLOAD_W - 1 : 0] sink0_payload; + wire [PAYLOAD_W - 1 : 0] sink1_payload; + + assign valid[0] = sink0_valid; + assign valid[1] = sink1_valid; + + + // ------------------------------------------ + // ------------------------------------------ + // Grant Logic & Updates + // ------------------------------------------ + // ------------------------------------------ + reg [NUM_INPUTS - 1 : 0] lock; + always @* begin + lock[0] = sink0_data[58]; + lock[1] = sink1_data[58]; + end + + assign last_cycle = src_valid & src_ready & src_endofpacket & ~(|(lock & grant)); + + // ------------------------------------------ + // We're working on a packet at any time valid is high, except + // when this is the endofpacket. + // ------------------------------------------ + always @(posedge clk or posedge reset) begin + if (reset) begin + packet_in_progress <= 1'b0; + end + else begin + if (last_cycle) + packet_in_progress <= 1'b0; + else if (src_valid) + packet_in_progress <= 1'b1; + end + end + + + // ------------------------------------------ + // Shares + // + // Special case: all-equal shares _should_ be optimized into assigning a + // constant to next_grant_share. + // Special case: all-1's shares _should_ result in the share counter + // being optimized away. + // ------------------------------------------ + // Input | arb shares | counter load value + // 0 | 1 | 0 + // 1 | 1 | 0 + wire [SHARE_COUNTER_W - 1 : 0] share_0 = 1'd0; + wire [SHARE_COUNTER_W - 1 : 0] share_1 = 1'd0; + + // ------------------------------------------ + // Choose the share value corresponding to the grant. + // ------------------------------------------ + reg [SHARE_COUNTER_W - 1 : 0] next_grant_share; + always @* begin + next_grant_share = + share_0 & { SHARE_COUNTER_W {next_grant[0]} } | + share_1 & { SHARE_COUNTER_W {next_grant[1]} }; + end + + // ------------------------------------------ + // Flag to indicate first packet of an arb sequence. + // ------------------------------------------ + wire grant_changed = ~packet_in_progress && ~(|(saved_grant & valid)); + reg first_packet_r; + wire first_packet = grant_changed | first_packet_r; + always @(posedge clk or posedge reset) begin + if (reset) begin + first_packet_r <= 1'b0; + end + else begin + if (update_grant) + first_packet_r <= 1'b1; + else if (last_cycle) + first_packet_r <= 1'b0; + else if (grant_changed) + first_packet_r <= 1'b1; + end + end + + // ------------------------------------------ + // Compute the next share-count value. + // ------------------------------------------ + reg [SHARE_COUNTER_W - 1 : 0] p1_share_count; + reg [SHARE_COUNTER_W - 1 : 0] share_count; + reg share_count_zero_flag; + + always @* begin + if (first_packet) begin + p1_share_count = next_grant_share; + end + else begin + // Update the counter, but don't decrement below 0. + p1_share_count = share_count_zero_flag ? '0 : share_count - 1'b1; + end + end + + // ------------------------------------------ + // Update the share counter and share-counter=zero flag. + // ------------------------------------------ + always @(posedge clk or posedge reset) begin + if (reset) begin + share_count <= '0; + share_count_zero_flag <= 1'b1; + end + else begin + if (last_cycle) begin + share_count <= p1_share_count; + share_count_zero_flag <= (p1_share_count == '0); + end + end + end + + // ------------------------------------------ + // For each input, maintain a final_packet signal which goes active for the + // last packet of a full-share packet sequence. Example: if I have 4 + // shares and I'm continuously requesting, final_packet is active in the + // 4th packet. + // ------------------------------------------ + wire final_packet_0 = 1'b1; + + wire final_packet_1 = 1'b1; + + + // ------------------------------------------ + // Concatenate all final_packet signals (wire or reg) into a handy vector. + // ------------------------------------------ + wire [NUM_INPUTS - 1 : 0] final_packet = { + final_packet_1, + final_packet_0 + }; + + // ------------------------------------------ + // ------------------------------------------ + wire p1_done = |(final_packet & grant); + + // ------------------------------------------ + // Flag for the first cycle of packets within an + // arb sequence + // ------------------------------------------ + reg first_cycle; + always @(posedge clk, posedge reset) begin + if (reset) + first_cycle <= 0; + else + first_cycle <= last_cycle && ~p1_done; + end + + + always @* begin + update_grant = 0; + + // ------------------------------------------ + // No arbitration pipeline, update grant whenever + // the current arb winner has consumed all shares, + // or all requests are low + // ------------------------------------------ + update_grant = (last_cycle && p1_done) || (first_cycle && ~(|valid)); + update_grant = last_cycle; + end + + wire save_grant; + assign save_grant = 1; + assign grant = next_grant; + + always @(posedge clk, posedge reset) begin + if (reset) + saved_grant <= '0; + else if (save_grant) + saved_grant <= next_grant; + end + + // ------------------------------------------ + // ------------------------------------------ + // Arbitrator + // ------------------------------------------ + // ------------------------------------------ + + // ------------------------------------------ + // Create a request vector that stays high during + // the packet for unpipelined arbitration. + // + // The pipelined arbitration scheme does not require + // request to be held high during the packet. + // ------------------------------------------ + assign request = valid; + + wire [NUM_INPUTS - 1 : 0] next_grant_from_arb; + + altera_merlin_arbitrator + #( + .NUM_REQUESTERS(NUM_INPUTS), + .SCHEME ("no-arb"), + .PIPELINE (0) + ) arb ( + .clk (clk), + .reset (reset), + .request (request), + .grant (next_grant_from_arb), + .save_top_priority (src_valid), + .increment_top_priority (update_grant) + ); + + assign next_grant = next_grant_from_arb; + + // ------------------------------------------ + // ------------------------------------------ + // Mux + // + // Implemented as a sum of products. + // ------------------------------------------ + // ------------------------------------------ + + assign sink0_ready = src_ready && grant[0]; + assign sink1_ready = src_ready && grant[1]; + + assign src_valid = |(grant & valid); + + always @* begin + src_payload = + sink0_payload & {PAYLOAD_W {grant[0]} } | + sink1_payload & {PAYLOAD_W {grant[1]} }; + end + + // ------------------------------------------ + // Mux Payload Mapping + // ------------------------------------------ + + assign sink0_payload = {sink0_channel,sink0_data, + sink0_startofpacket,sink0_endofpacket}; + assign sink1_payload = {sink1_channel,sink1_data, + sink1_startofpacket,sink1_endofpacket}; + + assign {src_channel,src_data,src_startofpacket,src_endofpacket} = src_payload; +endmodule + + diff --git a/Top/niosII/synthesis/submodules/niosII_sys_clk_timer.v b/Top/niosII/synthesis/submodules/niosII_sys_clk_timer.v new file mode 100644 index 0000000..2f2faac --- /dev/null +++ b/Top/niosII/synthesis/submodules/niosII_sys_clk_timer.v @@ -0,0 +1,211 @@ +//Legal Notice: (C)2022 Altera Corporation. All rights reserved. Your +//use of Altera Corporation's design tools, logic functions and other +//software and tools, and its AMPP partner logic functions, and any +//output files any of the foregoing (including device programming or +//simulation files), and any associated documentation or information are +//expressly subject to the terms and conditions of the Altera Program +//License Subscription Agreement or other applicable license agreement, +//including, without limitation, that your use is for the sole purpose +//of programming logic devices manufactured by Altera and sold by Altera +//or its authorized distributors. Please refer to the applicable +//agreement for further details. + +// synthesis translate_off +`timescale 1ns / 1ps +// synthesis translate_on + +// turn off superfluous verilog processor warnings +// altera message_level Level1 +// altera message_off 10034 10035 10036 10037 10230 10240 10030 + +module niosII_sys_clk_timer ( + // inputs: + address, + chipselect, + clk, + reset_n, + write_n, + writedata, + + // outputs: + irq, + readdata + ) +; + + output irq; + output [ 15: 0] readdata; + input [ 2: 0] address; + input chipselect; + input clk; + input reset_n; + input write_n; + input [ 15: 0] writedata; + + +wire clk_en; +wire control_continuous; +wire control_interrupt_enable; +reg [ 3: 0] control_register; +wire control_wr_strobe; +reg counter_is_running; +wire counter_is_zero; +wire [ 31: 0] counter_load_value; +reg [ 31: 0] counter_snapshot; +reg delayed_unxcounter_is_zeroxx0; +wire do_start_counter; +wire do_stop_counter; +reg force_reload; +reg [ 31: 0] internal_counter; +wire irq; +reg [ 15: 0] period_h_register; +wire period_h_wr_strobe; +reg [ 15: 0] period_l_register; +wire period_l_wr_strobe; +wire [ 15: 0] read_mux_out; +reg [ 15: 0] readdata; +wire snap_h_wr_strobe; +wire snap_l_wr_strobe; +wire [ 31: 0] snap_read_value; +wire snap_strobe; +wire start_strobe; +wire status_wr_strobe; +wire stop_strobe; +wire timeout_event; +reg timeout_occurred; + assign clk_en = 1; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + internal_counter <= 32'hC34F; + else if (counter_is_running || force_reload) + if (counter_is_zero || force_reload) + internal_counter <= counter_load_value; + else + internal_counter <= internal_counter - 1; + end + + + assign counter_is_zero = internal_counter == 0; + assign counter_load_value = {period_h_register, + period_l_register}; + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + force_reload <= 0; + else if (clk_en) + force_reload <= period_h_wr_strobe || period_l_wr_strobe; + end + + + assign do_start_counter = start_strobe; + assign do_stop_counter = (stop_strobe ) || + (force_reload ) || + (counter_is_zero && ~control_continuous ); + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + counter_is_running <= 1'b0; + else if (clk_en) + if (do_start_counter) + counter_is_running <= -1; + else if (do_stop_counter) + counter_is_running <= 0; + end + + + //delayed_unxcounter_is_zeroxx0, which is an e_register + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + delayed_unxcounter_is_zeroxx0 <= 0; + else if (clk_en) + delayed_unxcounter_is_zeroxx0 <= counter_is_zero; + end + + + assign timeout_event = (counter_is_zero) & ~(delayed_unxcounter_is_zeroxx0); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + timeout_occurred <= 0; + else if (clk_en) + if (status_wr_strobe) + timeout_occurred <= 0; + else if (timeout_event) + timeout_occurred <= -1; + end + + + assign irq = timeout_occurred && control_interrupt_enable; + //s1, which is an e_avalon_slave + assign read_mux_out = ({16 {(address == 2)}} & period_l_register) | + ({16 {(address == 3)}} & period_h_register) | + ({16 {(address == 4)}} & snap_read_value[15 : 0]) | + ({16 {(address == 5)}} & snap_read_value[31 : 16]) | + ({16 {(address == 1)}} & control_register) | + ({16 {(address == 0)}} & {counter_is_running, + timeout_occurred}); + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + readdata <= 0; + else if (clk_en) + readdata <= read_mux_out; + end + + + assign period_l_wr_strobe = chipselect && ~write_n && (address == 2); + assign period_h_wr_strobe = chipselect && ~write_n && (address == 3); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + period_l_register <= 49999; + else if (period_l_wr_strobe) + period_l_register <= writedata; + end + + + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + period_h_register <= 0; + else if (period_h_wr_strobe) + period_h_register <= writedata; + end + + + assign snap_l_wr_strobe = chipselect && ~write_n && (address == 4); + assign snap_h_wr_strobe = chipselect && ~write_n && (address == 5); + assign snap_strobe = snap_l_wr_strobe || snap_h_wr_strobe; + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + counter_snapshot <= 0; + else if (snap_strobe) + counter_snapshot <= internal_counter; + end + + + assign snap_read_value = counter_snapshot; + assign control_wr_strobe = chipselect && ~write_n && (address == 1); + always @(posedge clk or negedge reset_n) + begin + if (reset_n == 0) + control_register <= 0; + else if (control_wr_strobe) + control_register <= writedata[3 : 0]; + end + + + assign stop_strobe = writedata[3] && control_wr_strobe; + assign start_strobe = writedata[2] && control_wr_strobe; + assign control_continuous = control_register[1]; + assign control_interrupt_enable = control_register[0]; + assign status_wr_strobe = chipselect && ~write_n && (address == 0); + +endmodule + diff --git a/Top/niosII/synthesis/submodules/periodram.v b/Top/niosII/synthesis/submodules/periodram.v new file mode 100644 index 0000000..7f94151 --- /dev/null +++ b/Top/niosII/synthesis/submodules/periodram.v @@ -0,0 +1,214 @@ +// megafunction wizard: %RAM: 2-PORT% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: altsyncram + +// ============================================================ +// File Name: periodram.v +// Megafunction Name(s): +// altsyncram +// +// Simulation Library Files(s): +// altera_mf +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 14.0.2 Build 209 09/17/2014 SJ Full Version +// ************************************************************ + + +//Copyright (C) 1991-2014 Altera Corporation. All rights reserved. +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files from any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, the Altera Quartus II License Agreement, +//the Altera MegaCore Function License Agreement, or other +//applicable license agreement, including, without limitation, +//that your use is for the sole purpose of programming logic +//devices manufactured by Altera and sold by Altera or its +//authorized distributors. Please refer to the applicable +//agreement for further details. + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module periodram ( + clock, + data, + rdaddress, + wraddress, + wren, + q); + + input clock; + input [31:0] data; + input [3:0] rdaddress; + input [1:0] wraddress; + input wren; + output [7:0] q; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_off +`endif + tri1 clock; + tri0 wren; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_on +`endif + + wire [7:0] sub_wire0; + wire [7:0] q = sub_wire0[7:0]; + + altsyncram altsyncram_component ( + .address_a (wraddress), + .address_b (rdaddress), + .clock0 (clock), + .data_a (data), + .wren_a (wren), + .q_b (sub_wire0), + .aclr0 (1'b0), + .aclr1 (1'b0), + .addressstall_a (1'b0), + .addressstall_b (1'b0), + .byteena_a (1'b1), + .byteena_b (1'b1), + .clock1 (1'b1), + .clocken0 (1'b1), + .clocken1 (1'b1), + .clocken2 (1'b1), + .clocken3 (1'b1), + .data_b ({8{1'b1}}), + .eccstatus (), + .q_a (), + .rden_a (1'b1), + .rden_b (1'b1), + .wren_b (1'b0)); + defparam + altsyncram_component.address_aclr_b = "NONE", + altsyncram_component.address_reg_b = "CLOCK0", + altsyncram_component.clock_enable_input_a = "BYPASS", + altsyncram_component.clock_enable_input_b = "BYPASS", + altsyncram_component.clock_enable_output_b = "BYPASS", + altsyncram_component.intended_device_family = "Cyclone IV E", + altsyncram_component.lpm_type = "altsyncram", + altsyncram_component.numwords_a = 4, + altsyncram_component.numwords_b = 16, + altsyncram_component.operation_mode = "DUAL_PORT", + altsyncram_component.outdata_aclr_b = "NONE", + altsyncram_component.outdata_reg_b = "UNREGISTERED", + altsyncram_component.power_up_uninitialized = "FALSE", + altsyncram_component.read_during_write_mode_mixed_ports = "DONT_CARE", + altsyncram_component.widthad_a = 2, + altsyncram_component.widthad_b = 4, + altsyncram_component.width_a = 32, + altsyncram_component.width_b = 8, + altsyncram_component.width_byteena_a = 1; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0" +// Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC "0" +// Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC "0" +// Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC "0" +// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC "0" +// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC "0" +// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8" +// Retrieval info: PRIVATE: BlankMemory NUMERIC "1" +// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0" +// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC "0" +// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0" +// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC "0" +// Retrieval info: PRIVATE: CLRdata NUMERIC "0" +// Retrieval info: PRIVATE: CLRq NUMERIC "0" +// Retrieval info: PRIVATE: CLRrdaddress NUMERIC "0" +// Retrieval info: PRIVATE: CLRrren NUMERIC "0" +// Retrieval info: PRIVATE: CLRwraddress NUMERIC "0" +// Retrieval info: PRIVATE: CLRwren NUMERIC "0" +// Retrieval info: PRIVATE: Clock NUMERIC "0" +// Retrieval info: PRIVATE: Clock_A NUMERIC "0" +// Retrieval info: PRIVATE: Clock_B NUMERIC "0" +// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0" +// Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC "0" +// Retrieval info: PRIVATE: INDATA_REG_B NUMERIC "0" +// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_B" +// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0" +// Retrieval info: PRIVATE: JTAG_ID STRING "NONE" +// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0" +// Retrieval info: PRIVATE: MEMSIZE NUMERIC "128" +// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC "0" +// Retrieval info: PRIVATE: MIFfilename STRING "" +// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC "2" +// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC "0" +// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC "0" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC "2" +// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC "3" +// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC "3" +// Retrieval info: PRIVATE: REGdata NUMERIC "1" +// Retrieval info: PRIVATE: REGq NUMERIC "1" +// Retrieval info: PRIVATE: REGrdaddress NUMERIC "1" +// Retrieval info: PRIVATE: REGrren NUMERIC "1" +// Retrieval info: PRIVATE: REGwraddress NUMERIC "1" +// Retrieval info: PRIVATE: REGwren NUMERIC "1" +// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +// Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC "0" +// Retrieval info: PRIVATE: UseDPRAM NUMERIC "1" +// Retrieval info: PRIVATE: VarWidth NUMERIC "1" +// Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC "32" +// Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC "8" +// Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC "32" +// Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC "8" +// Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC "0" +// Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC "0" +// Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC "0" +// Retrieval info: PRIVATE: enable NUMERIC "0" +// Retrieval info: PRIVATE: rden NUMERIC "0" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING "NONE" +// Retrieval info: CONSTANT: ADDRESS_REG_B STRING "CLOCK0" +// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS" +// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING "BYPASS" +// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING "BYPASS" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" +// Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram" +// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "4" +// Retrieval info: CONSTANT: NUMWORDS_B NUMERIC "16" +// Retrieval info: CONSTANT: OPERATION_MODE STRING "DUAL_PORT" +// Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING "NONE" +// Retrieval info: CONSTANT: OUTDATA_REG_B STRING "UNREGISTERED" +// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING "FALSE" +// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_MIXED_PORTS STRING "DONT_CARE" +// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "2" +// Retrieval info: CONSTANT: WIDTHAD_B NUMERIC "4" +// Retrieval info: CONSTANT: WIDTH_A NUMERIC "32" +// Retrieval info: CONSTANT: WIDTH_B NUMERIC "8" +// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1" +// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC "clock" +// Retrieval info: USED_PORT: data 0 0 32 0 INPUT NODEFVAL "data[31..0]" +// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]" +// Retrieval info: USED_PORT: rdaddress 0 0 4 0 INPUT NODEFVAL "rdaddress[3..0]" +// Retrieval info: USED_PORT: wraddress 0 0 2 0 INPUT NODEFVAL "wraddress[1..0]" +// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND "wren" +// Retrieval info: CONNECT: @address_a 0 0 2 0 wraddress 0 0 2 0 +// Retrieval info: CONNECT: @address_b 0 0 4 0 rdaddress 0 0 4 0 +// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0 +// Retrieval info: CONNECT: @data_a 0 0 32 0 data 0 0 32 0 +// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0 +// Retrieval info: CONNECT: q 0 0 8 0 @q_b 0 0 8 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL periodram.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL periodram.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL periodram.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL periodram.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL periodram_inst.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL periodram_bb.v FALSE +// Retrieval info: LIB_FILE: altera_mf diff --git a/Top/semafor.qsf b/Top/semafor.qsf index 38eff02..f0105f3 100644 --- a/Top/semafor.qsf +++ b/Top/semafor.qsf @@ -38,7 +38,7 @@ set_global_assignment -name FAMILY "Cyclone IV E" set_global_assignment -name DEVICE EP4CE115F29C7 -set_global_assignment -name TOP_LEVEL_ENTITY semafor +set_global_assignment -name TOP_LEVEL_ENTITY niosII set_global_assignment -name ORIGINAL_QUARTUS_VERSION 18.1.0 set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:34:55 OCTOBER 18, 2022" set_global_assignment -name LAST_QUARTUS_VERSION "18.1.0 Lite Edition" @@ -49,4 +49,11 @@ set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (SystemVerilog)" set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation -set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "SYSTEMVERILOG HDL" -section_id eda_simulation \ No newline at end of file +set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "SYSTEMVERILOG HDL" -section_id eda_simulation +set_global_assignment -name QSYS_FILE niosII.qsys +set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW" +set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" +set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top +set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top +set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top +set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top \ No newline at end of file