queue size: 0 starting:niosII "niosII" Transform: CustomInstructionTransform 11 modules, 33 connections]]> Transform: MMTransform Transform: InitialInterconnectTransform 7 modules, 27 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform 17 modules, 67 connections]]> Transform: IDPadTransform Transform: DomainTransform Transform merlin_domain_transform not run on matched interfaces cpu.data_master and cpu_data_master_translator.avalon_anti_master_0 Transform merlin_domain_transform not run on matched interfaces cpu.instruction_master and cpu_instruction_master_translator.avalon_anti_master_0 Transform merlin_domain_transform not run on matched interfaces jtag_uart_avalon_jtag_slave_translator.avalon_anti_slave_0 and jtag_uart.avalon_jtag_slave Transform merlin_domain_transform not run on matched interfaces perf_counter_control_slave_translator.avalon_anti_slave_0 and perf_counter.control_slave Transform merlin_domain_transform not run on matched interfaces sem_ctl_slave_translator.avalon_anti_slave_0 and sem.ctl_slave Transform merlin_domain_transform not run on matched interfaces cpu_debug_mem_slave_translator.avalon_anti_slave_0 and cpu.debug_mem_slave Transform merlin_domain_transform not run on matched interfaces sem_ram_slave_translator.avalon_anti_slave_0 and sem.ram_slave Transform merlin_domain_transform not run on matched interfaces sys_clk_timer_s1_translator.avalon_anti_slave_0 and sys_clk_timer.s1 Transform merlin_domain_transform not run on matched interfaces mem_s2_translator.avalon_anti_slave_0 and mem.s2 Transform merlin_domain_transform not run on matched interfaces mem_s1_translator.avalon_anti_slave_0 and mem.s1 36 modules, 196 connections]]> Transform: RouterTransform 46 modules, 236 connections]]> Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform 65 modules, 284 connections]]> Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform 67 modules, 350 connections]]> Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 12 modules, 37 connections]]> 12 modules, 37 connections]]> Transform: InterruptMapperTransform 13 modules, 41 connections]]> Transform: InterruptSyncTransform Transform: InterruptFanoutTransform Transform: AvalonStreamingTransform Transform: ResetAdaptation 15 modules, 43 connections]]> "No matching role found for cpu:custom_instruction_master:E_ci_multi_clock (clk)" "No matching role found for cpu:custom_instruction_master:E_ci_multi_reset_req (reset_req)" "No matching role found for cpu:custom_instruction_master:E_ci_multi_reset (reset)" niosII" reuses countones_ci "submodules/countones"]]> niosII" reuses altera_nios2_gen2 "submodules/niosII_cpu"]]> niosII" reuses altera_avalon_jtag_uart "submodules/niosII_jtag_uart"]]> niosII" reuses altera_avalon_onchip_memory2 "submodules/niosII_mem"]]> niosII" reuses altera_avalon_performance_counter "submodules/niosII_perf_counter"]]> niosII" reuses sem "submodules/dec"]]> niosII" reuses altera_avalon_timer "submodules/niosII_sys_clk_timer"]]> niosII" reuses altera_customins_master_translator "submodules/altera_customins_master_translator"]]> niosII" reuses altera_customins_xconnect "submodules/niosII_cpu_custom_instruction_master_comb_xconnect"]]> niosII" reuses altera_customins_slave_translator "submodules/altera_customins_slave_translator"]]> niosII" reuses altera_mm_interconnect "submodules/niosII_mm_interconnect_0"]]> niosII" reuses altera_irq_mapper "submodules/niosII_irq_mapper"]]> niosII" reuses altera_reset_controller "submodules/altera_reset_controller"]]> queue size: 12 starting:countones_ci "submodules/countones" niosII" instantiated countones_ci "countones"]]> queue size: 11 starting:altera_nios2_gen2 "submodules/niosII_cpu" Transform: CustomInstructionTransform No custom instruction connections, skipping transform 3 modules, 3 connections]]> Transform: MMTransform Transform: InterruptMapperTransform Transform: InterruptSyncTransform Transform: InterruptFanoutTransform Transform: AvalonStreamingTransform Transform: ResetAdaptation cpu" reuses altera_nios2_gen2_unit "submodules/niosII_cpu_cpu"]]> niosII" instantiated altera_nios2_gen2 "cpu"]]> queue size: 66 starting:altera_nios2_gen2_unit "submodules/niosII_cpu_cpu" Starting RTL generation for module 'niosII_cpu_cpu' Generation command is [exec C:/Software/intelFPGA_lite/18.1/quartus/bin64//eperlcmd.exe -I C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=niosII_cpu_cpu --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0015_cpu_gen/ --quartus_bindir=C:/Software/intelFPGA_lite/18.1/quartus/bin64/ --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0015_cpu_gen//niosII_cpu_cpu_processor_configuration.pl --do_build_sim=0 ] # 2022.12.24 22:19:19 (*) Starting Nios II generation # 2022.12.24 22:19:19 (*) Checking for plaintext license. # 2022.12.24 22:19:20 (*) Couldn't query license setup in Quartus directory C:/Software/intelFPGA_lite/18.1/quartus/bin64/ # 2022.12.24 22:19:20 (*) Defaulting to contents of LM_LICENSE_FILE environment variable # 2022.12.24 22:19:20 (*) LM_LICENSE_FILE environment variable is empty # 2022.12.24 22:19:20 (*) Plaintext license not found. # 2022.12.24 22:19:20 (*) No license required to generate encrypted Nios II/e. # 2022.12.24 22:19:20 (*) Elaborating CPU configuration settings # 2022.12.24 22:19:20 (*) Creating all objects for CPU # 2022.12.24 22:19:22 (*) Generating RTL from CPU objects # 2022.12.24 22:19:22 (*) Creating plain-text RTL # 2022.12.24 22:19:22 (*) Done Nios II generation Done RTL generation for module 'niosII_cpu_cpu' cpu" instantiated altera_nios2_gen2_unit "cpu"]]> queue size: 11 starting:altera_avalon_jtag_uart "submodules/niosII_jtag_uart" Starting RTL generation for module 'niosII_jtag_uart' Generation command is [exec C:/software/intelfpga_lite/18.1/quartus/bin64/perl/bin/perl.exe -I C:/software/intelfpga_lite/18.1/quartus/bin64/perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/generate_rtl.pl --name=niosII_jtag_uart --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0005_jtag_uart_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0005_jtag_uart_gen//niosII_jtag_uart_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'niosII_jtag_uart' niosII" instantiated altera_avalon_jtag_uart "jtag_uart"]]> queue size: 10 starting:altera_avalon_onchip_memory2 "submodules/niosII_mem" Starting RTL generation for module 'niosII_mem' Generation command is [exec C:/software/intelfpga_lite/18.1/quartus/bin64/perl/bin/perl.exe -I C:/software/intelfpga_lite/18.1/quartus/bin64/perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=niosII_mem --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0006_mem_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0006_mem_gen//niosII_mem_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'niosII_mem' niosII" instantiated altera_avalon_onchip_memory2 "mem"]]> queue size: 9 starting:altera_avalon_performance_counter "submodules/niosII_perf_counter" Starting RTL generation for module 'niosII_perf_counter' Generation command is [exec C:/software/intelfpga_lite/18.1/quartus/bin64/perl/bin/perl.exe -I C:/software/intelfpga_lite/18.1/quartus/bin64/perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_performance_counter -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_performance_counter/generate_rtl.pl --name=niosII_perf_counter --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0007_perf_counter_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0007_perf_counter_gen//niosII_perf_counter_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'niosII_perf_counter' niosII" instantiated altera_avalon_performance_counter "perf_counter"]]> queue size: 8 starting:sem "submodules/dec" niosII" instantiated sem "sem"]]> queue size: 7 starting:altera_avalon_timer "submodules/niosII_sys_clk_timer" Starting RTL generation for module 'niosII_sys_clk_timer' Generation command is [exec C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/bin/perl.exe -I C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer/generate_rtl.pl --name=niosII_sys_clk_timer --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0009_sys_clk_timer_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0009_sys_clk_timer_gen//niosII_sys_clk_timer_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'niosII_sys_clk_timer' niosII" instantiated altera_avalon_timer "sys_clk_timer"]]> queue size: 6 starting:altera_customins_master_translator "submodules/altera_customins_master_translator" niosII" instantiated altera_customins_master_translator "cpu_custom_instruction_master_translator"]]> queue size: 5 starting:altera_customins_xconnect "submodules/niosII_cpu_custom_instruction_master_comb_xconnect" niosII" instantiated altera_customins_xconnect "cpu_custom_instruction_master_comb_xconnect"]]> queue size: 4 starting:altera_customins_slave_translator "submodules/altera_customins_slave_translator" niosII" instantiated altera_customins_slave_translator "cpu_custom_instruction_master_comb_slave_translator0"]]> queue size: 3 starting:altera_mm_interconnect "submodules/niosII_mm_interconnect_0" Transform: CustomInstructionTransform No custom instruction connections, skipping transform 60 modules, 199 connections]]> Transform: MMTransform Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InterruptMapperTransform Transform: InterruptSyncTransform Transform: InterruptFanoutTransform Transform: AvalonStreamingTransform Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.008s/0.016s Timing: ELA:1/0.000s Timing: COM:3/0.076s/0.101s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.001s Timing: ELA:2/0.001s/0.001s Timing: ELA:1/0.018s Timing: COM:3/0.039s/0.054s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.015s Timing: ELA:2/0.000s/0.000s Timing: ELA:1/0.016s Timing: COM:3/0.026s/0.031s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.001s/0.001s Timing: ELA:1/0.015s Timing: COM:3/0.028s/0.037s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.007s/0.015s Timing: ELA:1/0.000s Timing: COM:3/0.026s/0.031s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.000s Timing: ELA:1/0.015s Timing: COM:3/0.020s/0.031s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.000s Timing: ELA:1/0.015s Timing: COM:3/0.020s/0.031s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.000s Timing: ELA:1/0.000s Timing: COM:3/0.015s/0.016s 68 modules, 223 connections]]> Transform: ResetAdaptation mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_001"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_005"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_009"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux_003"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux_001"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> niosII" instantiated altera_mm_interconnect "mm_interconnect_0"]]> queue size: 65 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" mm_interconnect_0" instantiated altera_merlin_master_translator "cpu_data_master_translator"]]> queue size: 63 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" mm_interconnect_0" instantiated altera_merlin_slave_translator "jtag_uart_avalon_jtag_slave_translator"]]> queue size: 55 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" mm_interconnect_0" instantiated altera_merlin_master_agent "cpu_data_master_agent"]]> queue size: 53 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" mm_interconnect_0" instantiated altera_merlin_slave_agent "jtag_uart_avalon_jtag_slave_agent"]]> queue size: 52 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" mm_interconnect_0" instantiated altera_avalon_sc_fifo "jtag_uart_avalon_jtag_slave_agent_rsp_fifo"]]> queue size: 37 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router" mm_interconnect_0" instantiated altera_merlin_router "router"]]> queue size: 36 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_001" mm_interconnect_0" instantiated altera_merlin_router "router_001"]]> queue size: 35 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002" mm_interconnect_0" instantiated altera_merlin_router "router_002"]]> queue size: 32 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_005" mm_interconnect_0" instantiated altera_merlin_router "router_005"]]> queue size: 28 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_009" mm_interconnect_0" instantiated altera_merlin_router "router_009"]]> queue size: 27 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux"]]> queue size: 26 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux_001"]]> queue size: 25 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux"]]> queue size: 22 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux_003" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux_003"]]> C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 17 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux"]]> queue size: 9 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux"]]> C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 8 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux_001" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux_001"]]> C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 7 starting:altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter" Transform: CustomInstructionTransform No custom instruction connections, skipping transform 3 modules, 3 connections]]> Transform: MMTransform Transform: InterruptMapperTransform Transform: InterruptSyncTransform Transform: InterruptFanoutTransform Transform: AvalonStreamingTransform Transform: ResetAdaptation avalon_st_adapter" reuses error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0"]]> mm_interconnect_0" instantiated altera_avalon_st_adapter "avalon_st_adapter"]]> queue size: 0 starting:error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" avalon_st_adapter" instantiated error_adapter "error_adapter_0"]]> queue size: 68 starting:altera_irq_mapper "submodules/niosII_irq_mapper" niosII" instantiated altera_irq_mapper "irq_mapper"]]> queue size: 67 starting:altera_reset_controller "submodules/altera_reset_controller" niosII" instantiated altera_reset_controller "rst_controller"]]> queue size: 12 starting:countones_ci "submodules/countones" niosII" instantiated countones_ci "countones"]]> queue size: 11 starting:altera_nios2_gen2 "submodules/niosII_cpu" Transform: CustomInstructionTransform No custom instruction connections, skipping transform 3 modules, 3 connections]]> Transform: MMTransform Transform: InterruptMapperTransform Transform: InterruptSyncTransform Transform: InterruptFanoutTransform Transform: AvalonStreamingTransform Transform: ResetAdaptation cpu" reuses altera_nios2_gen2_unit "submodules/niosII_cpu_cpu"]]> niosII" instantiated altera_nios2_gen2 "cpu"]]> queue size: 66 starting:altera_nios2_gen2_unit "submodules/niosII_cpu_cpu" Starting RTL generation for module 'niosII_cpu_cpu' Generation command is [exec C:/Software/intelFPGA_lite/18.1/quartus/bin64//eperlcmd.exe -I C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=niosII_cpu_cpu --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0015_cpu_gen/ --quartus_bindir=C:/Software/intelFPGA_lite/18.1/quartus/bin64/ --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0015_cpu_gen//niosII_cpu_cpu_processor_configuration.pl --do_build_sim=0 ] # 2022.12.24 22:19:19 (*) Starting Nios II generation # 2022.12.24 22:19:19 (*) Checking for plaintext license. # 2022.12.24 22:19:20 (*) Couldn't query license setup in Quartus directory C:/Software/intelFPGA_lite/18.1/quartus/bin64/ # 2022.12.24 22:19:20 (*) Defaulting to contents of LM_LICENSE_FILE environment variable # 2022.12.24 22:19:20 (*) LM_LICENSE_FILE environment variable is empty # 2022.12.24 22:19:20 (*) Plaintext license not found. # 2022.12.24 22:19:20 (*) No license required to generate encrypted Nios II/e. # 2022.12.24 22:19:20 (*) Elaborating CPU configuration settings # 2022.12.24 22:19:20 (*) Creating all objects for CPU # 2022.12.24 22:19:22 (*) Generating RTL from CPU objects # 2022.12.24 22:19:22 (*) Creating plain-text RTL # 2022.12.24 22:19:22 (*) Done Nios II generation Done RTL generation for module 'niosII_cpu_cpu' cpu" instantiated altera_nios2_gen2_unit "cpu"]]> queue size: 11 starting:altera_avalon_jtag_uart "submodules/niosII_jtag_uart" Starting RTL generation for module 'niosII_jtag_uart' Generation command is [exec C:/software/intelfpga_lite/18.1/quartus/bin64/perl/bin/perl.exe -I C:/software/intelfpga_lite/18.1/quartus/bin64/perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/generate_rtl.pl --name=niosII_jtag_uart --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0005_jtag_uart_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0005_jtag_uart_gen//niosII_jtag_uart_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'niosII_jtag_uart' niosII" instantiated altera_avalon_jtag_uart "jtag_uart"]]> queue size: 10 starting:altera_avalon_onchip_memory2 "submodules/niosII_mem" Starting RTL generation for module 'niosII_mem' Generation command is [exec C:/software/intelfpga_lite/18.1/quartus/bin64/perl/bin/perl.exe -I C:/software/intelfpga_lite/18.1/quartus/bin64/perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=niosII_mem --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0006_mem_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0006_mem_gen//niosII_mem_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'niosII_mem' niosII" instantiated altera_avalon_onchip_memory2 "mem"]]> queue size: 9 starting:altera_avalon_performance_counter "submodules/niosII_perf_counter" Starting RTL generation for module 'niosII_perf_counter' Generation command is [exec C:/software/intelfpga_lite/18.1/quartus/bin64/perl/bin/perl.exe -I C:/software/intelfpga_lite/18.1/quartus/bin64/perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_performance_counter -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_performance_counter/generate_rtl.pl --name=niosII_perf_counter --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0007_perf_counter_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0007_perf_counter_gen//niosII_perf_counter_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'niosII_perf_counter' niosII" instantiated altera_avalon_performance_counter "perf_counter"]]> queue size: 8 starting:sem "submodules/dec" niosII" instantiated sem "sem"]]> queue size: 7 starting:altera_avalon_timer "submodules/niosII_sys_clk_timer" Starting RTL generation for module 'niosII_sys_clk_timer' Generation command is [exec C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/bin/perl.exe -I C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer/generate_rtl.pl --name=niosII_sys_clk_timer --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0009_sys_clk_timer_gen/ --quartus_dir=C:/software/intelfpga_lite/18.1/quartus --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0009_sys_clk_timer_gen//niosII_sys_clk_timer_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'niosII_sys_clk_timer' niosII" instantiated altera_avalon_timer "sys_clk_timer"]]> queue size: 6 starting:altera_customins_master_translator "submodules/altera_customins_master_translator" niosII" instantiated altera_customins_master_translator "cpu_custom_instruction_master_translator"]]> queue size: 5 starting:altera_customins_xconnect "submodules/niosII_cpu_custom_instruction_master_comb_xconnect" niosII" instantiated altera_customins_xconnect "cpu_custom_instruction_master_comb_xconnect"]]> queue size: 4 starting:altera_customins_slave_translator "submodules/altera_customins_slave_translator" niosII" instantiated altera_customins_slave_translator "cpu_custom_instruction_master_comb_slave_translator0"]]> queue size: 3 starting:altera_mm_interconnect "submodules/niosII_mm_interconnect_0" Transform: CustomInstructionTransform No custom instruction connections, skipping transform 60 modules, 199 connections]]> Transform: MMTransform Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform No Avalon connections, skipping transform Transform: IDPadTransform Transform: DomainTransform Transform: RouterTransform Transform: TrafficLimiterTransform Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform Transform: ClockCrossingTransform Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform 60 modules, 199 connections]]> Transform: InterruptMapperTransform Transform: InterruptSyncTransform Transform: InterruptFanoutTransform Transform: AvalonStreamingTransform Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.008s/0.016s Timing: ELA:1/0.000s Timing: COM:3/0.076s/0.101s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.001s Timing: ELA:2/0.001s/0.001s Timing: ELA:1/0.018s Timing: COM:3/0.039s/0.054s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.015s Timing: ELA:2/0.000s/0.000s Timing: ELA:1/0.016s Timing: COM:3/0.026s/0.031s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.001s/0.001s Timing: ELA:1/0.015s Timing: COM:3/0.028s/0.037s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.007s/0.015s Timing: ELA:1/0.000s Timing: COM:3/0.026s/0.031s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.000s Timing: ELA:1/0.015s Timing: COM:3/0.020s/0.031s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.000s Timing: ELA:1/0.015s Timing: COM:3/0.020s/0.031s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.000s Timing: ELA:1/0.000s Timing: COM:3/0.015s/0.016s 68 modules, 223 connections]]> Transform: ResetAdaptation mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_001"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_005"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/niosII_mm_interconnect_0_router_009"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux_003"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux_001"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter"]]> niosII" instantiated altera_mm_interconnect "mm_interconnect_0"]]> queue size: 65 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" mm_interconnect_0" instantiated altera_merlin_master_translator "cpu_data_master_translator"]]> queue size: 63 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" mm_interconnect_0" instantiated altera_merlin_slave_translator "jtag_uart_avalon_jtag_slave_translator"]]> queue size: 55 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" mm_interconnect_0" instantiated altera_merlin_master_agent "cpu_data_master_agent"]]> queue size: 53 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" mm_interconnect_0" instantiated altera_merlin_slave_agent "jtag_uart_avalon_jtag_slave_agent"]]> queue size: 52 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" mm_interconnect_0" instantiated altera_avalon_sc_fifo "jtag_uart_avalon_jtag_slave_agent_rsp_fifo"]]> queue size: 37 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router" mm_interconnect_0" instantiated altera_merlin_router "router"]]> queue size: 36 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_001" mm_interconnect_0" instantiated altera_merlin_router "router_001"]]> queue size: 35 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002" mm_interconnect_0" instantiated altera_merlin_router "router_002"]]> queue size: 32 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_005" mm_interconnect_0" instantiated altera_merlin_router "router_005"]]> queue size: 28 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_009" mm_interconnect_0" instantiated altera_merlin_router "router_009"]]> queue size: 27 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux"]]> queue size: 26 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux_001"]]> queue size: 25 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux"]]> queue size: 22 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux_003" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux_003"]]> C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 17 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux"]]> queue size: 9 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux"]]> C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 8 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux_001" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux_001"]]> C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 7 starting:altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter" Transform: CustomInstructionTransform No custom instruction connections, skipping transform 3 modules, 3 connections]]> Transform: MMTransform Transform: InterruptMapperTransform Transform: InterruptSyncTransform Transform: InterruptFanoutTransform Transform: AvalonStreamingTransform Transform: ResetAdaptation avalon_st_adapter" reuses error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0"]]> mm_interconnect_0" instantiated altera_avalon_st_adapter "avalon_st_adapter"]]> queue size: 0 starting:error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" avalon_st_adapter" instantiated error_adapter "error_adapter_0"]]> queue size: 68 starting:altera_irq_mapper "submodules/niosII_irq_mapper" niosII" instantiated altera_irq_mapper "irq_mapper"]]> queue size: 67 starting:altera_reset_controller "submodules/altera_reset_controller" niosII" instantiated altera_reset_controller "rst_controller"]]> queue size: 66 starting:altera_nios2_gen2_unit "submodules/niosII_cpu_cpu" Starting RTL generation for module 'niosII_cpu_cpu' Generation command is [exec C:/Software/intelFPGA_lite/18.1/quartus/bin64//eperlcmd.exe -I C:/Software/intelFPGA_lite/18.1/quartus/bin64//perl/lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/europa -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin/perl_lib -I C:/software/intelfpga_lite/18.1/quartus/sopc_builder/bin -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- C:/software/intelfpga_lite/18.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=niosII_cpu_cpu --dir=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0015_cpu_gen/ --quartus_bindir=C:/Software/intelFPGA_lite/18.1/quartus/bin64/ --verilog --config=C:/Users/IVAN-I~1/AppData/Local/Temp/alt9350_6910880825044437279.dir/0015_cpu_gen//niosII_cpu_cpu_processor_configuration.pl --do_build_sim=0 ] # 2022.12.24 22:19:19 (*) Starting Nios II generation # 2022.12.24 22:19:19 (*) Checking for plaintext license. # 2022.12.24 22:19:20 (*) Couldn't query license setup in Quartus directory C:/Software/intelFPGA_lite/18.1/quartus/bin64/ # 2022.12.24 22:19:20 (*) Defaulting to contents of LM_LICENSE_FILE environment variable # 2022.12.24 22:19:20 (*) LM_LICENSE_FILE environment variable is empty # 2022.12.24 22:19:20 (*) Plaintext license not found. # 2022.12.24 22:19:20 (*) No license required to generate encrypted Nios II/e. # 2022.12.24 22:19:20 (*) Elaborating CPU configuration settings # 2022.12.24 22:19:20 (*) Creating all objects for CPU # 2022.12.24 22:19:22 (*) Generating RTL from CPU objects # 2022.12.24 22:19:22 (*) Creating plain-text RTL # 2022.12.24 22:19:22 (*) Done Nios II generation Done RTL generation for module 'niosII_cpu_cpu' cpu" instantiated altera_nios2_gen2_unit "cpu"]]> queue size: 65 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" mm_interconnect_0" instantiated altera_merlin_master_translator "cpu_data_master_translator"]]> queue size: 63 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" mm_interconnect_0" instantiated altera_merlin_slave_translator "jtag_uart_avalon_jtag_slave_translator"]]> queue size: 55 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" mm_interconnect_0" instantiated altera_merlin_master_agent "cpu_data_master_agent"]]> queue size: 53 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" mm_interconnect_0" instantiated altera_merlin_slave_agent "jtag_uart_avalon_jtag_slave_agent"]]> queue size: 52 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" mm_interconnect_0" instantiated altera_avalon_sc_fifo "jtag_uart_avalon_jtag_slave_agent_rsp_fifo"]]> queue size: 37 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router" mm_interconnect_0" instantiated altera_merlin_router "router"]]> queue size: 36 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_001" mm_interconnect_0" instantiated altera_merlin_router "router_001"]]> queue size: 35 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_002" mm_interconnect_0" instantiated altera_merlin_router "router_002"]]> queue size: 32 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_005" mm_interconnect_0" instantiated altera_merlin_router "router_005"]]> queue size: 28 starting:altera_merlin_router "submodules/niosII_mm_interconnect_0_router_009" mm_interconnect_0" instantiated altera_merlin_router "router_009"]]> queue size: 27 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux"]]> queue size: 26 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_cmd_demux_001" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux_001"]]> queue size: 25 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux"]]> queue size: 22 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_cmd_mux_003" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux_003"]]> C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 17 starting:altera_merlin_demultiplexer "submodules/niosII_mm_interconnect_0_rsp_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux"]]> queue size: 9 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux"]]> C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 8 starting:altera_merlin_multiplexer "submodules/niosII_mm_interconnect_0_rsp_mux_001" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux_001"]]> C:/Software/FPGA/iu3-31m/Lab2/Top/niosII/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 7 starting:altera_avalon_st_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter" Transform: CustomInstructionTransform No custom instruction connections, skipping transform 3 modules, 3 connections]]> Transform: MMTransform Transform: InterruptMapperTransform Transform: InterruptSyncTransform Transform: InterruptFanoutTransform Transform: AvalonStreamingTransform Transform: ResetAdaptation avalon_st_adapter" reuses error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0"]]> mm_interconnect_0" instantiated altera_avalon_st_adapter "avalon_st_adapter"]]> queue size: 0 starting:error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" avalon_st_adapter" instantiated error_adapter "error_adapter_0"]]> queue size: 0 starting:error_adapter "submodules/niosII_mm_interconnect_0_avalon_st_adapter_error_adapter_0" avalon_st_adapter" instantiated error_adapter "error_adapter_0"]]>