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QSYS
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1666174853
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VERILOG
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0
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NONE
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UNKNOWN
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true
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clock
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in_clk
Input
1
clk
qsys.ui.export_name
reset
java.lang.String
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
NONE
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
false
reset_n
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1
reset_n
java.lang.String
clk_in
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50000000
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clk
cpu.clk
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clk
jtag_uart.clk
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clk
sys_clk_timer.clk
false
mem
clk1
mem.clk1
false
sem
clock
sem.clock
false
mm_interconnect_0
clk_clk
mm_interconnect_0.clk_clk
false
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clk
irq_mapper.clk
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clk
rst_controller.clk
false
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clk
rst_translator.clk
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true
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[Ljava.lang.String;
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reset_n
debug.hostConnection
type jtag id 70:34|110:135
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0
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0x00020820
embeddedsw.CMacro.CPU_ARCH_NIOS2_R1
embeddedsw.CMacro.CPU_FREQ
50000000u
embeddedsw.CMacro.CPU_ID_SIZE
1
embeddedsw.CMacro.CPU_ID_VALUE
0x00000000
embeddedsw.CMacro.CPU_IMPLEMENTATION
"tiny"
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18
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0
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0
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0
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0x00000020
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0
embeddedsw.CMacro.FLASH_ACCELERATOR_LINE_SIZE
0
embeddedsw.CMacro.FLUSHDA_SUPPORTED
embeddedsw.CMacro.HARDWARE_DIVIDE_PRESENT
0
embeddedsw.CMacro.HARDWARE_MULTIPLY_PRESENT
0
embeddedsw.CMacro.HARDWARE_MULX_PRESENT
0
embeddedsw.CMacro.HAS_DEBUG_CORE
1
embeddedsw.CMacro.HAS_DEBUG_STUB
embeddedsw.CMacro.HAS_ILLEGAL_INSTRUCTION_EXCEPTION
embeddedsw.CMacro.HAS_JMPI_INSTRUCTION
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0
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0
embeddedsw.CMacro.ICACHE_SIZE
0
embeddedsw.CMacro.INST_ADDR_WIDTH
18
embeddedsw.CMacro.OCI_VERSION
1
embeddedsw.CMacro.RESET_ADDR
0x00000000
embeddedsw.configuration.DataCacheVictimBufImpl
ram
embeddedsw.configuration.HDLSimCachesCleared
1
embeddedsw.configuration.breakOffset
32
embeddedsw.configuration.breakSlave
cpu.debug_mem_slave
embeddedsw.configuration.cpuArchitecture
Nios II
embeddedsw.configuration.exceptionOffset
32
embeddedsw.configuration.exceptionSlave
mem.s1
embeddedsw.configuration.resetOffset
0
embeddedsw.configuration.resetSlave
mem.s1
embeddedsw.dts.compatible
altr,nios2-1.1
embeddedsw.dts.group
cpu
embeddedsw.dts.name
nios2
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0x00000020
embeddedsw.dts.params.altr,implementation
"tiny"
embeddedsw.dts.params.altr,reset-addr
0x00000000
embeddedsw.dts.params.clock-frequency
50000000u
embeddedsw.dts.params.dcache-line-size
0
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0
embeddedsw.dts.params.icache-line-size
0
embeddedsw.dts.params.icache-size
0
embeddedsw.dts.vendor
altr
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_128
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true
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true
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instruction_master
int
1
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false
true
ADDRESS_WIDTH
flash_instruction_master
int
18
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true
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true
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data_master
int
1
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true
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tightly_coupled_data_master_0
int
1
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int
1
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tightly_coupled_instruction_master_0
int
1
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tightly_coupled_instruction_master_2
int
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ADDRESS_WIDTH
tightly_coupled_instruction_master_3
int
1
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int
1
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false
true
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instruction_master_high_performance
java.lang.String
]]>
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true
false
true
ADDRESS_MAP
instruction_master
java.lang.String
false
true
false
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ADDRESS_MAP
flash_instruction_master
java.lang.String
]]>
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true
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true
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data_master
java.lang.String
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ADDRESS_MAP
tightly_coupled_data_master_0
java.lang.String
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ADDRESS_MAP
tightly_coupled_data_master_1
java.lang.String
false
true
false
true
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tightly_coupled_data_master_2
java.lang.String
false
true
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true
ADDRESS_MAP
tightly_coupled_data_master_3
java.lang.String
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tightly_coupled_instruction_master_0
java.lang.String
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tightly_coupled_instruction_master_1
java.lang.String
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tightly_coupled_instruction_master_2
java.lang.String
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java.lang.String
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data_master_high_performance
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instruction_master_high_performance
long
50000000
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true
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clk
java.lang.String
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DEVICE_FAMILY
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3
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irq
java.lang.String
]]>
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java.lang.String
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java.lang.String
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java.lang.String
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CUSTOM_INSTRUCTION_SLAVES
custom_instruction_master_c
java.lang.String
ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1
false
true
false
true
DEVICE_FEATURES
java.lang.String
EP4CE115F29C7
false
true
false
true
DEVICE
java.lang.String
7
false
true
false
true
DEVICE_SPEEDGRADE
java.lang.Integer
1
false
true
false
true
CLOCK_DOMAIN
clk
java.lang.Integer
1
false
true
false
true
RESET_DOMAIN
clk
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
java.lang.Boolean
true
true
true
false
true
java.lang.Long
50000000
true
true
false
true
clock
false
clk
Input
1
clk
java.lang.String
clk
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
DEASSERT
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
false
reset_n
Input
1
reset_n
reset_req
Input
1
reset_req
debug.providesServices
master
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
int
1
false
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
SYMBOLS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk
false
true
true
true
java.lang.String
reset
false
true
true
true
int
8
false
true
false
true
boolean
true
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
int
32
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
int
1
false
true
false
true
boolean
true
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
false
true
int
0
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
true
d_address
Output
18
address
d_byteenable
Output
4
byteenable
d_read
Output
1
read
d_readdata
Input
32
readdata
d_waitrequest
Input
1
waitrequest
d_write
Output
1
write
d_writedata
Output
32
writedata
debug_mem_slave_debugaccess_to_roms
Output
1
debugaccess
false
mm_interconnect_0
cpu_data_master
mm_interconnect_0.cpu_data_master
0
262144
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
int
1
false
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
SYMBOLS
false
true
true
true
boolean
true
false
true
false
true
java.lang.String
clk
false
true
true
true
java.lang.String
reset
false
true
true
true
int
8
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
true
false
true
true
true
int
32
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
int
1
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
false
true
int
0
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
true
i_address
Output
18
address
i_read
Output
1
read
i_readdata
Input
32
readdata
i_waitrequest
Input
1
waitrequest
false
mm_interconnect_0
cpu_instruction_master
mm_interconnect_0.cpu_instruction_master
0
262144
com.altera.entityinterfaces.IConnectionPoint
cpu.data_master
false
true
true
true
java.lang.String
clk
false
true
false
true
java.lang.String
reset
false
true
false
true
java.lang.String
false
true
false
true
com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme
INDIVIDUAL_REQUESTS
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
interrupt
true
irq
Input
32
irq
false
irq_mapper
sender
irq_mapper.sender
0
java.lang.String
clk
false
true
true
true
java.lang.String
false
true
true
true
[Ljava.lang.String;
none
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
DEASSERT
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
true
debug_reset_request
Output
1
reset
embeddedsw.configuration.hideDevice
1
qsys.ui.connect
instruction_master,data_master
com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment
DYNAMIC
false
true
true
true
int
0
false
true
false
true
java.math.BigInteger
2048
true
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk
false
true
true
true
java.lang.String
reset
false
true
false
true
int
8
false
true
false
true
java.math.BigInteger
0
false
true
false
true
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
java.math.BigInteger
0
false
true
true
true
int
0
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
false
true
true
int
0
false
false
true
true
int
1
false
true
false
true
boolean
false
false
true
true
true
int
0
false
true
true
true
int
1
false
true
false
true
int
1
false
true
true
true
boolean
true
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
true
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
false
debug_mem_slave_address
Input
9
address
debug_mem_slave_byteenable
Input
4
byteenable
debug_mem_slave_debugaccess
Input
1
debugaccess
debug_mem_slave_read
Input
1
read
debug_mem_slave_readdata
Output
32
readdata
debug_mem_slave_waitrequest
Output
1
waitrequest
debug_mem_slave_write
Input
1
write
debug_mem_slave_writedata
Input
32
writedata
java.lang.String
true
true
false
true
int
8
false
true
false
true
int
0
false
true
true
true
boolean
false
false
true
false
true
int
8
false
true
false
true
int
0
true
true
false
true
boolean
false
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
nios_custom_instruction
true
dummy_ci_port
Output
1
readra
embeddedsw.CMacro.READ_DEPTH
64
embeddedsw.CMacro.READ_THRESHOLD
8
embeddedsw.CMacro.WRITE_DEPTH
64
embeddedsw.CMacro.WRITE_THRESHOLD
8
embeddedsw.dts.compatible
altr,juart-1.0
embeddedsw.dts.group
serial
embeddedsw.dts.name
juart
embeddedsw.dts.vendor
altr
boolean
false
false
true
false
true
int
0
false
true
false
true
int
64
false
true
true
true
int
8
false
true
true
true
java.lang.String
false
false
false
true
java.lang.String
NO_INTERACTIVE_WINDOWS
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
false
true
int
64
false
true
true
true
int
8
false
true
true
true
long
50000000
false
true
false
true
CLOCK_RATE
clk
java.lang.String
2.0
false
true
false
true
AVALON_SPEC
boolean
false
true
true
false
true
boolean
false
true
true
false
true
boolean
false
true
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
java.lang.Boolean
true
true
true
false
true
java.lang.Long
50000000
true
true
false
true
clock
false
clk
Input
1
clk
java.lang.String
clk
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
DEASSERT
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
false
rst_n
Input
1
reset_n
embeddedsw.configuration.isFlash
0
embeddedsw.configuration.isMemoryDevice
0
embeddedsw.configuration.isNonVolatileStorage
0
embeddedsw.configuration.isPrintableDevice
1
com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment
NATIVE
false
true
true
true
int
0
false
true
false
true
java.math.BigInteger
2
true
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk
false
true
true
true
java.lang.String
reset
false
true
false
true
int
8
false
true
false
true
java.math.BigInteger
false
true
false
true
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
java.math.BigInteger
0
false
true
true
true
int
0
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
false
true
true
int
0
false
false
true
true
int
1
false
true
false
true
boolean
true
false
true
true
true
int
0
false
true
true
true
int
1
false
true
false
true
int
1
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
true
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
false
av_chipselect
Input
1
chipselect
av_address
Input
1
address
av_read_n
Input
1
read_n
av_readdata
Output
32
readdata
av_write_n
Input
1
write_n
av_writedata
Input
32
writedata
av_waitrequest
Output
1
waitrequest
com.altera.entityinterfaces.IConnectionPoint
jtag_uart.avalon_jtag_slave
false
true
true
true
java.lang.String
clk
false
true
false
true
java.lang.String
reset
false
true
false
true
java.lang.Integer
false
true
true
true
com.altera.entityinterfaces.IConnectionPoint
false
true
true
true
com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme
NONE
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
interrupt
false
av_irq
Output
1
irq
embeddedsw.CMacro.ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR
0
embeddedsw.CMacro.ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE
0
embeddedsw.CMacro.CONTENTS_INFO
""
embeddedsw.CMacro.DUAL_PORT
1
embeddedsw.CMacro.GUI_RAM_BLOCK_TYPE
AUTO
embeddedsw.CMacro.INIT_CONTENTS_FILE
niosII_mem
embeddedsw.CMacro.INIT_MEM_CONTENT
1
embeddedsw.CMacro.INSTANCE_ID
NONE
embeddedsw.CMacro.NON_DEFAULT_INIT_FILE_ENABLED
0
embeddedsw.CMacro.RAM_BLOCK_TYPE
AUTO
embeddedsw.CMacro.READ_DURING_WRITE_MODE
DONT_CARE
embeddedsw.CMacro.SINGLE_CLOCK_OP
1
embeddedsw.CMacro.SIZE_MULTIPLE
1
embeddedsw.CMacro.SIZE_VALUE
131072
embeddedsw.CMacro.WRITABLE
1
embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR
SIM_DIR
embeddedsw.memoryInfo.GENERATE_DAT_SYM
1
embeddedsw.memoryInfo.GENERATE_HEX
1
embeddedsw.memoryInfo.HAS_BYTE_LANE
0
embeddedsw.memoryInfo.HEX_INSTALL_DIR
QPF_DIR
embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH
32
embeddedsw.memoryInfo.MEM_INIT_FILENAME
niosII_mem
postgeneration.simulation.init_file.param_name
INIT_FILE
postgeneration.simulation.init_file.type
MEM_INIT
boolean
false
false
true
true
true
java.lang.String
AUTO
false
true
true
true
int
32
false
true
true
true
int
32
false
true
false
true
boolean
true
false
true
true
true
boolean
false
false
true
true
true
boolean
false
true
true
false
true
boolean
true
false
true
true
true
java.lang.String
onchip_mem.hex
false
false
true
true
boolean
false
false
true
true
true
java.lang.String
NONE
false
false
true
true
long
131072
false
true
true
true
java.lang.String
DONT_CARE
false
true
true
true
boolean
false
false
true
false
true
int
0
false
true
false
true
boolean
true
false
true
true
true
boolean
true
true
true
false
true
int
1
false
true
true
true
int
1
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
false
false
true
boolean
false
false
false
true
true
boolean
true
false
true
true
true
boolean
false
false
true
true
true
boolean
true
false
true
true
true
java.lang.String
niosII_mem
false
true
false
true
UNIQUE_ID
java.lang.String
CYCLONEIVE
false
true
false
true
DEVICE_FAMILY
java.lang.String
ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1
false
true
false
true
DEVICE_FEATURES
int
15
true
true
false
true
int
15
true
true
false
true
int
32
true
true
false
true
int
32
true
true
false
true
java.lang.String
Automatic
true
true
false
true
boolean
false
true
true
false
true
java.lang.String
niosII_mem.hex
true
true
false
true
boolean
false
false
true
true
true
embeddedsw.configuration.isFlash
0
embeddedsw.configuration.isMemoryDevice
1
embeddedsw.configuration.isNonVolatileStorage
0
embeddedsw.configuration.isPrintableDevice
0
com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment
DYNAMIC
false
true
true
true
int
1
false
true
false
true
java.math.BigInteger
131072
true
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk1
false
true
true
true
java.lang.String
reset1
false
true
false
true
int
8
false
true
false
true
java.math.BigInteger
false
true
false
true
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
java.math.BigInteger
131072
false
true
true
true
int
0
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
true
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
false
true
true
int
0
false
false
true
true
int
1
false
true
false
true
boolean
false
false
true
true
true
int
1
false
true
true
true
int
0
false
true
false
true
int
0
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
true
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
false
address
Input
15
address
clken
Input
1
clken
chipselect
Input
1
chipselect
write
Input
1
write
readdata
Output
32
readdata
writedata
Input
32
writedata
byteenable
Input
4
byteenable
embeddedsw.configuration.isFlash
0
embeddedsw.configuration.isMemoryDevice
1
embeddedsw.configuration.isNonVolatileStorage
0
embeddedsw.configuration.isPrintableDevice
0
com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment
DYNAMIC
false
true
true
true
int
1
false
true
false
true
java.math.BigInteger
131072
true
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk1
false
true
true
true
java.lang.String
reset1
false
true
false
true
int
8
false
true
false
true
java.math.BigInteger
false
true
false
true
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
java.math.BigInteger
131072
false
true
true
true
int
0
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
true
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
false
true
true
int
0
false
false
true
true
int
1
false
true
false
true
boolean
false
false
true
true
true
int
1
false
true
true
true
int
0
false
true
false
true
int
0
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
true
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
false
address2
Input
15
address
chipselect2
Input
1
chipselect
clken2
Input
1
clken
write2
Input
1
write
readdata2
Output
32
readdata
writedata2
Input
32
writedata
byteenable2
Input
4
byteenable
boolean
false
false
true
false
true
java.lang.String
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clock
false
clk
Input
1
clk
java.lang.String
clk1
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
DEASSERT
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
false
reset
Input
1
reset
reset_req
Input
1
reset_req
int
8
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clock
false
clk
Input
1
clk
embeddedsw.configuration.isFlash
0
embeddedsw.configuration.isMemoryDevice
0
embeddedsw.configuration.isNonVolatileStorage
0
embeddedsw.configuration.isPrintableDevice
0
com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment
DYNAMIC
false
true
true
true
int
0
false
true
false
true
java.math.BigInteger
8
true
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clock
false
true
true
true
java.lang.String
reset_n
false
true
false
true
int
8
false
true
false
true
java.math.BigInteger
false
true
false
true
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
java.math.BigInteger
0
false
true
true
true
int
0
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
false
true
true
int
0
false
false
true
true
int
1
false
true
false
true
boolean
false
false
true
true
true
int
0
false
true
true
true
int
0
false
true
false
true
int
0
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
true
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
false
ctl_wr
Input
1
write
ctl_rd
Input
1
read
ctl_addr
Input
1
address
ctl_wrdata
Input
32
writedata
ctl_rddata
Output
32
readdata
java.lang.String
clock
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
DEASSERT
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
false
clrn
Input
1
reset_n
embeddedsw.configuration.isFlash
0
embeddedsw.configuration.isMemoryDevice
0
embeddedsw.configuration.isNonVolatileStorage
0
embeddedsw.configuration.isPrintableDevice
0
com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment
DYNAMIC
false
true
true
true
int
0
false
true
false
true
java.math.BigInteger
16
true
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clock
false
true
true
true
java.lang.String
reset_n
false
true
false
true
int
8
false
true
false
true
java.math.BigInteger
false
true
false
true
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
java.math.BigInteger
0
false
true
true
true
int
0
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
false
true
true
int
0
false
false
true
true
int
1
false
true
false
true
boolean
false
false
true
true
true
int
0
false
true
true
true
int
1
false
true
false
true
int
1
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
true
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
false
ram_wr
Input
1
write
ram_addr
Input
2
address
ram_wrdata
Input
32
writedata
java.lang.String
false
true
true
true
java.lang.String
reset_n
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
conduit
false
train
Input
1
train
red
Output
1
red
yellow
Output
1
yellow
green
Output
1
green
embeddedsw.CMacro.ALWAYS_RUN
0
embeddedsw.CMacro.COUNTER_SIZE
32
embeddedsw.CMacro.FIXED_PERIOD
0
embeddedsw.CMacro.FREQ
50000000
embeddedsw.CMacro.LOAD_VALUE
49999
embeddedsw.CMacro.MULT
0.001
embeddedsw.CMacro.PERIOD
1
embeddedsw.CMacro.PERIOD_UNITS
ms
embeddedsw.CMacro.RESET_OUTPUT
0
embeddedsw.CMacro.SNAPSHOT
1
embeddedsw.CMacro.TICKS_PER_SEC
1000
embeddedsw.CMacro.TIMEOUT_PULSE_OUTPUT
0
embeddedsw.dts.compatible
altr,timer-1.0
embeddedsw.dts.group
timer
embeddedsw.dts.name
timer
embeddedsw.dts.params.clock-frequency
50000000
embeddedsw.dts.vendor
altr
boolean
false
false
true
true
true
int
32
false
true
true
true
boolean
false
false
true
true
true
java.lang.String
1
false
true
true
true
java.lang.String
MSEC
false
true
true
true
boolean
false
false
true
true
true
boolean
true
false
true
true
true
boolean
false
false
true
true
true
long
50000000
false
true
false
true
CLOCK_RATE
clk
int
2
false
true
false
true
java.lang.String
FULL_FEATURED
true
true
false
true
java.lang.String
ms
true
true
false
true
double
0.001
true
true
false
true
java.lang.String
49999
true
true
false
true
double
0.001
true
true
false
true
double
1000.0
true
true
false
true
int
3
true
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
java.lang.Boolean
true
true
true
false
true
java.lang.Long
50000000
true
true
false
true
clock
false
clk
Input
1
clk
java.lang.String
clk
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
DEASSERT
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
false
reset_n
Input
1
reset_n
embeddedsw.configuration.isFlash
0
embeddedsw.configuration.isMemoryDevice
0
embeddedsw.configuration.isNonVolatileStorage
0
embeddedsw.configuration.isPrintableDevice
0
embeddedsw.configuration.isTimerDevice
1
com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment
NATIVE
false
true
true
true
int
0
false
true
false
true
java.math.BigInteger
8
true
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk
false
true
true
true
java.lang.String
reset
false
true
false
true
int
8
false
true
false
true
java.math.BigInteger
false
true
false
true
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
java.math.BigInteger
0
false
true
true
true
int
0
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
false
true
true
int
0
false
false
true
true
int
1
false
true
false
true
boolean
false
false
true
true
true
int
0
false
true
true
true
int
1
false
true
false
true
int
1
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
true
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
false
address
Input
3
address
writedata
Input
16
writedata
readdata
Output
16
readdata
chipselect
Input
1
chipselect
write_n
Input
1
write_n
com.altera.entityinterfaces.IConnectionPoint
sys_clk_timer.s1
false
true
true
true
java.lang.String
clk
false
true
false
true
java.lang.String
reset
false
true
false
true
java.lang.Integer
false
true
true
true
com.altera.entityinterfaces.IConnectionPoint
false
true
true
true
com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme
NONE
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
interrupt
false
irq
Output
1
irq
interconnect_id.cpu.data_master
0
interconnect_id.cpu.debug_mem_slave
0
interconnect_id.cpu.instruction_master
1
interconnect_id.jtag_uart.avalon_jtag_slave
1
interconnect_id.mem.s1
2
interconnect_id.mem.s2
3
interconnect_id.sem.ctl_slave
4
interconnect_id.sem.ram_slave
5
interconnect_id.sys_clk_timer.s1
6
java.lang.String
};set_instance_parameter_value {cpu_data_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {cpu_data_master_agent} {ID} {0};set_instance_parameter_value {cpu_data_master_agent} {BURSTWRAP_VALUE} {7};set_instance_parameter_value {cpu_data_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {cpu_data_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {cpu_data_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {cpu_data_master_agent} {USE_WRITERESPONSE} {0};add_instance {cpu_instruction_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_QOS_H} {74};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_QOS_L} {74};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DATA_SIDEBAND_H} {72};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DATA_SIDEBAND_L} {72};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ADDR_SIDEBAND_H} {71};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ADDR_SIDEBAND_L} {71};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURST_TYPE_H} {70};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURST_TYPE_L} {69};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_CACHE_H} {88};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_CACHE_L} {85};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_THREAD_ID_H} {81};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_THREAD_ID_L} {81};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_EXCLUSIVE} {59};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {cpu_instruction_master_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {cpu_instruction_master_agent} {ST_DATA_W} {94};set_instance_parameter_value {cpu_instruction_master_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {cpu_instruction_master_agent} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {cpu_instruction_master_agent} {AV_LINEWRAPBURSTS} {1};set_instance_parameter_value {cpu_instruction_master_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {cpu_instruction_master_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cpu_instruction_master_agent} {ADDR_MAP} {
};set_instance_parameter_value {cpu_instruction_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {cpu_instruction_master_agent} {ID} {1};set_instance_parameter_value {cpu_instruction_master_agent} {BURSTWRAP_VALUE} {3};set_instance_parameter_value {cpu_instruction_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {cpu_instruction_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {cpu_instruction_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {cpu_instruction_master_agent} {USE_WRITERESPONSE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_DATA_W} {94};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ID} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ECC_ENABLE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sem_ctl_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {sem_ctl_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sem_ctl_slave_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {sem_ctl_slave_agent} {ST_DATA_W} {94};set_instance_parameter_value {sem_ctl_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sem_ctl_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sem_ctl_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sem_ctl_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sem_ctl_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sem_ctl_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sem_ctl_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sem_ctl_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sem_ctl_slave_agent} {ID} {4};set_instance_parameter_value {sem_ctl_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sem_ctl_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sem_ctl_slave_agent} {ECC_ENABLE} {0};add_instance {sem_ctl_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sem_ctl_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {cpu_debug_mem_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {cpu_debug_mem_slave_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {cpu_debug_mem_slave_agent} {ST_DATA_W} {94};set_instance_parameter_value {cpu_debug_mem_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {cpu_debug_mem_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cpu_debug_mem_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {cpu_debug_mem_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {cpu_debug_mem_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {cpu_debug_mem_slave_agent} {ID} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent} {ECC_ENABLE} {0};add_instance {cpu_debug_mem_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {cpu_debug_mem_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sem_ram_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sem_ram_slave_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {sem_ram_slave_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {sem_ram_slave_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {sem_ram_slave_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {sem_ram_slave_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {sem_ram_slave_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {sem_ram_slave_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {sem_ram_slave_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {sem_ram_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sem_ram_slave_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {sem_ram_slave_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {sem_ram_slave_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {sem_ram_slave_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {sem_ram_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sem_ram_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sem_ram_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sem_ram_slave_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {sem_ram_slave_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {sem_ram_slave_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {sem_ram_slave_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {sem_ram_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sem_ram_slave_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {sem_ram_slave_agent} {ST_DATA_W} {94};set_instance_parameter_value {sem_ram_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sem_ram_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sem_ram_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sem_ram_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sem_ram_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sem_ram_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sem_ram_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sem_ram_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sem_ram_slave_agent} {ID} {5};set_instance_parameter_value {sem_ram_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sem_ram_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sem_ram_slave_agent} {ECC_ENABLE} {0};add_instance {sem_ram_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sem_ram_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sys_clk_timer_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {sys_clk_timer_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sys_clk_timer_s1_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {sys_clk_timer_s1_agent} {ST_DATA_W} {94};set_instance_parameter_value {sys_clk_timer_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sys_clk_timer_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sys_clk_timer_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sys_clk_timer_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sys_clk_timer_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sys_clk_timer_s1_agent} {ID} {6};set_instance_parameter_value {sys_clk_timer_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sys_clk_timer_s1_agent} {ECC_ENABLE} {0};add_instance {sys_clk_timer_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sys_clk_timer_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {mem_s2_agent} {altera_merlin_slave_agent};set_instance_parameter_value {mem_s2_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {mem_s2_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {mem_s2_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {mem_s2_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {mem_s2_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {mem_s2_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {mem_s2_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {mem_s2_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {mem_s2_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {mem_s2_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {mem_s2_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {mem_s2_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {mem_s2_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {mem_s2_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {mem_s2_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {mem_s2_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mem_s2_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {mem_s2_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {mem_s2_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {mem_s2_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {mem_s2_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mem_s2_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mem_s2_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mem_s2_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mem_s2_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {mem_s2_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {mem_s2_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {mem_s2_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {mem_s2_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {mem_s2_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {mem_s2_agent} {ST_DATA_W} {94};set_instance_parameter_value {mem_s2_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mem_s2_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {mem_s2_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mem_s2_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mem_s2_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {mem_s2_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {mem_s2_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {mem_s2_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {mem_s2_agent} {ID} {3};set_instance_parameter_value {mem_s2_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mem_s2_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mem_s2_agent} {ECC_ENABLE} {0};add_instance {mem_s2_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {mem_s2_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {mem_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {mem_s1_agent} {PKT_ORI_BURST_SIZE_H} {93};set_instance_parameter_value {mem_s1_agent} {PKT_ORI_BURST_SIZE_L} {91};set_instance_parameter_value {mem_s1_agent} {PKT_RESPONSE_STATUS_H} {90};set_instance_parameter_value {mem_s1_agent} {PKT_RESPONSE_STATUS_L} {89};set_instance_parameter_value {mem_s1_agent} {PKT_BURST_SIZE_H} {68};set_instance_parameter_value {mem_s1_agent} {PKT_BURST_SIZE_L} {66};set_instance_parameter_value {mem_s1_agent} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {mem_s1_agent} {PKT_BEGIN_BURST} {73};set_instance_parameter_value {mem_s1_agent} {PKT_PROTECTION_H} {84};set_instance_parameter_value {mem_s1_agent} {PKT_PROTECTION_L} {82};set_instance_parameter_value {mem_s1_agent} {PKT_BURSTWRAP_H} {65};set_instance_parameter_value {mem_s1_agent} {PKT_BURSTWRAP_L} {63};set_instance_parameter_value {mem_s1_agent} {PKT_BYTE_CNT_H} {62};set_instance_parameter_value {mem_s1_agent} {PKT_BYTE_CNT_L} {60};set_instance_parameter_value {mem_s1_agent} {PKT_ADDR_H} {53};set_instance_parameter_value {mem_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mem_s1_agent} {PKT_TRANS_COMPRESSED_READ} {54};set_instance_parameter_value {mem_s1_agent} {PKT_TRANS_POSTED} {55};set_instance_parameter_value {mem_s1_agent} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {mem_s1_agent} {PKT_TRANS_READ} {57};set_instance_parameter_value {mem_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mem_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mem_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mem_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mem_s1_agent} {PKT_SRC_ID_H} {77};set_instance_parameter_value {mem_s1_agent} {PKT_SRC_ID_L} {75};set_instance_parameter_value {mem_s1_agent} {PKT_DEST_ID_H} {80};set_instance_parameter_value {mem_s1_agent} {PKT_DEST_ID_L} {78};set_instance_parameter_value {mem_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {mem_s1_agent} {ST_CHANNEL_W} {7};set_instance_parameter_value {mem_s1_agent} {ST_DATA_W} {94};set_instance_parameter_value {mem_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mem_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {mem_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mem_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mem_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {mem_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {mem_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {mem_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {mem_s1_agent} {ID} {2};set_instance_parameter_value {mem_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mem_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mem_s1_agent} {ECC_ENABLE} {0};add_instance {mem_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {95};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {mem_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {3 0 6 5 4 1 };set_instance_parameter_value {router} {CHANNEL_ID} {100000 000100 010000 001000 000010 000001 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {both both both write both both };set_instance_parameter_value {router} {START_ADDRESS} {0x0 0x20800 0x21000 0x21020 0x21030 0x21038 };set_instance_parameter_value {router} {END_ADDRESS} {0x20000 0x21000 0x21020 0x21030 0x21038 0x21040 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 1 1 1 1 1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 0 0 0 0 0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 0 0 0 0 0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {53};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router} {PKT_TRANS_READ} {57};set_instance_parameter_value {router} {ST_DATA_W} {94};set_instance_parameter_value {router} {ST_CHANNEL_W} {7};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {5};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {3};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {2 0 };set_instance_parameter_value {router_001} {CHANNEL_ID} {10 01 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x0 0x20800 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x20000 0x21000 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {53};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_001} {ST_DATA_W} {94};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_001} {DECODER_TYPE} {0};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {1};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {2};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 };set_instance_parameter_value {router_002} {CHANNEL_ID} {1 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {53};set_instance_parameter_value {router_002} {PKT_ADDR_L} {36};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_002} {ST_DATA_W} {94};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};add_instance {router_003} {altera_merlin_router};set_instance_parameter_value {router_003} {DESTINATION_ID} {0 };set_instance_parameter_value {router_003} {CHANNEL_ID} {1 };set_instance_parameter_value {router_003} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_003} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_003} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_003} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_003} {SPAN_OFFSET} {};set_instance_parameter_value {router_003} {PKT_ADDR_H} {53};set_instance_parameter_value {router_003} {PKT_ADDR_L} {36};set_instance_parameter_value {router_003} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_003} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_003} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_003} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_003} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_003} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_003} {ST_DATA_W} {94};set_instance_parameter_value {router_003} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_003} {DECODER_TYPE} {1};set_instance_parameter_value {router_003} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_003} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_003} {MEMORY_ALIASING_DECODE} {0};add_instance {router_004} {altera_merlin_router};set_instance_parameter_value {router_004} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_004} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_004} {TYPE_OF_TRANSACTION} {both read };set_instance_parameter_value {router_004} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_004} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_004} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_004} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_004} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_004} {SPAN_OFFSET} {};set_instance_parameter_value {router_004} {PKT_ADDR_H} {53};set_instance_parameter_value {router_004} {PKT_ADDR_L} {36};set_instance_parameter_value {router_004} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_004} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_004} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_004} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_004} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_004} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_004} {ST_DATA_W} {94};set_instance_parameter_value {router_004} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_004} {DECODER_TYPE} {1};set_instance_parameter_value {router_004} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_004} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_004} {MEMORY_ALIASING_DECODE} {0};add_instance {router_005} {altera_merlin_router};set_instance_parameter_value {router_005} {DESTINATION_ID} {0 };set_instance_parameter_value {router_005} {CHANNEL_ID} {1 };set_instance_parameter_value {router_005} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_005} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_005} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_005} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_005} {SPAN_OFFSET} {};set_instance_parameter_value {router_005} {PKT_ADDR_H} {53};set_instance_parameter_value {router_005} {PKT_ADDR_L} {36};set_instance_parameter_value {router_005} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_005} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_005} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_005} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_005} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_005} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_005} {ST_DATA_W} {94};set_instance_parameter_value {router_005} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_005} {DECODER_TYPE} {1};set_instance_parameter_value {router_005} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_005} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_005} {MEMORY_ALIASING_DECODE} {0};add_instance {router_006} {altera_merlin_router};set_instance_parameter_value {router_006} {DESTINATION_ID} {0 };set_instance_parameter_value {router_006} {CHANNEL_ID} {1 };set_instance_parameter_value {router_006} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_006} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_006} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_006} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_006} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_006} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_006} {SPAN_OFFSET} {};set_instance_parameter_value {router_006} {PKT_ADDR_H} {53};set_instance_parameter_value {router_006} {PKT_ADDR_L} {36};set_instance_parameter_value {router_006} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_006} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_006} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_006} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_006} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_006} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_006} {ST_DATA_W} {94};set_instance_parameter_value {router_006} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_006} {DECODER_TYPE} {1};set_instance_parameter_value {router_006} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_006} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_006} {MEMORY_ALIASING_DECODE} {0};add_instance {router_007} {altera_merlin_router};set_instance_parameter_value {router_007} {DESTINATION_ID} {0 };set_instance_parameter_value {router_007} {CHANNEL_ID} {1 };set_instance_parameter_value {router_007} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_007} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_007} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_007} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_007} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_007} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_007} {SPAN_OFFSET} {};set_instance_parameter_value {router_007} {PKT_ADDR_H} {53};set_instance_parameter_value {router_007} {PKT_ADDR_L} {36};set_instance_parameter_value {router_007} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_007} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_007} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_007} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_007} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_007} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_007} {ST_DATA_W} {94};set_instance_parameter_value {router_007} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_007} {DECODER_TYPE} {1};set_instance_parameter_value {router_007} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_007} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_007} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_007} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_007} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_007} {MEMORY_ALIASING_DECODE} {0};add_instance {router_008} {altera_merlin_router};set_instance_parameter_value {router_008} {DESTINATION_ID} {1 };set_instance_parameter_value {router_008} {CHANNEL_ID} {1 };set_instance_parameter_value {router_008} {TYPE_OF_TRANSACTION} {read };set_instance_parameter_value {router_008} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_008} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_008} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_008} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_008} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_008} {SPAN_OFFSET} {};set_instance_parameter_value {router_008} {PKT_ADDR_H} {53};set_instance_parameter_value {router_008} {PKT_ADDR_L} {36};set_instance_parameter_value {router_008} {PKT_PROTECTION_H} {84};set_instance_parameter_value {router_008} {PKT_PROTECTION_L} {82};set_instance_parameter_value {router_008} {PKT_DEST_ID_H} {80};set_instance_parameter_value {router_008} {PKT_DEST_ID_L} {78};set_instance_parameter_value {router_008} {PKT_TRANS_WRITE} {56};set_instance_parameter_value {router_008} {PKT_TRANS_READ} {57};set_instance_parameter_value {router_008} {ST_DATA_W} {94};set_instance_parameter_value {router_008} {ST_CHANNEL_W} {7};set_instance_parameter_value {router_008} {DECODER_TYPE} {1};set_instance_parameter_value {router_008} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_008} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_008} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_008} {DEFAULT_DESTID} {1};set_instance_parameter_value {router_008} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_008} {MEMORY_ALIASING_DECODE} {0};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {94};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {6};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {1};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux_001} {ST_DATA_W} {94};set_instance_parameter_value {cmd_demux_001} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_demux_001} {NUM_OUTPUTS} {2};set_instance_parameter_value {cmd_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {cmd_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_001} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_001} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_001} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_001} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_001} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_002} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_002} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_002} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_002} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux_002} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_002} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_002} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {cmd_mux_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_003} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_003} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_003} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_003} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_003} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_003} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_003} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_004} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_004} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_004} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_004} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_004} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_004} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_004} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_005} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_005} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_005} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_005} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_005} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_005} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_005} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_006} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_006} {ST_DATA_W} {94};set_instance_parameter_value {cmd_mux_006} {ST_CHANNEL_W} {7};set_instance_parameter_value {cmd_mux_006} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_006} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_006} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_006} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {cmd_mux_006} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_006} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_001} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_001} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_001} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_002} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_002} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_002} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_002} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux_002} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_003} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_003} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_003} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_003} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_003} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_004} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_004} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_004} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_004} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_004} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_005} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_005} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_005} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_005} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_005} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_006} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_006} {ST_DATA_W} {94};set_instance_parameter_value {rsp_demux_006} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_demux_006} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_006} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {94};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {6};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 1 1 1 1 1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {rsp_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux_001} {ST_DATA_W} {94};set_instance_parameter_value {rsp_mux_001} {ST_CHANNEL_W} {7};set_instance_parameter_value {rsp_mux_001} {NUM_INPUTS} {2};set_instance_parameter_value {rsp_mux_001} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux_001} {PKT_TRANS_LOCK} {58};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {rsp_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(93:91) response_status(90:89) cache(88:85) protection(84:82) thread_id(81) dest_id(80:78) src_id(77:75) qos(74) begin_burst(73) data_sideband(72) addr_sideband(71) burst_type(70:69) burst_size(68:66) burstwrap(65:63) byte_cnt(62:60) trans_exclusive(59) trans_lock(58) trans_read(57) trans_write(56) trans_posted(55) trans_compressed_read(54) addr(53:36) byteen(35:32) data(31:0)};add_instance {cpu_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {cpu_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {cpu_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {cpu_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {cpu_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {clk_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {clk_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {50000000};set_instance_parameter_value {clk_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {cpu_data_master_translator.avalon_universal_master_0} {cpu_data_master_agent.av} {avalon};set_connection_parameter_value {cpu_data_master_translator.avalon_universal_master_0/cpu_data_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {cpu_data_master_translator.avalon_universal_master_0/cpu_data_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {cpu_data_master_translator.avalon_universal_master_0/cpu_data_master_agent.av} {defaultConnection} {false};add_connection {rsp_mux.src} {cpu_data_master_agent.rp} {avalon_streaming};preview_set_connection_tag {rsp_mux.src/cpu_data_master_agent.rp} {qsys_mm.response};add_connection {cpu_instruction_master_translator.avalon_universal_master_0} {cpu_instruction_master_agent.av} {avalon};set_connection_parameter_value {cpu_instruction_master_translator.avalon_universal_master_0/cpu_instruction_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {cpu_instruction_master_translator.avalon_universal_master_0/cpu_instruction_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {cpu_instruction_master_translator.avalon_universal_master_0/cpu_instruction_master_agent.av} {defaultConnection} {false};add_connection {rsp_mux_001.src} {cpu_instruction_master_agent.rp} {avalon_streaming};preview_set_connection_tag {rsp_mux_001.src/cpu_instruction_master_agent.rp} {qsys_mm.response};add_connection {jtag_uart_avalon_jtag_slave_agent.m0} {jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {jtag_uart_avalon_jtag_slave_agent.rf_source} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.out} {jtag_uart_avalon_jtag_slave_agent.rf_sink} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_src} {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux.src} {jtag_uart_avalon_jtag_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux.src/jtag_uart_avalon_jtag_slave_agent.cp} {qsys_mm.command};add_connection {sem_ctl_slave_agent.m0} {sem_ctl_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sem_ctl_slave_agent.m0/sem_ctl_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sem_ctl_slave_agent.m0/sem_ctl_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sem_ctl_slave_agent.m0/sem_ctl_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sem_ctl_slave_agent.rf_source} {sem_ctl_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {sem_ctl_slave_agent_rsp_fifo.out} {sem_ctl_slave_agent.rf_sink} {avalon_streaming};add_connection {sem_ctl_slave_agent.rdata_fifo_src} {sem_ctl_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_001.src} {sem_ctl_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_001.src/sem_ctl_slave_agent.cp} {qsys_mm.command};add_connection {cpu_debug_mem_slave_agent.m0} {cpu_debug_mem_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {cpu_debug_mem_slave_agent.m0/cpu_debug_mem_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {cpu_debug_mem_slave_agent.m0/cpu_debug_mem_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {cpu_debug_mem_slave_agent.m0/cpu_debug_mem_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {cpu_debug_mem_slave_agent.rf_source} {cpu_debug_mem_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {cpu_debug_mem_slave_agent_rsp_fifo.out} {cpu_debug_mem_slave_agent.rf_sink} {avalon_streaming};add_connection {cpu_debug_mem_slave_agent.rdata_fifo_src} {cpu_debug_mem_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_002.src} {cpu_debug_mem_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_002.src/cpu_debug_mem_slave_agent.cp} {qsys_mm.command};add_connection {sem_ram_slave_agent.m0} {sem_ram_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sem_ram_slave_agent.m0/sem_ram_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sem_ram_slave_agent.m0/sem_ram_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sem_ram_slave_agent.m0/sem_ram_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sem_ram_slave_agent.rf_source} {sem_ram_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {sem_ram_slave_agent_rsp_fifo.out} {sem_ram_slave_agent.rf_sink} {avalon_streaming};add_connection {sem_ram_slave_agent.rdata_fifo_src} {sem_ram_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_003.src} {sem_ram_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_003.src/sem_ram_slave_agent.cp} {qsys_mm.command};add_connection {sys_clk_timer_s1_agent.m0} {sys_clk_timer_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sys_clk_timer_s1_agent.m0/sys_clk_timer_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sys_clk_timer_s1_agent.m0/sys_clk_timer_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sys_clk_timer_s1_agent.m0/sys_clk_timer_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sys_clk_timer_s1_agent.rf_source} {sys_clk_timer_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {sys_clk_timer_s1_agent_rsp_fifo.out} {sys_clk_timer_s1_agent.rf_sink} {avalon_streaming};add_connection {sys_clk_timer_s1_agent.rdata_fifo_src} {sys_clk_timer_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_004.src} {sys_clk_timer_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_004.src/sys_clk_timer_s1_agent.cp} {qsys_mm.command};add_connection {mem_s2_agent.m0} {mem_s2_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {mem_s2_agent.m0/mem_s2_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {mem_s2_agent.m0/mem_s2_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {mem_s2_agent.m0/mem_s2_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {mem_s2_agent.rf_source} {mem_s2_agent_rsp_fifo.in} {avalon_streaming};add_connection {mem_s2_agent_rsp_fifo.out} {mem_s2_agent.rf_sink} {avalon_streaming};add_connection {mem_s2_agent.rdata_fifo_src} {mem_s2_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_005.src} {mem_s2_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_005.src/mem_s2_agent.cp} {qsys_mm.command};add_connection {mem_s1_agent.m0} {mem_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {mem_s1_agent.m0/mem_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {mem_s1_agent.m0/mem_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {mem_s1_agent.m0/mem_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {mem_s1_agent.rf_source} {mem_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {mem_s1_agent_rsp_fifo.out} {mem_s1_agent.rf_sink} {avalon_streaming};add_connection {mem_s1_agent.rdata_fifo_src} {mem_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_006.src} {mem_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_006.src/mem_s1_agent.cp} {qsys_mm.command};add_connection {cpu_data_master_agent.cp} {router.sink} {avalon_streaming};preview_set_connection_tag {cpu_data_master_agent.cp/router.sink} {qsys_mm.command};add_connection {router.src} {cmd_demux.sink} {avalon_streaming};preview_set_connection_tag {router.src/cmd_demux.sink} {qsys_mm.command};add_connection {cpu_instruction_master_agent.cp} {router_001.sink} {avalon_streaming};preview_set_connection_tag {cpu_instruction_master_agent.cp/router_001.sink} {qsys_mm.command};add_connection {router_001.src} {cmd_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_001.src/cmd_demux_001.sink} {qsys_mm.command};add_connection {jtag_uart_avalon_jtag_slave_agent.rp} {router_002.sink} {avalon_streaming};preview_set_connection_tag {jtag_uart_avalon_jtag_slave_agent.rp/router_002.sink} {qsys_mm.response};add_connection {router_002.src} {rsp_demux.sink} {avalon_streaming};preview_set_connection_tag {router_002.src/rsp_demux.sink} {qsys_mm.response};add_connection {sem_ctl_slave_agent.rp} {router_003.sink} {avalon_streaming};preview_set_connection_tag {sem_ctl_slave_agent.rp/router_003.sink} {qsys_mm.response};add_connection {router_003.src} {rsp_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_003.src/rsp_demux_001.sink} {qsys_mm.response};add_connection {cpu_debug_mem_slave_agent.rp} {router_004.sink} {avalon_streaming};preview_set_connection_tag {cpu_debug_mem_slave_agent.rp/router_004.sink} {qsys_mm.response};add_connection {router_004.src} {rsp_demux_002.sink} {avalon_streaming};preview_set_connection_tag {router_004.src/rsp_demux_002.sink} {qsys_mm.response};add_connection {sem_ram_slave_agent.rp} {router_005.sink} {avalon_streaming};preview_set_connection_tag {sem_ram_slave_agent.rp/router_005.sink} {qsys_mm.response};add_connection {router_005.src} {rsp_demux_003.sink} {avalon_streaming};preview_set_connection_tag {router_005.src/rsp_demux_003.sink} {qsys_mm.response};add_connection {sys_clk_timer_s1_agent.rp} {router_006.sink} {avalon_streaming};preview_set_connection_tag {sys_clk_timer_s1_agent.rp/router_006.sink} {qsys_mm.response};add_connection {router_006.src} {rsp_demux_004.sink} {avalon_streaming};preview_set_connection_tag {router_006.src/rsp_demux_004.sink} {qsys_mm.response};add_connection {mem_s2_agent.rp} {router_007.sink} {avalon_streaming};preview_set_connection_tag {mem_s2_agent.rp/router_007.sink} {qsys_mm.response};add_connection {router_007.src} {rsp_demux_005.sink} {avalon_streaming};preview_set_connection_tag {router_007.src/rsp_demux_005.sink} {qsys_mm.response};add_connection {mem_s1_agent.rp} {router_008.sink} {avalon_streaming};preview_set_connection_tag {mem_s1_agent.rp/router_008.sink} {qsys_mm.response};add_connection {router_008.src} {rsp_demux_006.sink} {avalon_streaming};preview_set_connection_tag {router_008.src/rsp_demux_006.sink} {qsys_mm.response};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux.src1} {cmd_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.command};add_connection {cmd_demux.src2} {cmd_mux_002.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.command};add_connection {cmd_demux.src3} {cmd_mux_003.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.command};add_connection {cmd_demux.src4} {cmd_mux_004.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src4/cmd_mux_004.sink0} {qsys_mm.command};add_connection {cmd_demux.src5} {cmd_mux_005.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src5/cmd_mux_005.sink0} {qsys_mm.command};add_connection {cmd_demux_001.src0} {cmd_mux_002.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src0/cmd_mux_002.sink1} {qsys_mm.command};add_connection {cmd_demux_001.src1} {cmd_mux_006.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src1/cmd_mux_006.sink0} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux_001.src0} {rsp_mux.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.response};add_connection {rsp_demux_002.src0} {rsp_mux.sink2} {avalon_streaming};preview_set_connection_tag {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.response};add_connection {rsp_demux_002.src1} {rsp_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux_002.src1/rsp_mux_001.sink0} {qsys_mm.response};add_connection {rsp_demux_003.src0} {rsp_mux.sink3} {avalon_streaming};preview_set_connection_tag {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.response};add_connection {rsp_demux_004.src0} {rsp_mux.sink4} {avalon_streaming};preview_set_connection_tag {rsp_demux_004.src0/rsp_mux.sink4} {qsys_mm.response};add_connection {rsp_demux_005.src0} {rsp_mux.sink5} {avalon_streaming};preview_set_connection_tag {rsp_demux_005.src0/rsp_mux.sink5} {qsys_mm.response};add_connection {rsp_demux_006.src0} {rsp_mux_001.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_006.src0/rsp_mux_001.sink1} {qsys_mm.response};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_data_master_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_instruction_master_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ctl_slave_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_debug_mem_slave_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ram_slave_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sys_clk_timer_s1_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s2_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s1_translator.reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_data_master_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_instruction_master_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ctl_slave_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ctl_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_debug_mem_slave_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cpu_debug_mem_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ram_slave_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sem_ram_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sys_clk_timer_s1_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {sys_clk_timer_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s2_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s2_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s1_agent.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {mem_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_003.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_004.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_005.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_006.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_007.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {router_008.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_demux_001.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_001.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_002.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_003.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_004.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_005.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {cmd_mux_006.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_001.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_002.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_003.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_004.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_005.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_demux_006.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {cpu_reset_reset_bridge.out_reset} {rsp_mux_001.clk_reset} {reset};add_connection {clk_clk_clock_bridge.out_clk} {cpu_data_master_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_instruction_master_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ctl_slave_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_debug_mem_slave_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ram_slave_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sys_clk_timer_s1_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s2_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s1_translator.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_data_master_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_instruction_master_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ctl_slave_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ctl_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_debug_mem_slave_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_debug_mem_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ram_slave_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sem_ram_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sys_clk_timer_s1_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {sys_clk_timer_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s2_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s2_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s1_agent.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {mem_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_003.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_004.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_005.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_006.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_007.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {router_008.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_demux_001.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_mux_001.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_001.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_001.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_002.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_002.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_003.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_003.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_004.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_004.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_005.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_005.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cmd_mux_006.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {rsp_demux_006.clk} {clock};add_connection {clk_clk_clock_bridge.out_clk} {cpu_reset_reset_bridge.clk} {clock};add_interface {clk_clk} {clock} {slave};set_interface_property {clk_clk} {EXPORT_OF} {clk_clk_clock_bridge.in_clk};add_interface {cpu_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {cpu_reset_reset_bridge_in_reset} {EXPORT_OF} {cpu_reset_reset_bridge.in_reset};add_interface {cpu_data_master} {avalon} {slave};set_interface_property {cpu_data_master} {EXPORT_OF} {cpu_data_master_translator.avalon_anti_master_0};add_interface {cpu_instruction_master} {avalon} {slave};set_interface_property {cpu_instruction_master} {EXPORT_OF} {cpu_instruction_master_translator.avalon_anti_master_0};add_interface {cpu_debug_mem_slave} {avalon} {master};set_interface_property {cpu_debug_mem_slave} {EXPORT_OF} {cpu_debug_mem_slave_translator.avalon_anti_slave_0};add_interface {jtag_uart_avalon_jtag_slave} {avalon} {master};set_interface_property {jtag_uart_avalon_jtag_slave} {EXPORT_OF} {jtag_uart_avalon_jtag_slave_translator.avalon_anti_slave_0};add_interface {mem_s1} {avalon} {master};set_interface_property {mem_s1} {EXPORT_OF} {mem_s1_translator.avalon_anti_slave_0};add_interface {mem_s2} {avalon} {master};set_interface_property {mem_s2} {EXPORT_OF} {mem_s2_translator.avalon_anti_slave_0};add_interface {sem_ctl_slave} {avalon} {master};set_interface_property {sem_ctl_slave} {EXPORT_OF} {sem_ctl_slave_translator.avalon_anti_slave_0};add_interface {sem_ram_slave} {avalon} {master};set_interface_property {sem_ram_slave} {EXPORT_OF} {sem_ram_slave_translator.avalon_anti_slave_0};add_interface {sys_clk_timer_s1} {avalon} {master};set_interface_property {sys_clk_timer_s1} {EXPORT_OF} {sys_clk_timer_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.cpu.data_master} {0};set_module_assignment {interconnect_id.cpu.debug_mem_slave} {0};set_module_assignment {interconnect_id.cpu.instruction_master} {1};set_module_assignment {interconnect_id.jtag_uart.avalon_jtag_slave} {1};set_module_assignment {interconnect_id.mem.s1} {2};set_module_assignment {interconnect_id.mem.s2} {3};set_module_assignment {interconnect_id.sem.ctl_slave} {4};set_module_assignment {interconnect_id.sem.ram_slave} {5};set_module_assignment {interconnect_id.sys_clk_timer.s1} {6};]]>
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true
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CYCLONEIVE
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true
DEVICE_FAMILY
java.lang.String
EP4CE115F29C7
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DEVICE
java.lang.String
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DEVICE_SPEEDGRADE
java.lang.String
Cyclone IV E
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DEVICE_FAMILY
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java.lang.String
UNKNOWN
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boolean
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clock
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clk_clk_clk
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1
clk
java.lang.String
clk_clk
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true
com.altera.sopcmodel.reset.Reset$Edges
DEASSERT
false
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java.lang.String
UNKNOWN
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boolean
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true
true
reset
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cpu_reset_reset_bridge_in_reset_reset
Input
1
reset
embeddedsw.configuration.isFlash
0
embeddedsw.configuration.isMemoryDevice
0
embeddedsw.configuration.isNonVolatileStorage
0
embeddedsw.configuration.isPrintableDevice
0
merlin.flow.avalon_universal_master_0
avalon_universal_master_0
com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment
DYNAMIC
false
true
true
true
int
0
false
true
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true
java.math.BigInteger
262144
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false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
SYMBOLS
false
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boolean
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true
java.lang.String
clk_clk
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java.lang.String
cpu_reset_reset_bridge_in_reset
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int
8
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true
java.math.BigInteger
0
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true
com.altera.entityinterfaces.IConnectionPoint
false
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boolean
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com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
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java.math.BigInteger
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false
false
true
true
true
int
0
false
true
true
true
int
1
false
true
false
true
int
1
false
true
true
true
boolean
true
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
true
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
false
cpu_data_master_address
Input
18
address
cpu_data_master_waitrequest
Output
1
waitrequest
cpu_data_master_byteenable
Input
4
byteenable
cpu_data_master_read
Input
1
read
cpu_data_master_readdata
Output
32
readdata
cpu_data_master_write
Input
1
write
cpu_data_master_writedata
Input
32
writedata
cpu_data_master_debugaccess
Input
1
debugaccess
embeddedsw.configuration.isFlash
0
embeddedsw.configuration.isMemoryDevice
0
embeddedsw.configuration.isNonVolatileStorage
0
embeddedsw.configuration.isPrintableDevice
0
merlin.flow.avalon_universal_master_0
avalon_universal_master_0
com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment
DYNAMIC
false
true
true
true
int
0
false
true
false
true
java.math.BigInteger
262144
true
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
SYMBOLS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk_clk
false
true
true
true
java.lang.String
cpu_reset_reset_bridge_in_reset
false
true
false
true
int
8
false
true
false
true
java.math.BigInteger
0
false
true
false
true
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
java.math.BigInteger
0
false
true
true
true
int
0
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
boolean
true
false
true
true
true
int
0
false
false
true
true
int
0
false
false
true
true
int
1
false
true
false
true
boolean
false
false
true
true
true
int
0
false
true
true
true
int
1
false
true
false
true
int
1
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
true
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
true
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
false
cpu_instruction_master_address
Input
18
address
cpu_instruction_master_waitrequest
Output
1
waitrequest
cpu_instruction_master_read
Input
1
read
cpu_instruction_master_readdata
Output
32
readdata
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk_clk
false
true
true
true
java.lang.String
cpu_reset_reset_bridge_in_reset
false
true
true
true
int
8
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
int
32
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
int
1
false
true
false
true
boolean
true
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
false
true
int
0
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
true
cpu_debug_mem_slave_address
Output
9
address
cpu_debug_mem_slave_write
Output
1
write
cpu_debug_mem_slave_read
Output
1
read
cpu_debug_mem_slave_readdata
Input
32
readdata
cpu_debug_mem_slave_writedata
Output
32
writedata
cpu_debug_mem_slave_byteenable
Output
4
byteenable
cpu_debug_mem_slave_waitrequest
Input
1
waitrequest
cpu_debug_mem_slave_debugaccess
Output
1
debugaccess
false
cpu
debug_mem_slave
cpu.debug_mem_slave
0
2048
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk_clk
false
true
true
true
java.lang.String
cpu_reset_reset_bridge_in_reset
false
true
true
true
int
8
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
int
32
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
int
1
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
false
true
int
0
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
true
jtag_uart_avalon_jtag_slave_address
Output
1
address
jtag_uart_avalon_jtag_slave_write
Output
1
write
jtag_uart_avalon_jtag_slave_read
Output
1
read
jtag_uart_avalon_jtag_slave_readdata
Input
32
readdata
jtag_uart_avalon_jtag_slave_writedata
Output
32
writedata
jtag_uart_avalon_jtag_slave_waitrequest
Input
1
waitrequest
jtag_uart_avalon_jtag_slave_chipselect
Output
1
chipselect
false
jtag_uart
avalon_jtag_slave
jtag_uart.avalon_jtag_slave
0
8
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk_clk
false
true
true
true
java.lang.String
cpu_reset_reset_bridge_in_reset
false
true
true
true
int
8
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
int
32
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
1
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
false
true
int
0
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
true
mem_s1_address
Output
15
address
mem_s1_write
Output
1
write
mem_s1_readdata
Input
32
readdata
mem_s1_writedata
Output
32
writedata
mem_s1_byteenable
Output
4
byteenable
mem_s1_chipselect
Output
1
chipselect
mem_s1_clken
Output
1
clken
false
mem
s1
mem.s1
0
131072
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk_clk
false
true
true
true
java.lang.String
cpu_reset_reset_bridge_in_reset
false
true
true
true
int
8
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
int
32
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
1
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
false
true
int
0
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
true
mem_s2_address
Output
15
address
mem_s2_write
Output
1
write
mem_s2_readdata
Input
32
readdata
mem_s2_writedata
Output
32
writedata
mem_s2_byteenable
Output
4
byteenable
mem_s2_chipselect
Output
1
chipselect
mem_s2_clken
Output
1
clken
false
mem
s2
mem.s2
0
131072
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk_clk
false
true
true
true
java.lang.String
cpu_reset_reset_bridge_in_reset
false
true
true
true
int
8
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
int
32
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
false
true
int
0
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
true
sem_ctl_slave_address
Output
1
address
sem_ctl_slave_write
Output
1
write
sem_ctl_slave_read
Output
1
read
sem_ctl_slave_readdata
Input
32
readdata
sem_ctl_slave_writedata
Output
32
writedata
false
sem
ctl_slave
sem.ctl_slave
0
8
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk_clk
false
true
true
true
java.lang.String
cpu_reset_reset_bridge_in_reset
false
true
true
true
int
8
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
int
32
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
int
1
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
false
true
int
0
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
true
sem_ram_slave_address
Output
2
address
sem_ram_slave_write
Output
1
write
sem_ram_slave_writedata
Output
32
writedata
false
sem
ram_slave
sem.ram_slave
0
16
com.altera.entityinterfaces.IConnectionPoint
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
clk_clk
false
true
true
true
java.lang.String
cpu_reset_reset_bridge_in_reset
false
true
true
true
int
8
false
true
false
true
boolean
false
false
true
true
true
com.altera.sopcmodel.avalon.EAddrBurstUnits
WORDS
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
boolean
false
false
true
true
true
int
0
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
true
true
int
32
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
int
1
false
true
false
true
boolean
false
false
true
false
true
boolean
false
false
true
false
true
int
0
false
true
false
true
com.altera.sopcmodel.avalon.TimingUnits
Cycles
false
true
false
true
int
0
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
avalon
true
sys_clk_timer_s1_address
Output
3
address
sys_clk_timer_s1_write
Output
1
write
sys_clk_timer_s1_readdata
Input
16
readdata
sys_clk_timer_s1_writedata
Output
16
writedata
sys_clk_timer_s1_chipselect
Output
1
chipselect
false
sys_clk_timer
s1
sys_clk_timer.s1
0
32
int
2
false
true
true
true
int
32
false
true
true
true
java.lang.String
0:0,1:1
false
true
true
true
java.lang.String
CYCLONEIVE
false
true
false
true
DEVICE_FAMILY
java.lang.String
Cyclone IV E
false
true
false
true
DEVICE_FAMILY
boolean
false
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clock
false
clk
Input
1
clk
java.lang.String
clk
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
DEASSERT
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
false
reset
Input
1
reset
com.altera.entityinterfaces.IConnectionPoint
false
true
true
true
java.lang.String
clk
false
true
false
true
java.lang.String
clk_reset
false
true
false
true
java.lang.String
false
true
false
true
com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme
INDIVIDUAL_REQUESTS
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
interrupt
true
receiver0_irq
Input
1
irq
false
sys_clk_timer
irq
sys_clk_timer.irq
0
com.altera.entityinterfaces.IConnectionPoint
false
true
true
true
java.lang.String
clk
false
true
false
true
java.lang.String
clk_reset
false
true
false
true
java.lang.String
false
true
false
true
com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme
INDIVIDUAL_REQUESTS
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
interrupt
true
receiver1_irq
Input
1
irq
false
jtag_uart
irq
jtag_uart.irq
0
com.altera.entityinterfaces.IConnectionPoint
false
true
true
true
java.lang.String
clk
false
true
false
true
java.lang.String
clk_reset
false
true
false
true
java.lang.Integer
false
true
true
true
com.altera.entityinterfaces.IConnectionPoint
false
true
true
true
com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme
NONE
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
interrupt
false
sender_irq
Output
32
irq
int
2
false
true
true
true
java.lang.String
deassert
false
true
true
true
int
2
false
true
true
true
int
1
false
true
true
true
int
1
false
true
true
true
int
3
false
true
true
true
int
1
false
true
true
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
false
true
int
0
false
true
true
true
int
0
true
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
java.lang.String
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
NONE
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
false
reset_in0
Input
1
reset
java.lang.String
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
NONE
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
false
reset_in1
Input
1
reset
boolean
false
false
true
false
true
java.lang.String
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clock
false
clk
Input
1
clk
java.lang.String
clk
false
true
true
true
java.lang.String
false
true
true
true
[Ljava.lang.String;
reset_in0,reset_in1
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
DEASSERT
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
true
reset_out
Output
1
reset
reset_req
Output
1
reset_req
int
0
false
true
true
true
java.lang.String
deassert
false
true
true
true
int
1
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
boolean
false
false
true
false
true
java.lang.String
false
true
false
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clock
false
clk
Input
1
clk
java.lang.String
clk
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
DEASSERT
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
false
in_reset
Input
1
reset
reset_req_in
Input
1
reset_req
java.lang.String
clk
false
true
true
true
java.lang.String
in_reset
false
true
true
true
[Ljava.lang.String;
in_reset
false
true
true
true
com.altera.sopcmodel.reset.Reset$Edges
DEASSERT
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
reset
true
out_reset
Output
1
reset
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clk
clk
cpu
clk
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clk
clk
jtag_uart
clk
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clk
clk
sys_clk_timer
clk
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clk
clk
mem
clk1
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clk
clk
sem
clock
int
1
false
true
true
true
java.math.BigInteger
0x0000
false
true
true
true
boolean
false
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
cpu
data_master
mm_interconnect_0
cpu_data_master
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clk
clk
mm_interconnect_0
clk_clk
int
1
false
true
true
true
java.math.BigInteger
0x0000
false
true
true
true
boolean
false
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
cpu
instruction_master
mm_interconnect_0
cpu_instruction_master
int
1
false
true
true
true
java.math.BigInteger
0x0000
false
true
true
true
boolean
false
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
mm_interconnect_0
jtag_uart_avalon_jtag_slave
jtag_uart
avalon_jtag_slave
int
1
false
true
true
true
java.math.BigInteger
0x0000
false
true
true
true
boolean
false
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
mm_interconnect_0
sem_ctl_slave
sem
ctl_slave
int
1
false
true
true
true
java.math.BigInteger
0x0000
false
true
true
true
boolean
false
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
mm_interconnect_0
cpu_debug_mem_slave
cpu
debug_mem_slave
int
1
false
true
true
true
java.math.BigInteger
0x0000
false
true
true
true
boolean
false
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
mm_interconnect_0
sem_ram_slave
sem
ram_slave
int
1
false
true
true
true
java.math.BigInteger
0x0000
false
true
true
true
boolean
false
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
mm_interconnect_0
sys_clk_timer_s1
sys_clk_timer
s1
int
1
false
true
true
true
java.math.BigInteger
0x0000
false
true
true
true
boolean
false
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
mm_interconnect_0
mem_s2
mem
s2
int
1
false
true
true
true
java.math.BigInteger
0x0000
false
true
true
true
boolean
false
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
mm_interconnect_0
mem_s1
mem
s1
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
irq_mapper
receiver0
sys_clk_timer
irq
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
irq_mapper
receiver1
jtag_uart
irq
int
0
false
true
true
true
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
cpu
irq
irq_mapper
sender
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clk
clk
irq_mapper
clk
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_controller
reset_out
cpu
reset
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_controller
reset_out
rst_translator
in_reset
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_translator
out_reset
jtag_uart
reset
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_controller
reset_out
mem
reset1
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_controller
reset_out
rst_translator
in_reset
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_translator
out_reset
sem
reset_n
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_controller
reset_out
rst_translator
in_reset
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_translator
out_reset
sys_clk_timer
reset
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_controller
reset_out
rst_translator
in_reset
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_translator
out_reset
mm_interconnect_0
cpu_reset_reset_bridge_in_reset
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_controller
reset_out
rst_translator
in_reset
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
rst_translator
out_reset
irq_mapper
clk_reset
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clk
clk_reset
rst_controller
reset_in0
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
cpu
debug_reset_request
rst_controller
reset_in1
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clk
clk
rst_controller
clk
java.lang.String
UNKNOWN
false
true
true
true
boolean
false
false
true
true
true
clk
clk
rst_translator
clk
1
clock_source
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IModule
Clock Source
18.1
1
clock_sink
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Clock Input
18.1
1
reset_sink
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Reset Input
18.1
1
clock_source
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Clock Output
18.1
1
reset_source
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Reset Output
18.1
1
altera_nios2_gen2
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IModule
Nios II Processor
18.1
9
clock_sink
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Clock Input
18.1
10
reset_sink
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Reset Input
18.1
9
avalon_master
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Avalon Memory Mapped Master
18.1
3
interrupt_receiver
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Interrupt Receiver
18.1
3
reset_source
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Reset Output
18.1
9
avalon_slave
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Avalon Memory Mapped Slave
18.1
1
nios_custom_instruction_master
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Custom Instruction Master
18.1
1
altera_avalon_jtag_uart
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IModule
JTAG UART Intel FPGA IP
18.1
3
interrupt_sender
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Interrupt Sender
18.1
1
altera_avalon_onchip_memory2
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IModule
On-Chip Memory (RAM or ROM) Intel FPGA IP
18.1
1
Semafor
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IModule
Semafor
1.0
1
conduit_end
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IMutableConnectionPoint
Conduit
18.1
1
altera_avalon_timer
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IModule
Interval Timer Intel FPGA IP
18.1
1
altera_mm_interconnect
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IModule
MM Interconnect
18.1
1
altera_irq_mapper
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IModule
Merlin IRQ Mapper
18.1
1
altera_reset_controller
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IModule
Merlin Reset Controller
18.1
1
altera_reset_translator
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IModule
Reset Translator
18.1
5
clock
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IConnection
Clock Connection
18.1
9
avalon
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IConnection
Avalon Memory Mapped Connection
18.1
4
clock
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IConnection
Clock Connection
18.1
3
interrupt
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IConnection
Interrupt Connection
18.1
14
reset
com.altera.entityinterfaces.IElementClass
com.altera.entityinterfaces.IConnection
Reset Connection
18.1
18.1 625
7831C1D0809000000183EFC2B97A