Ivan I. Ovchinnikov e53eb0ff97 done lr4, programmed hardware		2023-02-07 16:10:37 +03:00
..
inc_lut_tb.sv	wip lab4, phase inc+sine	2023-01-27 11:15:11 +03:00
lut_mod_tb.sv	wip lab4, tested module	2023-01-27 17:06:29 +03:00
sigdel.qpf	wip lab4, phase inc+sine	2023-01-27 11:15:11 +03:00
sigdel.qsf	done lr4, programmed hardware	2023-02-07 16:10:37 +03:00
sigdel.qws	done lr4, programmed hardware	2023-02-07 16:10:37 +03:00
sigdel.sv	wip lab4, tested module	2023-01-27 17:06:29 +03:00
sigdel_tb.sv	wip lab4, tested module	2023-01-27 17:06:29 +03:00
sine256.mif	wip lab4, phase inc+sine	2023-01-27 11:15:11 +03:00