fpga-lab-2/Top
Ivan I. Ovchinnikov 2314259147 lab3 until board programming (pt1 p9) 2022-12-24 22:37:46 +03:00
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niosII lab3 until board programming (pt1 p9) 2022-12-24 22:37:46 +03:00
software simulated individual, looks ok 2022-12-24 02:08:20 +03:00
#niosII_tb.csv# sem ram widening correct, generate testbench in PD was needed 2022-12-19 22:48:11 +03:00
.gitignore pt3.1-7 software project creation, branching for hardware and simulation settings 2022-10-19 15:03:52 +03:00
Semafor_hw.tcl simulated individual, looks ok 2022-12-24 02:08:20 +03:00
Semafor_hw.tcl~ simulated individual, looks ok 2022-12-24 02:08:20 +03:00
countones_ci_hw.tcl lab3 until board programming (pt1 p9) 2022-12-24 22:37:46 +03:00
niosII.qsys lab3 until board programming (pt1 p9) 2022-12-24 22:37:46 +03:00
niosII.sopcinfo lab3 until board programming (pt1 p9) 2022-12-24 22:37:46 +03:00
niosII_tb.csv simulated individual, looks ok 2022-12-24 02:08:20 +03:00
niosII_tb.spd pt3.1-7 software project creation, branching for hardware and simulation settings 2022-10-19 15:03:52 +03:00
semafor.qpf pt2.1 empty top level project 2022-10-18 16:36:43 +03:00
semafor.qsf sem ram widening correct, generate testbench in PD was needed 2022-12-19 22:48:11 +03:00