fpga-lab-2/Top/niosII/synthesis
Ivan I. Ovchinnikov b551fd0a26 work board parameters 2023-02-07 13:31:34 +03:00
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submodules work board parameters 2023-02-07 13:31:34 +03:00
niosII.debuginfo work board parameters 2023-02-07 13:31:34 +03:00
niosII.qip work board parameters 2023-02-07 13:31:34 +03:00
niosII.regmap reported lr2 + individual 2023-01-18 16:45:45 +03:00
niosII.v work board parameters 2023-02-07 13:31:34 +03:00