fpga-lab-2/Top/niosII/testbench/niosII_tb.qsys

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<?xml version="1.0" encoding="UTF-8"?>
<system name="$${FILENAME}">
<component
name="$${FILENAME}"
displayName="$${FILENAME}"
version="1.0"
description=""
tags=""
categories="" />
<parameter name="bonusData"><![CDATA[bonusData
{
element niosII_inst
{
datum _sortIndex
{
value = "0";
type = "int";
}
}
element niosII_inst_clk_bfm
{
datum _sortIndex
{
value = "1";
type = "int";
}
}
element niosII_inst_reset_bfm
{
datum _sortIndex
{
value = "2";
type = "int";
}
}
}
]]></parameter>
<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
<parameter name="device" value="EP4CE115F29C7" />
<parameter name="deviceFamily" value="Cyclone IV E" />
<parameter name="deviceSpeedGrade" value="7" />
<parameter name="fabricMode" value="QSYS" />
<parameter name="generateLegacySim" value="false" />
<parameter name="generationId" value="0" />
<parameter name="globalResetBus" value="false" />
<parameter name="hdlLanguage" value="VERILOG" />
<parameter name="hideFromIPCatalog" value="false" />
<parameter name="lockedInterfaceDefinition" value="" />
<parameter name="maxAdditionalLatency" value="1" />
<parameter name="projectName" value="semafor.qpf" />
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="0" />
<parameter name="testBenchDutName" value="niosII" />
<parameter name="timeStamp" value="0" />
<parameter name="useTestBenchNamingPattern" value="true" />
<instanceScript></instanceScript>
<module name="niosII_inst" kind="niosII" version="1.0" enabled="1">
<parameter name="AUTO_CLK_CLOCK_DOMAIN" value="1" />
<parameter name="AUTO_CLK_CLOCK_RATE" value="0" />
<parameter name="AUTO_CLK_RESET_DOMAIN" value="1" />
<parameter name="AUTO_DEVICE" value="EP4CE115F29C7" />
<parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="7" />
<parameter name="AUTO_GENERATION_ID" value="0" />
<parameter name="AUTO_UNIQUE_ID" value="niosII" />
</module>
<module
name="niosII_inst_clk_bfm"
kind="altera_avalon_clock_source"
version="18.1"
enabled="1">
<parameter name="CLOCK_RATE" value="50000000" />
<parameter name="CLOCK_UNIT" value="1" />
</module>
<module
name="niosII_inst_reset_bfm"
kind="altera_avalon_reset_source"
version="18.1"
enabled="1">
<parameter name="ASSERT_HIGH_RESET" value="0" />
<parameter name="INITIAL_RESET_CYCLES" value="50" />
</module>
<connection
kind="clock"
version="18.1"
start="niosII_inst_clk_bfm.clk"
end="niosII_inst.clk" />
<connection
kind="clock"
version="18.1"
start="niosII_inst_clk_bfm.clk"
end="niosII_inst_reset_bfm.clk" />
<connection
kind="reset"
version="18.1"
start="niosII_inst_reset_bfm.reset"
end="niosII_inst.reset" />
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
<interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>