fpga-lab-2/Top
Ivan I. Ovchinnikov 83b0f857d3 Merge branch 'simulation' into lab3 preferring lab3 in conflicts
# Conflicts:
#	Top/niosII.sopcinfo
#	Top/niosII/niosII.html
#	Top/niosII/niosII.xml
#	Top/niosII/synthesis/niosII.debuginfo
#	Top/niosII/synthesis/niosII.qip
#	Top/semafor.qws
2023-01-20 12:59:24 +03:00
..
niosII Merge branch 'simulation' into lab3 preferring lab3 in conflicts 2023-01-20 12:59:24 +03:00
software reported lr2 + individual 2023-01-18 16:45:45 +03:00
#niosII_tb.csv# sem ram widening correct, generate testbench in PD was needed 2022-12-19 22:48:11 +03:00
.gitignore pt3.1-7 software project creation, branching for hardware and simulation settings 2022-10-19 15:03:52 +03:00
Semafor_hw.tcl simulated individual, looks ok 2022-12-24 02:08:20 +03:00
Semafor_hw.tcl~ simulated individual, looks ok 2022-12-24 02:08:20 +03:00
countones_ci_hw.tcl lab3 until board programming (pt1 p9) 2022-12-24 22:37:46 +03:00
niosII.qsys lab3 until board programming (pt1 p9) 2022-12-24 22:37:46 +03:00
niosII.sopcinfo reported lr2 + individual 2023-01-18 16:45:45 +03:00
niosII_tb.csv reported lr2 + individual 2023-01-18 16:45:45 +03:00
niosII_tb.spd reported lr2 + individual 2023-01-18 16:45:45 +03:00
semafor.qpf pt2.1 empty top level project 2022-10-18 16:36:43 +03:00
semafor.qsf sem ram widening correct, generate testbench in PD was needed 2022-12-19 22:48:11 +03:00