fpga-lab-2/HDL/IP
Ivan I. Ovchinnikov 1589af18e7 sem ram widening correct, generate testbench in PD was needed 2022-12-19 22:48:11 +03:00
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periodram.qip sem ram widening correct, generate testbench in PD was needed 2022-12-19 22:48:11 +03:00
periodram.v sem ram widening correct, generate testbench in PD was needed 2022-12-19 22:48:11 +03:00
periodram_inst.v pt 1. initial sources 2022-10-18 16:10:29 +03:00