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added ram hex(no luck)

This commit is contained in:
Ivan I. Ovchinnikov 2022-12-22 17:32:08 +03:00
parent f6e75a12d5
commit 6291090406
8 changed files with 43 additions and 14 deletions
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13
HDL/IP/periodram.v
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@ -92,6 +92,13 @@ module periodram (
altsyncram_component.clock_enable_input_a = "BYPASS", altsyncram_component.clock_enable_input_a = "BYPASS",
altsyncram_component.clock_enable_input_b = "BYPASS", altsyncram_component.clock_enable_input_b = "BYPASS",
altsyncram_component.clock_enable_output_b = "BYPASS", altsyncram_component.clock_enable_output_b = "BYPASS",
`ifdef NO_PLI
altsyncram_component.init_file = "periodram.rif"
`else
altsyncram_component.init_file = "periodram.hex"
`endif
,
altsyncram_component.init_file_layout = "PORT_B",
altsyncram_component.intended_device_family = "Cyclone IV E", altsyncram_component.intended_device_family = "Cyclone IV E",
altsyncram_component.lpm_type = "altsyncram", altsyncram_component.lpm_type = "altsyncram",
altsyncram_component.numwords_a = 16, altsyncram_component.numwords_a = 16,
@ -120,7 +127,7 @@ endmodule
// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC "0" // Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC "0"
// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC "0" // Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC "0"
// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8" // Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8"
// Retrieval info: PRIVATE: BlankMemory NUMERIC "1" // Retrieval info: PRIVATE: BlankMemory NUMERIC "0"
// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0" // Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0"
// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC "0" // Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC "0"
// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0" // Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0"
@ -145,7 +152,7 @@ endmodule
// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0" // Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
// Retrieval info: PRIVATE: MEMSIZE NUMERIC "512" // Retrieval info: PRIVATE: MEMSIZE NUMERIC "512"
// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC "0" // Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC "0"
// Retrieval info: PRIVATE: MIFfilename STRING "" // Retrieval info: PRIVATE: MIFfilename STRING "periodram.hex"
// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC "2" // Retrieval info: PRIVATE: OPERATION_MODE NUMERIC "2"
// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC "0" // Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC "0"
// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC "0" // Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC "0"
@ -178,6 +185,8 @@ endmodule
// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS" // Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS"
// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING "BYPASS" // Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING "BYPASS"
// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING "BYPASS" // Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING "BYPASS"
// Retrieval info: CONSTANT: INIT_FILE STRING "periodram.hex"
// Retrieval info: CONSTANT: INIT_FILE_LAYOUT STRING "PORT_B"
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E" // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
// Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram" // Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "16" // Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "16"

1
Testbench/dec/dec.qsf
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@ -64,4 +64,5 @@ set_global_assignment -name EDA_TEST_BENCH_NAME dec_tb -section_id eda_simulatio
set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id dec_tb set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id dec_tb
set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME dec_tb -section_id dec_tb set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME dec_tb -section_id dec_tb
set_global_assignment -name EDA_TEST_BENCH_FILE dec_tb.sv -section_id dec_tb set_global_assignment -name EDA_TEST_BENCH_FILE dec_tb.sv -section_id dec_tb
set_global_assignment -name HEX_FILE periodram.hex
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

BIN
Testbench/dec/dec.qws
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Binary file not shown.

17
Testbench/dec/periodram.hex Normal file
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@ -0,0 +1,17 @@
:040000000000006498
:040001000000006497
:0400020000000032C8
:040003000000000AEF
:040004000000006494
:04000500000000C82F
:040006000000006492
:040007000000000AEB
:04000800000000965E
:04000900000000FAF9
:04000A00000000C82A
:04000B000000000AE7
:04000C00000000FAF6
:04000D00000000FAF5
:04000E00000000FAF4
:04000F000000000AE3
:00000001FF

4
Top/niosII.sopcinfo
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@ -1,11 +1,11 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<EnsembleReport name="niosII" kind="niosII" version="1.0" fabric="QSYS"> <EnsembleReport name="niosII" kind="niosII" version="1.0" fabric="QSYS">
<!-- Format version 18.1 625 (Future versions may contain additional information.) --> <!-- Format version 18.1 625 (Future versions may contain additional information.) -->
<!-- 2022.12.21.21:03:50 --> <!-- 2022.12.22.17:19:01 -->
<!-- A collection of modules and connections --> <!-- A collection of modules and connections -->
<parameter name="AUTO_GENERATION_ID"> <parameter name="AUTO_GENERATION_ID">
<type>java.lang.Integer</type> <type>java.lang.Integer</type>
<value>1671642230</value> <value>1671715140</value>
<derived>false</derived> <derived>false</derived>
<enabled>true</enabled> <enabled>true</enabled>
<visible>false</visible> <visible>false</visible>

14
Top/niosII/testbench/niosII_tb/simulation/niosII_tb.v
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@ -4,14 +4,16 @@ module niosII_tb (
wire niosii_inst_clk_bfm_clk_clk; // niosII_inst_clk_bfm:clk -> [niosII_inst:clk_clk, niosII_inst_reset_bfm:clk] wire niosii_inst_clk_bfm_clk_clk; // niosII_inst_clk_bfm:clk -> [niosII_inst:clk_clk, niosII_inst_reset_bfm:clk]
wire niosii_inst_reset_bfm_reset_reset; // niosII_inst_reset_bfm:reset -> niosII_inst:reset_reset_n wire niosii_inst_reset_bfm_reset_reset; // niosII_inst_reset_bfm:reset -> niosII_inst:reset_reset_n
reg train;
wire red, yellow, green;
niosII niosii_inst ( niosII niosii_inst (
.clk_clk (niosii_inst_clk_bfm_clk_clk), // clk.clk .clk_clk (niosii_inst_clk_bfm_clk_clk), // clk.clk
.reset_reset_n (niosii_inst_reset_bfm_reset_reset), // reset.reset_n .reset_reset_n (niosii_inst_reset_bfm_reset_reset), // reset.reset_n
.sem_export_train (), // sem_export.train .sem_export_train (train), // sem_export.train
.sem_export_red (), // .red .sem_export_red (red), // .red
.sem_export_yellow (), // .yellow .sem_export_yellow (yellow), // .yellow
.sem_export_green () // .green .sem_export_green (green) // .green
); );
altera_avalon_clock_source #( altera_avalon_clock_source #(
@ -33,9 +35,9 @@ module niosII_tb (
train = 0; train = 0;
wait (niosii_inst_reset_bfm_reset_reset); wait (niosii_inst_reset_bfm_reset_reset);
forever begin forever begin
repeat (29000) @(posedge niosII_inst_clk_bfm_clk_clk); repeat (29000) @(posedge niosii_inst_clk_bfm_clk_clk);
train = 1; train = 1;
repeat (10) @(posedge niosII_inst_clk_bfm_clk_clk); repeat (10) @(posedge niosii_inst_clk_bfm_clk_clk);
train = 0; train = 0;
end end
end end

4
Top/software/semafor_bsp/settings.bsp
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@ -2,8 +2,8 @@
<sch:Settings xmlns:sch="http://www.altera.com/embeddedsw/bsp/schema"> <sch:Settings xmlns:sch="http://www.altera.com/embeddedsw/bsp/schema">
<BspType>hal</BspType> <BspType>hal</BspType>
<BspVersion>default</BspVersion> <BspVersion>default</BspVersion>
<BspGeneratedTimeStamp>21.12.2022 21:06:52</BspGeneratedTimeStamp> <BspGeneratedTimeStamp>22.12.2022 17:21:19</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1671642412929</BspGeneratedUnixTimeStamp> <BspGeneratedUnixTimeStamp>1671715279678</BspGeneratedUnixTimeStamp>
<BspGeneratedLocation>C:\Software\FPGA\iu3-31m\Lab2\Top\software\semafor_bsp</BspGeneratedLocation> <BspGeneratedLocation>C:\Software\FPGA\iu3-31m\Lab2\Top\software\semafor_bsp</BspGeneratedLocation>
<BspSettingsFile>settings.bsp</BspSettingsFile> <BspSettingsFile>settings.bsp</BspSettingsFile>
<SopcDesignFile>..\..\niosII.sopcinfo</SopcDesignFile> <SopcDesignFile>..\..\niosII.sopcinfo</SopcDesignFile>

4
Top/software/semafor_bsp/summary.html
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@ -22,10 +22,10 @@
<td width="20%" bgcolor="#77BBFF">BSP Version:</td><td>default</td> <td width="20%" bgcolor="#77BBFF">BSP Version:</td><td>default</td>
</tr> </tr>
<tr mode="wrap"> <tr mode="wrap">
<td width="20%" bgcolor="#77BBFF">BSP Generated On:</td><td>21.12.2022 21:06:52</td> <td width="20%" bgcolor="#77BBFF">BSP Generated On:</td><td>22.12.2022 17:21:19</td>
</tr> </tr>
<tr mode="wrap"> <tr mode="wrap">
<td width="20%" bgcolor="#77BBFF">BSP Generated Timestamp:</td><td>1671642412929</td> <td width="20%" bgcolor="#77BBFF">BSP Generated Timestamp:</td><td>1671715279678</td>
</tr> </tr>
<tr mode="wrap"> <tr mode="wrap">
<td width="20%" bgcolor="#77BBFF">BSP Generated Location:</td><td>C:\Software\FPGA\iu3-31m\Lab2\Top\software\semafor_bsp</td> <td width="20%" bgcolor="#77BBFF">BSP Generated Location:</td><td>C:\Software\FPGA\iu3-31m\Lab2\Top\software\semafor_bsp</td>